RD-Daniel-4XLR: Add changes to boot Chip 2 and 3

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

6 files changed, 133 insertions, 4 deletions

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Madt.aslc
index 0ce22561..daa1a713 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Madt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Madt.aslc
@@ -96,10 +96,12 @@
 

 typedef struct {

   EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

-  EFI_ACPI_6_2_GIC_STRUCTURE                            GicInterfaces[8];

+  EFI_ACPI_6_2_GIC_STRUCTURE                            GicInterfaces[16];

   EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;

   EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor_1;

   EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor_2;

+  EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor_3;

+  EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor_4;

 #if 0

   EFI_ACPI_6_2_GIC_ITS_STRUCTURE                        GicIts[4];

 #endif

@@ -159,6 +161,42 @@ STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
       0, 3, GET_MPID(0x01000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

       FixedPcdGet32 (PcdGicDistributorBase),

       0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+

+    // Chip 2

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0

+      0, 0, GET_MPID(0x02000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1

+      0, 1, GET_MPID(0x02000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2

+      0, 2, GET_MPID(0x02000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3

+      0, 3, GET_MPID(0x02000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+

+    // Chip 3

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0

+      0, 0, GET_MPID(0x03000000ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1

+      0, 1, GET_MPID(0x03000100ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2

+      0, 2, GET_MPID(0x03000200ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3

+      0, 3, GET_MPID(0x03000300ULL, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

   },

   // GIC Distributor Entry

   EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),

@@ -168,6 +206,10 @@ STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
                                       SIZE_16MB),

   EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + 0x40000000000ULL,

                                       SIZE_16MB),

+  EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + 0x80000000000ULL,

+                                      SIZE_16MB),

+  EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase) + 0xC0000000000ULL,

+                                      SIZE_16MB),

 #if 0

   {

     // GIC ITS

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Srat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Srat.aslc
index 60d27d81..f9631c04 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Srat.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDaniel/Srat.aslc
@@ -66,8 +66,8 @@
 

 typedef struct {

   EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;

-  EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE             Memory[4];

-  EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE               Gicc[8];

+  EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE             Memory[8];

+  EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE               Gicc[16];

   //EFI_ACPI_6_3_GIC_ITS_AFFINITY_STRUCTURE            Its[4];

 } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;

 

@@ -103,6 +103,20 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
 

     EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x1,0x80000000,0x00000480,0x80000000,0x00000001,0x00000001),

 

+    // Chip 2 - 2GB

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x2,0x80000000,0x00000800,0x7F000000,0x00000000,0x00000001),

+

+    // Chip 2 - 6GB

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x2,0x80000000,0x00000880,0x80000000,0x00000001,0x00000001),

+

+#if 1

+    // Chip 3 - 2GB

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x3,0x80000000,0x00000C00,0x7F000000,0x00000000,0x00000001),

+

+    // Chip 3 - 6GB

+    EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x3,0x80000000,0x00000C80,0x80000000,0x00000001,0x00000001),

+#endif

+

   },

 

     //EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT(0x0,0xFF600000,0x00000000,0x00010000,0x00000000,0x00000000),

@@ -118,6 +132,14 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
     EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x00000005,0x00000001,0x00000000),

     EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x00000006,0x00000001,0x00000000),

     EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x1,0x00000007,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x2,0x00000008,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x2,0x00000009,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x2,0x0000000A,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x2,0x0000000B,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x3,0x0000000C,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x3,0x0000000D,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x3,0x0000000E,0x00000001,0x00000000),

+    EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT(0x3,0x0000000F,0x00000001,0x00000000),

   },

 

 #if 0

diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
index 10a5df69..e4cd77b1 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf
@@ -43,11 +43,15 @@
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base

   gArmSgiTokenSpaceGuid.PcdDramBlock2Size

   gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote2

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote3

   gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote

 

   gArmTokenSpaceGuid.PcdSystemMemoryBase

   gArmTokenSpaceGuid.PcdSystemMemorySize

   gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote2

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote3

 

   gArmTokenSpaceGuid.PcdGicDistributorBase

   gArmTokenSpaceGuid.PcdGicRedistributorsBase

diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index a952aa68..a431bd71 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -16,7 +16,7 @@
 #include <SgiPlatform.h>

 

 // Total number of descriptors, including the final "end-of-table" descriptor.

-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  16

+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS  20

 

 /**

   Returns the Virtual Memory Map of the platform.

@@ -64,6 +64,32 @@ ArmPlatformGetVirtualMemoryMap (
     FixedPcdGet64 (PcdDramBlock2BaseRemote),

     FixedPcdGet64 (PcdDramBlock2SizeRemote));

 

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    ResourceAttributes,

+    FixedPcdGet64 (PcdSystemMemoryBaseRemote2),

+    FixedPcdGet64 (PcdSystemMemorySize));

+

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    ResourceAttributes,

+    FixedPcdGet64 (PcdDramBlock2BaseRemote2),

+    FixedPcdGet64 (PcdDramBlock2SizeRemote));

+

+#if 1

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    ResourceAttributes,

+    FixedPcdGet64 (PcdSystemMemoryBaseRemote3),

+    FixedPcdGet64 (PcdSystemMemorySize));

+

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    ResourceAttributes,

+    FixedPcdGet64 (PcdDramBlock2BaseRemote3),

+    FixedPcdGet64 (PcdDramBlock2SizeRemote));

+#endif

+

   ASSERT (VirtualMemoryMap != NULL);

   Index = 0;

 

@@ -146,6 +172,32 @@ ArmPlatformGetVirtualMemoryMap (
   VirtualMemoryTable[Index].Length          = PcdGet64 (PcdDramBlock2SizeRemote);

   VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

 

+  // Remote DDR - (2GB - 16MB) - Chip 2

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBaseRemote2);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBaseRemote2);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);

+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

+

+  // Remote DDR - Second Block - Chip 2

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdDramBlock2BaseRemote2);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdDramBlock2BaseRemote2);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdDramBlock2SizeRemote);

+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

+

+#if 1

+  // Remote DDR - (2GB - 16MB) - Chip 3

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdSystemMemoryBaseRemote3);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdSystemMemoryBaseRemote3);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdSystemMemorySize);

+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

+

+  // Remote DDR - Second Block - Chip 3

+  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdDramBlock2BaseRemote3);

+  VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdDramBlock2BaseRemote3);

+  VirtualMemoryTable[Index].Length          = PcdGet64 (PcdDramBlock2SizeRemote);

+  VirtualMemoryTable[Index].Attributes      = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;

+#endif

+

   // PCI Configuration Space

   VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdPciExpressBaseAddress);

   VirtualMemoryTable[Index].VirtualBase     = PcdGet64 (PcdPciExpressBaseAddress);

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index a1a4fba4..764344d0 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -54,5 +54,10 @@
   gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote|0|UINT64|0x00000012

   gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote|0|UINT64|0x00000013

 

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote2|0|UINT64|0x00000014

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote2|0|UINT64|0x00000015

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote3|0|UINT64|0x00000016

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote3|0|UINT64|0x00000017

+

 [Ppis]

   gNtFwConfigDtInfoPpiGuid     = { 0x6f606eb3, 0x9123, 0x4e15, { 0xa8, 0x9b, 0x0f, 0xac, 0x66, 0xef, 0xd0, 0x17 } }

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc b/Platform/ARM/SgiPkg/SgiPlatform.dsc
index 5b844f02..38d227af 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc
@@ -115,6 +115,8 @@
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0x8080000000

   gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0x180000000

   gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote|0x48080000000

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote2|0x88080000000

+  gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote3|0xC8080000000

   gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote|0x180000000

 

   # NV Storage PCDs. Use base of 0x08000000 for NOR0, 0xC0000000 for NOR 1

@@ -134,6 +136,8 @@
   gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000

   gArmTokenSpaceGuid.PcdSystemMemorySize|0x7F000000

   gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote|0x40080000000

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote2|0x80080000000

+  gArmSgiTokenSpaceGuid.PcdSystemMemoryBaseRemote3|0xC0080000000

 

   # GIC Base Addresses

   gArmTokenSpaceGuid.PcdGicDistributorBase|0x30000000