Vlv2TbltDevicePkg: Add GCC IA32 build support

* Remove CpuIa32Lib that contains inline assembly that is not compatible with GCC builds. Use BaseLib functions for CPUID and MSR access and the CPUID and MSR defintions from the UefiCpuPkg. * Add PlatformPkgGccIa32.dsc * Add /IA32 flag to Build_IFWI.sh * Add /IA32 flag to bld_vlv.sh * Remove unused references to gEfiPlatformCpuInfoGuid Cc: Zailiang Sun <zailiang.sun@intel.com> Cc: Yi Qian <yi.qian@intel.com> Cc: Gary Lin <glin@suse.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Zailiang Sun <zailiang.sun@intel.com>
author: Michael D Kinney <michael.d.kinney@intel.com> 2019-07-08 15:03:25 -0700
committer: Michael D Kinney <michael.d.kinney@intel.com> 2019-07-12 17:29:41 -0700
commit: 6a728b4b7d6b45a9e044f3fe261f732b0f1958e2 (patch)
tree: 3138c3e75130b03a4474c52ce1e97c4860941028
parent: e286c36ae4c07cfa6496e779dae2616eb34f6f3c (diff)
30 files changed, 1421 insertions, 1567 deletions
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c
index 72edc1bc..479ffa61 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c
@@ -36,7 +36,6 @@ Abstract:
 #include <Guid/PlatformInfo.h>
 #include <Guid/BoardFeatures.h>
 #include <Protocol/AcpiTable.h>
-#include <Library/CpuIA32.h>
 #include <SetupMode.h>
 #include <Guid/AcpiTableStorage.h>
 #include <Guid/EfiVpdData.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh b/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh
index 422e90ca..349f0c7b 100755
--- a/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh
+++ b/Platform/Intel/Vlv2TbltDevicePkg/Build_IFWI.sh
@@ -63,6 +63,10 @@ for (( i=1; i<=$#; ))
       Arch=X64
       Build_Flags="$Build_Flags /x64"
       shift
+    elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/IA32" ]; then
+      Arch=IA32
+      Build_Flags="$Build_Flags /IA32"
+      shift
     elif [ "$1" == "/nG" ]; then
       Stitch_Flags="$Stitch_Flags /nG"
       shift
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h
index f1756662..eec167da 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/Include/Guid/PlatformCpuInfo.h
@@ -1,11 +1,8 @@
 /*++
 
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-                                                                                   
+  Copyright (c) 2004  - 2019, Intel Corporation. All rights reserved.<BR>
 
+  SPDX-License-Identifier: BSD-2-Clause-Patent
 
 Module Name:
 
@@ -21,7 +18,6 @@ Abstract:
 #define _PLATFORM_CPU_INFO_GUID_H_
 
 #include "CpuType.h"
-#include <Library/CpuIA32.h>
 
 #define EFI_PLATFORM_CPU_INFO_GUID \
   {\
@@ -95,6 +91,14 @@ typedef struct {
   UINT8               HwCoordinationFeedback;   // ECX [0]
 } EFI_CPU_POWER_MANAGEMENT; // CPUID.6.EAX
 
+
+typedef struct {
+  UINT32  RegEax;
+  UINT32  RegEbx;
+  UINT32  RegEcx;
+  UINT32  RegEdx;
+} EFI_CPUID_REGISTER;
+
 //
 // IMPORTANT: Each CPU feature enabling entry is assumed a tri-state variable.
 //   - Keep the respective feature entry variable as default value (0x00)
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h b/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h
deleted file mode 100644
index 78c78319..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Include/Library/CpuIA32.h
+++ /dev/null
@@ -1,345 +0,0 @@
-/*++
-
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-                                                                                   
-
-
-Module Name:
-
-  CpuIA32.h
-
-Abstract:
-
---*/
-
-#ifndef _CPU_IA32_H
-#define _CPU_IA32_H
-
-typedef struct {
-  UINT32  RegEax;
-  UINT32  RegEbx;
-  UINT32  RegEcx;
-  UINT32  RegEdx;
-} EFI_CPUID_REGISTER;
-
-typedef struct {
-  UINT32  HeaderVersion;
-  UINT32  UpdateRevision;
-  UINT32  Date;
-  UINT32  ProcessorId;
-  UINT32  Checksum;
-  UINT32  LoaderRevision;
-  UINT32  ProcessorFlags;
-  UINT32  DataSize;
-  UINT32  TotalSize;
-  UINT8   Reserved[12];
-} EFI_CPU_MICROCODE_HEADER;
-
-typedef struct {
-  UINT32  ExtendedSignatureCount;
-  UINT32  ExtendedTableChecksum;
-  UINT8   Reserved[12];
-} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
-
-typedef struct {
-  UINT32  ProcessorSignature;
-  UINT32  ProcessorFlag;
-  UINT32  ProcessorChecksum;
-} EFI_CPU_MICROCODE_EXTENDED_TABLE;
-
-typedef struct {
-  UINT32  Stepping       : 4;
-  UINT32  Model          : 4;
-  UINT32  Family         : 4;
-  UINT32  Type           : 2;
-  UINT32  Reserved1      : 2;
-  UINT32  ExtendedModel  : 4;
-  UINT32  ExtendedFamily : 8;
-  UINT32  Reserved2      : 4;
-} EFI_CPU_VERSION;
-
-#define EFI_CPUID_SIGNATURE                   0x0
-#define EFI_CPUID_VERSION_INFO                0x1
-#define EFI_CPUID_CACHE_INFO                  0x2
-#define EFI_CPUID_SERIAL_NUMBER               0x3
-#define EFI_CPUID_EXTENDED_FUNCTION           0x80000000
-#define EFI_CPUID_EXTENDED_CPU_SIG            0x80000001
-#define EFI_CPUID_BRAND_STRING1               0x80000002
-#define EFI_CPUID_BRAND_STRING2               0x80000003
-#define EFI_CPUID_BRAND_STRING3               0x80000004
-
-#define EFI_MSR_IA32_PLATFORM_ID              0x17
-#define EFI_MSR_IA32_APIC_BASE                0x1B
-#define EFI_MSR_EBC_HARD_POWERON              0x2A
-#define EFI_MSR_EBC_SOFT_POWERON              0x2B
-#define BINIT_DRIVER_DISABLE                  0x40
-#define INTERNAL_MCERR_DISABLE                0x20
-#define INITIATOR_MCERR_DISABLE               0x10
-#define EFI_MSR_EBC_FREQUENCY_ID              0x2C
-#define EFI_MSR_IA32_BIOS_UPDT_TRIG           0x79
-#define EFI_MSR_IA32_BIOS_SIGN_ID             0x8B
-#define EFI_MSR_PSB_CLOCK_STATUS              0xCD
-#define EFI_APIC_GLOBAL_ENABLE                0x800
-#define EFI_MSR_IA32_MISC_ENABLE              0x1A0
-#define LIMIT_CPUID_MAXVAL_ENABLE_BIT         0x00400000
-#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT  0x00000008
-#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT      0x00000004
-#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
-#define FAST_STRING_ENABLE_BIT                0x00000001
-
-#define EFI_CACHE_VARIABLE_MTRR_BASE          0x200
-#define EFI_CACHE_VARIABLE_MTRR_END           0x20F
-#define EFI_CACHE_IA32_MTRR_DEF_TYPE          0x2FF
-#define EFI_CACHE_MTRR_VALID                  0x800
-#define EFI_CACHE_FIXED_MTRR_VALID            0x400
-#define EFI_CACHE_VALID_ADDRESS               0xFFFFFF000
-#define EFI_MSR_VALID_MASK                    0xFFFFFFFFF
-#define EFI_CACHE_VALID_EXTENDED_ADDRESS      0xFFFFFFFFFF000
-#define EFI_MSR_VALID_EXTENDED_MASK           0xFFFFFFFFFFFFF
-
-#define EFI_IA32_MTRR_FIX64K_00000            0x250
-#define EFI_IA32_MTRR_FIX16K_80000            0x258
-#define EFI_IA32_MTRR_FIX16K_A0000            0x259
-#define EFI_IA32_MTRR_FIX4K_C0000             0x268
-#define EFI_IA32_MTRR_FIX4K_C8000             0x269
-#define EFI_IA32_MTRR_FIX4K_D0000             0x26A
-#define EFI_IA32_MTRR_FIX4K_D8000             0x26B
-#define EFI_IA32_MTRR_FIX4K_E0000             0x26C
-#define EFI_IA32_MTRR_FIX4K_E8000             0x26D
-#define EFI_IA32_MTRR_FIX4K_F0000             0x26E
-#define EFI_IA32_MTRR_FIX4K_F8000             0x26F
-
-#define EFI_IA32_MCG_CAP                      0x179
-#define EFI_IA32_MCG_CTL                      0x17B
-#define EFI_IA32_MC0_CTL                      0x400
-#define EFI_IA32_MC0_STATUS                   0x401
-
-#define EFI_IA32_PERF_STATUS                  0x198
-#define EFI_IA32_PERF_CTL                     0x199
-
-#define EFI_CACHE_UNCACHEABLE                 0
-#define EFI_CACHE_WRITECOMBINING              1
-#define EFI_CACHE_WRITETHROUGH                4
-#define EFI_CACHE_WRITEPROTECTED              5
-#define EFI_CACHE_WRITEBACK                   6
-
-//
-// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
-//
-#define EfiMakeCpuVersion(f, m, s)         \
-  (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
-
-/**
-  Halt the Cpu
-
-  @param[in] None
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiHalt (
-  VOID
-  );
-
-/**
-  Write back and invalidate the Cpu cache
-
-  @param[in] None
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiWbinvd (
-  VOID
-  );
-
-/**
-  Invalidate the Cpu cache
-
-   @param[in] None
-
-   @retval None
-
-**/
-VOID
-EFIAPI
-EfiInvd (
-  VOID
-  );
-
-/**
-  Get the Cpu info by execute the CPUID instruction
-
-  @param[in] RegisterInEax The input value to put into register EAX
-  @param[in] Regs          The Output value
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiCpuid (
-  IN  UINT32                 RegisterInEax,
-  OUT EFI_CPUID_REGISTER     *Regs
-  );
-
-/**
-  When RegisterInEax != 4, the functionality is the same as EfiCpuid.
-  When RegisterInEax == 4, the function return the deterministic cache
-  parameters by excuting the CPUID instruction.
-
-  @param[in]  RegisterInEax  The input value to put into register EAX.
-  @param[in]  CacheLevel     The deterministic cache level.
-  @param[in]  Regs           The Output value.
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiCpuidExt (
-  IN  UINT32                 RegisterInEax,
-  IN  UINT32                 CacheLevel,
-  OUT EFI_CPUID_REGISTER     *Regs
-  );
-
-/**
-  Read Cpu MSR
-
-  @param[in] Index  The index value to select the register
-
-  @retval           Return the read data
-
-**/
-UINT64
-EFIAPI
-EfiReadMsr (
-  IN UINT32     Index
-  );
-
-/**
-  Write Cpu MSR
-
-  @param[in] Index  The index value to select the register
-  @param[in] Value  The value to write to the selected register
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiWriteMsr (
-  IN UINT32     Index,
-  IN UINT64     Value
-  );
-
-/**
-  Read Time stamp
-
-  @param[in] None
-
-  @retval Return the read data
-
-**/
-UINT64
-EFIAPI
-EfiReadTsc (
-  VOID
-  );
-
-/**
-  Writing back and invalidate the cache,then diable it
-
-  @param[in] None
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiDisableCache (
-  VOID
-  );
-
-/**
-  Invalidate the cache,then Enable it
-
-  @param[in] None
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiEnableCache (
-  VOID
-  );
-
-/**
-  Get Eflags
-
-  @param[in] None
-
-  @retval Return the Eflags value
-
-**/
-UINT32
-EFIAPI
-EfiGetEflags (
-  VOID
-  );
-
-/**
-  Disable Interrupts
-
-  @param[in] None
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiDisableInterrupts (
-  VOID
-  );
-
-/**
-  Enable Interrupts
-
-  @param[in] None
-
-  @retval None
-
-**/
-VOID
-EFIAPI
-EfiEnableInterrupts (
-  VOID
-  );
-
-/**
-  Extract CPU detail version infomation
-
-  @param[in] FamilyId    FamilyId, including ExtendedFamilyId
-  @param[in] Model       Model, including ExtendedModel
-  @param[in] SteppingId  SteppingId
-  @param[in] Processor   Processor
-
-**/
-VOID
-EFIAPI
-EfiCpuVersion (
-  IN   UINT16  *FamilyId,    OPTIONAL
-  IN   UINT8   *Model,       OPTIONAL
-  IN   UINT8   *SteppingId,  OPTIONAL
-  IN   UINT8   *Processor    OPTIONAL
-  );
-
-#endif
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf
deleted file mode 100644
index c9f0a434..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf
+++ /dev/null
@@ -1,41 +0,0 @@
-#
-#
-# Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
-#                                                                                  
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-
-#                                                                                  
-#
-#
-#   Module Name:
-#
-#     CpuIA32Lib.inf
-#
-#   Abstract:
-#
-#     Component description file for the Cpu IA32 library.
-#
-#--*/
-
-[defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = CpuIA32Lib
-  FILE_GUID                      = 98546178-64F1-4d2e-814F-6BF963DB7930
-  MODULE_TYPE                    = BASE
-  VERSION_STRING                 = 1.0
-  LIBRARY_CLASS                  = CpuIA32Lib
-  PI_SPECIFICATION_VERSION       = 0x0001000A
-
-[Sources]
-  EfiCpuVersion.c
-
-[Sources.IA32]
-  IA32/CpuIA32.c
-
-[Sources.X64]
-  X64/Cpu.asm
-  X64/Cpu.S
-
-[Packages]
-  MdePkg/MdePkg.dec
-  Vlv2TbltDevicePkg/PlatformPkg.dec
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c
deleted file mode 100644
index 935f11e8..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/EfiCpuVersion.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/** @file
-
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-                                                                                   
-
-Module Name:
-
-
-  EfiCpuVersion.c
-
-Abstract:
-
-  Provide cpu version extract considering extended family & model ID.
---*/
-
-#include <Library/CpuIA32.h>
-
-/**
-  Extract CPU detail version infomation
-
-  @param  FamilyId    FamilyId, including ExtendedFamilyId
-  @param  Model       Model, including ExtendedModel
-  @param  SteppingId  SteppingId
-  @param  Processor   Processor
-
-**/
-VOID
-EFIAPI
-EfiCpuVersion (
-  IN  OUT UINT16  *FamilyId,    OPTIONAL
-  IN  OUT UINT8   *Model,       OPTIONAL
-  IN  OUT UINT8   *SteppingId,  OPTIONAL
-  IN  OUT UINT8   *Processor    OPTIONAL
-  )
-
-{
-  EFI_CPUID_REGISTER Register;
-  UINT8              TempFamilyId;
-
-  EfiCpuid (EFI_CPUID_VERSION_INFO, &Register);
-
-  if (SteppingId != NULL) {
-    *SteppingId = (UINT8) (Register.RegEax & 0xF);
-  }
-
-  if (Processor != NULL) {
-    *Processor = (UINT8) ((Register.RegEax >> 12) & 0x3);
-  }
-
-  if (Model != NULL || FamilyId != NULL) {
-    TempFamilyId = (UINT8) ((Register.RegEax >> 8) & 0xF);
-
-    if (Model != NULL) {
-      *Model = (UINT8) ((Register.RegEax >> 4) & 0xF);
-      if (TempFamilyId == 0x6 || TempFamilyId == 0xF) {
-        *Model = (UINT8) (*Model  | ((Register.RegEax >> 12) & 0xF0));
-      }
-    }
-
-    if (FamilyId != NULL) {
-      *FamilyId = TempFamilyId;
-      if (TempFamilyId == 0xF) {
-        *FamilyId = (UINT8 ) (*FamilyId + (UINT16) ((Register.RegEax >> 20) & 0xFF));
-      }
-    }
-  }
-}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S
deleted file mode 100644
index ba1bd448..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.S
+++ /dev/null
@@ -1,223 +0,0 @@
-#
-#
-# Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
-#                                                                                  
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-
-#                                                                                  
-#
-#
-#Module Name:
-#
-#  CpuIA32.c
-#
-#Abstract:
-#
-#--*/
-
-##include "CpuIA32.h"
-#include "EfiBind.h"
-
-#---------------------------------------------------------------------------
-    .586p:
-    #.MODEL flat,C
-    .code:
-
-#---------------------------------------------------------------------------
-
-.globl ASM_PFX(EfiHalt)
-.globl ASM_PFX(EfiWbinvd)
-.globl ASM_PFX(EfiInvd)
-.globl ASM_PFX(EfiCpuid)
-.globl ASM_PFX(EfiReadMsr)
-.globl ASM_PFX(EfiWriteMsr)
-.globl ASM_PFX(EfiReadTsc)
-.globl ASM_PFX(EfiDisableCache)
-.globl ASM_PFX(EfiEnableCache)
-.globl ASM_PFX(EfiGetEflags)
-.globl ASM_PFX(EfiDisableInterrupts)
-.globl ASM_PFX(EfiEnableInterrupts)
-.globl ASM_PFX(EfiCpuidExt)
-
-
-#VOID
-#EfiHalt (
-#  VOID
-#)
-ASM_PFX(EfiHalt):
-    hlt
-    ret
-#EfiHalt ENDP
-
-#VOID
-#EfiWbinvd (
-#  VOID
-#)
-ASM_PFX(EfiWbinvd):
-    wbinvd
-    ret
-#EfiWbinvd ENDP
-
-#VOID
-#EfiInvd (
-# VOID
-#)
-ASM_PFX(EfiInvd):
-    invd
-    ret
-#EfiInvd ENDP
-
-#VOID
-#EfiCpuid (IN UINT32 RegisterInEax,
-#          OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
-ASM_PFX(EfiCpuid):
-    pushl %ebp
-    movl %esp, %ebp
-    pushl %ebx
-    pushl %esi
-    pushl %edi
-    pushal
-
-    movl   8(%ebp), %eax           #RegisterInEax
-    cpuid
-    cmpl   $0, 0xC(%ebp)           # Reg
-    je     L1
-    movl        0xC(%ebp), %edi         # Reg
-
-    movl        %eax, (%edi)        # Reg->RegEax
-    movl        %ebx, 4(%edi)         # Reg->RegEbx
-    movl        %ecx, 8(%edi)         # Reg->RegEcx
-    movl        %edx, 0xC(%edi)         # Reg->RegEdx
-
-L1:
-    popal
-    popl        %edi
-    popl        %esi
-    popl        %ebx
-    popl        %ebp
-
-    ret
-#EfiCpuid ENDP
-
-
-#UINT64
-#EfiReadMsr (
-#  IN UINT32 Index
-#  );
-ASM_PFX(EfiReadMsr):
-    movl   4(%esp), %ecx           # Index
-    rdmsr
-    ret
-#EfiReadMsr ENDP
-
-#VOID
-#EfiWriteMsr (
-#  IN   UINT32  Index,
-#  IN   UINT64  Value
-#  );
-ASM_PFX(EfiWriteMsr):
-    movl   4(%esp), %ecx         # Index
-    movl   8(%esp), %eax         # DWORD PTR Value[0]
-    movl   0xC(%esp), %edx         # DWORD PTR Value[4]
-    wrmsr
-    ret
-#EfiWriteMsr ENDP
-
-#UINT64
-#EfiReadTsc (
-#  VOID
-#  )
-ASM_PFX(EfiReadTsc):
-    rdtsc
-    ret
-#EfiReadTsc ENDP
-
-#VOID
-#EfiDisableCache (
-#  VOID
-#)
-ASM_PFX(EfiDisableCache):
-    movl  %cr0, %eax
-    bswapl %eax
-    andb  $0x60, %al
-    cmpb  $0x60, %al
-    je    L2
-    movl  %cr0, %eax
-    orl   $0x60000000, %eax
-    movl  %eax, %cr0
-    wbinvd
-L2:
-    ret
-#EfiDisableCache ENDP
-
-#VOID
-#EfiEnableCache (
-#  VOID
-#  )
-ASM_PFX(EfiEnableCache):
-    wbinvd
-    movl  %cr0, %eax
-    andl  $0x9fffffff, %eax
-    movl  %eax, %cr0
-    ret
-#EfiEnableCache ENDP
-
-#UINT32
-#EfiGetEflags (
-#  VOID
-#  )
-ASM_PFX(EfiGetEflags):
-    pushfl
-    popl %eax
-    ret
-#EfiGetEflags ENDP
-
-#VOID
-#EfiDisableInterrupts (
-#  VOID
-#  )
-ASM_PFX(EfiDisableInterrupts):
-    cli
-    ret
-#EfiDisableInterrupts ENDP
-
-#VOID
-#EfiEnableInterrupts (
-#  VOID
-#  )
-ASM_PFX(EfiEnableInterrupts):
-    sti
-    ret
-#EfiEnableInterrupts ENDP
-
-#VOID
-#EfiCpuidExt (
-#  IN   UINT32              RegisterInEax,
-#  IN   UINT32              CacheLevel,
-#  OUT  EFI_CPUID_REGISTER  *Regs
-#  )
-ASM_PFX(EfiCpuidExt):
-    push   %ebx
-    push   %edi
-    push   %esi
-    pushal
-
-    movl   0x30(%esp), %eax           # RegisterInEax
-    movl   0x34(%esp), %ecx           # CacheLevel
-    cpuid
-    movl   0x38(%esp), %edi           # DWORD PTR Regs
-
-    movl   %eax, (%edi)                 # Reg->RegEax
-    movl   %ebx, 4(%edi)                # Reg->RegEbx
-    movl   %ecx, 8(%edi)                # Reg->RegEcx
-    movl   %edx, 0xC(%edi)              # Reg->RegEdx
-
-    popal
-    pop    %esi
-    pop    %edi
-    pop    %ebx
-    ret
-#EfiCpuidExt ENDP
-
-
-
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm
deleted file mode 100644
index 3fdf16f8..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.asm
+++ /dev/null
@@ -1,206 +0,0 @@
-;
-; This file contains an 'Intel Sample Driver' and is
-; licensed for Intel CPUs and chipsets under the terms of your
-; license agreement with Intel or your vendor.  This file may
-; be modified by the user, subject to additional terms of the
-; license agreement
-;
-;
-; Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
-;                                                                                  
-; SPDX-License-Identifier: BSD-2-Clause-Patent
-
-;                                                                                  
-;
-
-;Module Name:
-;
-;  CpuIA32.c
-;
-;Abstract:
-;
-;--*/
-
-;#include "CpuIA32.h"
-
-;---------------------------------------------------------------------------
-    .586p
-    .model  flat,C
-    .code
-
-;---------------------------------------------------------------------------
-;VOID
-;EfiHalt (
-;  VOID
-;)
-EfiHalt PROC C PUBLIC
-    hlt
-    ret
-EfiHalt ENDP
-
-;VOID
-;EfiWbinvd (
-;  VOID
-;)
-EfiWbinvd PROC C PUBLIC
-    wbinvd
-    ret
-EfiWbinvd ENDP
-
-;VOID
-;EfiInvd (
-; VOID
-;)
-EfiInvd PROC C PUBLIC
-    invd
-    ret
-EfiInvd ENDP
-
-;VOID
-;EfiCpuid (IN UINT32 RegisterInEax,
-;          OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
-EfiCpuid PROC C PUBLIC
-    push ebp
-    mov  ebp, esp
-    push ebx
-    push esi
-    push edi
-    pushad
-
-    mov    eax, dword ptr[ebp + 8] ;egisterInEax
-    cpuid
-    cmp    dword ptr[ebp + 0Ch], 0 ; Reg
-    je     @F
-    mov         edi,dword ptr [ebp+0Ch] ; Reg
-
-    mov         dword ptr [edi],eax ; Reg->RegEax
-    mov         dword ptr [edi+4],ebx ; Reg->RegEbx
-    mov         dword ptr [edi+8],ecx ; Reg->RegEcx
-    mov         dword ptr [edi+0Ch],edx ; Reg->RegEdx
-
-@@:
-    popad
-    pop         edi
-    pop         esi
-    pop         ebx
-    pop         ebp
-
-    ret
-EfiCpuid ENDP
-
-
-;UINT64
-;EfiReadMsr (
-;  IN UINT32 Index
-;  );
-EfiReadMsr PROC C PUBLIC
-    mov    ecx, dword ptr [esp + 4]; Index
-    rdmsr
-    ret
-EfiReadMsr ENDP
-
-;VOID
-;EfiWriteMsr (
-;  IN   UINT32  Index,
-;  IN   UINT64  Value
-;  );
-EfiWriteMsr PROC C PUBLIC
-    mov    ecx, dword ptr [esp+4]; Index
-    mov    eax, dword ptr [esp+8]; DWORD PTR Value[0]
-    mov    edx, dword ptr [esp+0Ch]; DWORD PTR Value[4]
-    wrmsr
-    ret
-EfiWriteMsr  ENDP
-
-;UINT64
-;EfiReadTsc (
-;  VOID
-;  )
-EfiReadTsc PROC C PUBLIC
-    rdtsc
-    ret
-EfiReadTsc  ENDP
-
-;VOID
-;EfiDisableCache (
-;  VOID
-;)
-EfiDisableCache PROC C PUBLIC
-    mov   eax, cr0
-    bswap eax
-    and   al, 60h
-    cmp   al, 60h
-    je    @F
-    mov   eax, cr0
-    or    eax, 060000000h
-    mov   cr0, eax
-    wbinvd
-@@:
-    ret
-EfiDisableCache  ENDP
-
-;VOID
-;EfiEnableCache (
-;  VOID
-;  )
-EfiEnableCache PROC C PUBLIC
-    wbinvd
-    mov   eax, cr0
-    and   eax, 09fffffffh
-    mov   cr0, eax
-    ret
-EfiEnableCache  ENDP
-
-;UINT32
-;EfiGetEflags (
-;  VOID
-;  )
-EfiGetEflags PROC C PUBLIC
-    pushfd
-    pop  eax
-    ret
-EfiGetEflags  ENDP
-
-;VOID
-;EfiDisableInterrupts (
-;  VOID
-;  )
-EfiDisableInterrupts PROC C PUBLIC
-    cli
-    ret
-EfiDisableInterrupts  ENDP
-
-;VOID
-;EfiEnableInterrupts (
-;  VOID
-;  )
-EfiEnableInterrupts  PROC C PUBLIC
-    sti
-    ret
-EfiEnableInterrupts   ENDP
-
-;VOID
-;EfiCpuidExt (
-;  IN   UINT32              RegisterInEax,
-;  IN   UINT32              CacheLevel,
-;  OUT  EFI_CPUID_REGISTER  *Regs
-;  )
-EfiCpuidExt PROC C PUBLIC USES ebx edi esi
-    pushad
-
-    mov    eax, dword ptr [esp + 30h] ; RegisterInEax
-    mov    ecx, dword ptr [esp + 34h] ; CacheLevel
-    cpuid
-    mov    edi, dword ptr [esp + 38h] ; DWORD PTR Regs
-
-    mov    dword ptr [edi], eax   	; Reg->RegEax
-    mov    dword ptr [edi + 4], ebx   	; Reg->RegEbx
-    mov    dword ptr [edi + 8], ecx   	; Reg->RegEcx
-    mov    dword ptr [edi + 0Ch], edx   ; Reg->RegEdx
-
-    popad
-    ret
-EfiCpuidExt  ENDP
-
-	END
-
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c
deleted file mode 100644
index cb8de2f9..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/IA32/CpuIA32.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/** @file
-
-  Copyright (c) 2004  - 2014, Intel Corporation. All rights reserved.<BR>
-                                                                                   
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-
-                                                                                   
-
-Module Name:
-
-
-  CpuIA32.c
-
-Abstract:
-
---*/
-
-#include <Library/CpuIA32.h>
-
-VOID
-EfiHalt (VOID)
-{
-  __asm {
-    hlt
-  }
-}
-
-VOID
-EfiWbinvd (VOID)
-{
-  __asm {
-    wbinvd
-  }
-}
-
-VOID
-EfiInvd (VOID)
-{
-  __asm {
-    invd
-  }
-}
-
-VOID
-EfiCpuid (IN UINT32 RegisterInEax,
-          OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
-{
-  __asm {
-    pushad
-
-    mov    eax, RegisterInEax
-    cpuid
-    cmp    Reg, 0
-    je     _Exit
-    mov    edi, DWORD PTR Reg
-
-    mov    DWORD PTR [edi].RegEax, eax   ; Reg->RegEax
-    mov    DWORD PTR [edi].RegEbx, ebx   ; Reg->RegEbx
-    mov    DWORD PTR [edi].RegEcx, ecx   ; Reg->RegEcx
-    mov    DWORD PTR [edi].RegEdx, edx   ; Reg->RegEdx
-
-_Exit:
-     popad
-  }
-}
-
-UINT64
-EfiReadMsr (IN UINT32 Index)
-{
-  __asm {
-    mov    ecx, Index
-    rdmsr
-  }
-}
-
-VOID
-EfiWriteMsr (
-  IN   UINT32  Index,
-  IN   UINT64  Value
-  )
-{
-  __asm {
-    mov    ecx, Index
-    mov    eax, DWORD PTR Value[0]
-    mov    edx, DWORD PTR Value[4]
-    wrmsr
-  }
-}
-
-UINT64
-EfiReadTsc (VOID)
-{
-  __asm {
-    rdtsc
-  }
-}
-
-VOID
-EfiDisableCache (VOID)
-{
-  __asm {
-    mov   eax, cr0
-    bswap eax
-    and   al, 60h
-    cmp   al, 60h
-    je    Exit
-    mov   eax, cr0
-    or    eax, 060000000h
-    mov   cr0, eax
-    wbinvd
-Exit:
-  }
-}
-
-VOID
-EfiEnableCache (VOID)
-{
-  __asm {
-    wbinvd
-    mov   eax, cr0
-    and   eax, 09fffffffh
-    mov   cr0, eax
-  }
-}
-
-UINT32
-EfiGetEflags (
-  VOID
-  )
-{
-  __asm {
-    pushfd
-    pop  eax
-  }
-}
-
-VOID
-EfiDisableInterrupts (VOID)
-{
-  __asm {
-    cli
-  }
-}
-
-VOID
-EfiEnableInterrupts (
-  VOID
-  )
-{
-  __asm {
-    sti
-  }
-}
-
-VOID
-EfiCpuidExt (
-  IN   UINT32              RegisterInEax,
-  IN   UINT32              CacheLevel,
-  OUT  EFI_CPUID_REGISTER  *Regs
-  )
-{
-  __asm {
-    pushad
-
-    mov    eax, RegisterInEax
-    mov    ecx, CacheLevel
-    cpuid
-    mov    edi, DWORD PTR Regs
-
-    mov    DWORD PTR [edi].RegEax, eax   ; Reg->RegEax
-    mov    DWORD PTR [edi].RegEbx, ebx   ; Reg->RegEbx
-    mov    DWORD PTR [edi].RegEcx, ecx   ; Reg->RegEcx
-    mov    DWORD PTR [edi].RegEdx, edx   ; Reg->RegEdx
-
-    popad
-  }
-}
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S
deleted file mode 100644
index 3a8d6e6b..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.S
+++ /dev/null
@@ -1,207 +0,0 @@
-#
-#
-# Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
-#                                                                                  
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-
-#                                                                                  
-#
-#
-#*   Module Name:
-#*
-#*    Cpu.asm
-#*
-#*   Abstract:
-#*
-#------------------------------------------------------------------------------
-##include <EfiBind.h>
-
-.globl ASM_PFX(EfiHalt)
-.globl ASM_PFX(EfiWbinvd)
-.globl ASM_PFX(EfiInvd)
-.globl ASM_PFX(EfiCpuid)
-.globl ASM_PFX(EfiReadTsc)
-.globl ASM_PFX(EfiDisableCache)
-.globl ASM_PFX(EfiEnableCache)
-.globl ASM_PFX(EfiReadMsr)
-.globl ASM_PFX(EfiWriteMsr)
-.globl ASM_PFX(EfiGetEflags)
-.globl ASM_PFX(EfiDisableInterrupts)
-.globl ASM_PFX(EfiEnableInterrupts)
-.globl ASM_PFX(EfiCpuidExt)
-
-.text
-
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EfiHalt (
-#    VOID
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiHalt):
-    hlt
-    retq
-
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EfiWbinvd (
-#    VOID
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiWbinvd):
-    wbinvd
-    retq
-
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EfiInvd (
-#    VOID
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiInvd):
-    invd
-    retq
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EfiCpuid (
-#    IN   UINT32              RegisterInEax,          // rcx
-#    OUT  EFI_CPUID_REGISTER  *Reg           OPTIONAL // rdx
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiCpuid):
-      push   %rbx
-      mov    %rdx,%r8
-      mov    %rcx,%rax
-      cpuid
-      cmp    $0x0,%r8
-      je     _Exit
-      mov    %eax,(%r8)
-      mov    %ebx,0x4(%r8)
-      mov    %ecx,0x8(%r8)
-      mov    %edx,0xc(%r8)
-_Exit:
-      pop    %rbx
-      retq
-
-#------------------------------------------------------------------------------
-#  UINT64
-#  EfiReadMsr (
-#    IN   UINT32  Index,  // rcx
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiReadMsr):
-      rdmsr
-      shl    $0x20,%rdx
-      or     %rdx,%rax
-      retq
-
-#------------------------------------------------------------------------------
-#  VOID
-#  EfiWriteMsr (
-#    IN   UINT32  Index,  // rcx
-#    IN   UINT64  Value   // rdx
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiWriteMsr):
-      mov    %rdx,%rax
-      sar    $0x20,%rdx
-      wrmsr
-      retq
-
-#------------------------------------------------------------------------------
-# UINT64
-# EfiReadTsc (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EfiReadTsc):
-      rdtsc
-      shl    $0x20,%rax
-      shrd   $0x20,%rdx,%rax
-      retq
-
-#------------------------------------------------------------------------------
-# VOID
-# EfiDisableCache (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EfiDisableCache):
-# added a check to see if cache is already disabled. If it is, then skip.
-      mov    %cr0,%rax
-      and    $0x60000000,%rax
-      cmp    $0x0,%rax
-      jne    1f
-      mov    %cr0,%rax
-      or     $0x60000000,%rax
-      mov    %rax,%cr0
-      wbinvd
-1:
-      retq
-
-#------------------------------------------------------------------------------
-# VOID
-# EfiEnableCache (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EfiEnableCache):
-      wbinvd
-      mov    %cr0,%rax
-      and    $0xffffffff9fffffff,%rax
-      mov    %rax,%cr0
-      retq
-
-#------------------------------------------------------------------------------
-# UINTN
-# EfiGetEflags (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EfiGetEflags):
-      pushfq
-      pop    %rax
-      retq
-
-#------------------------------------------------------------------------------
-# VOID
-# EfiDisableInterrupts (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EfiDisableInterrupts):
-    cli
-    ret
-
-#------------------------------------------------------------------------------
-# VOID
-# EfiEnableInterrupts (
-#   VOID
-#   );
-#------------------------------------------------------------------------------
-ASM_PFX(EfiEnableInterrupts):
-    sti
-    ret
-#------------------------------------------------------------------------------
-#  VOID
-#  EfiCpuidExt (
-#    IN   UINT32              RegisterInEax,
-#    IN   UINT32              CacheLevel,
-#    OUT  EFI_CPUID_REGISTER  *Regs
-#    )
-#------------------------------------------------------------------------------
-ASM_PFX(EfiCpuidExt):
-      push   %rbx
-      mov    %rcx,%rax
-      mov    %rdx,%rcx
-      cpuid
-      mov    %eax,(%r8)
-      mov    %ebx,0x4(%r8)
-      mov    %ecx,0x8(%r8)
-      mov    %edx,0xc(%r8)
-      pop    %rbx
-      retq
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm b/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm
deleted file mode 100644
index 44aae7de..00000000
--- a/Platform/Intel/Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm
+++ /dev/null
@@ -1,222 +0,0 @@
-
-TITLE   Cpu.asm: Assembly code for the x64 resources
-
-;
-; This file contains an 'Intel Sample Driver' and is
-; licensed for Intel CPUs and chipsets under the terms of your
-; license agreement with Intel or your vendor.  This file may
-; be modified by the user, subject to additional terms of the
-; license agreement
-;
-;
-; Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
-;                                                                                  
-; SPDX-License-Identifier: BSD-2-Clause-Patent
-
-;                                                                                  
-;
-;
-;
-;
-;*   Module Name:
-;*
-;*    Cpu.asm
-;*
-;*   Abstract:
-;*
-;------------------------------------------------------------------------------
-
-text    SEGMENT
-
-
-;------------------------------------------------------------------------------
-;  VOID
-;  EfiHalt (
-;    VOID
-;    )
-;------------------------------------------------------------------------------
-EfiHalt PROC    PUBLIC
-    hlt
-    ret
-EfiHalt ENDP
-
-
-;------------------------------------------------------------------------------
-;  VOID
-;  EfiWbinvd (
-;    VOID
-;    )
-;------------------------------------------------------------------------------
-EfiWbinvd PROC    PUBLIC
-    wbinvd
-    ret
-EfiWbinvd ENDP
-
-
-;------------------------------------------------------------------------------
-;  VOID
-;  EfiInvd (
-;    VOID
-;    )
-;------------------------------------------------------------------------------
-EfiInvd PROC    PUBLIC
-    invd
-    ret
-EfiInvd ENDP
-
-;------------------------------------------------------------------------------
-;  VOID
-;  EfiCpuid (
-;    IN   UINT32              RegisterInEax,          // rcx
-;    OUT  EFI_CPUID_REGISTER  *Reg           OPTIONAL // rdx
-;    )
-;------------------------------------------------------------------------------
-EfiCpuid PROC   PUBLIC
-    push  rbx
-
-    mov   r8,   rdx         ; r8 = *Reg
-    mov   rax,  rcx         ; RegisterInEax
-    cpuid
-    cmp   r8,   0
-    je    _Exit
-    mov   [r8 +  0], eax    ; Reg->RegEax
-    mov   [r8 +  4], ebx    ; Reg->RegEbx
-    mov   [r8 +  8], ecx    ; Reg->RegEcx
-    mov   [r8 + 12], edx    ; Reg->RegEdx
-
-_Exit:
-    pop   rbx
-    ret
-EfiCpuid  ENDP
-
-;------------------------------------------------------------------------------
-;  UINT64
-;  EfiReadMsr (
-;    IN   UINT32  Index,  // rcx
-;    )
-;------------------------------------------------------------------------------
-EfiReadMsr PROC  PUBLIC
-    rdmsr
-    sal     rdx, 32   ; edx:eax -> rax
-    or      rax, rdx  ; rax = edx:eax
-    ret
-EfiReadMsr  ENDP
-
-;------------------------------------------------------------------------------
-;  VOID
-;  EfiWriteMsr (
-;    IN   UINT32  Index,  // rcx
-;    IN   UINT64  Value   // rdx
-;    )
-;------------------------------------------------------------------------------
-EfiWriteMsr PROC   PUBLIC
-    mov     rax,  rdx   ; rdx = Value
-    sar     rdx,  32    ; convert rdx to edx upper 32-bits
-    wrmsr               ; wrmsr[ecx] result = edx:eax
-    ret
-EfiWriteMsr  ENDP
-
-
-;------------------------------------------------------------------------------
-; UINT64
-; EfiReadTsc (
-;   VOID
-;   );
-;------------------------------------------------------------------------------
-EfiReadTsc PROC    PUBLIC
-    rdtsc
-    shl     rax, 32
-    shrd    rax, rdx, 32
-    ret
-EfiReadTsc  ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EfiDisableCache (
-;   VOID
-;   );
-;------------------------------------------------------------------------------
-EfiDisableCache PROC    PUBLIC
-; added a check to see if cache is already disabled. If it is, then skip.
-    mov   rax, cr0
-    and   rax, 060000000h
-    cmp   rax, 0
-    jne   @f
-    mov   rax, cr0
-    or    rax, 060000000h
-    mov   cr0, rax
-    wbinvd
-@@:
-    ret
-EfiDisableCache ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EfiEnableCache (
-;   VOID
-;   );
-;------------------------------------------------------------------------------
-EfiEnableCache PROC    PUBLIC
-    wbinvd
-    mov   rax, cr0
-    and   rax, 09fffffffh
-    mov   cr0, rax
-    ret
-EfiEnableCache ENDP
-
-;------------------------------------------------------------------------------
-; UINTN
-; EfiGetEflags (
-;   VOID
-;   );
-;------------------------------------------------------------------------------
-EfiGetEflags PROC    PUBLIC
-    pushfq
-    pop   rax
-    ret
-EfiGetEflags  ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EfiDisableInterrupts (
-;   VOID
-;   );
-;------------------------------------------------------------------------------
-EfiDisableInterrupts PROC    PUBLIC
-    cli
-    ret
-EfiDisableInterrupts  ENDP
-
-;------------------------------------------------------------------------------
-; VOID
-; EfiEnableInterrupts (
-;   VOID
-;   );
-;------------------------------------------------------------------------------
-EfiEnableInterrupts PROC    PUBLIC
-    sti
-    ret
-EfiEnableInterrupts  ENDP
-;------------------------------------------------------------------------------
-;  VOID
-;  EfiCpuidExt (
-;    IN   UINT32              RegisterInEax,
-;    IN   UINT32              CacheLevel,
-;    OUT  EFI_CPUID_REGISTER  *Regs
-;    )
-;------------------------------------------------------------------------------
-EfiCpuidExt PROC    PUBLIC
-     push   rbx
-     mov    rax, rcx          ; rax = RegisterInEax
-     mov    rcx, rdx          ; rcx = CacheLevel
-
-     cpuid
-     mov    [r8 + 0 ],  eax   ; Reg->RegEax
-     mov    [r8 + 4 ],  ebx   ; Reg->RegEbx
-     mov    [r8 + 8 ],  ecx   ; Reg->RegEcx
-     mov    [r8 + 12],  edx   ; Reg->RegEdx
-
-     pop rbx
-     ret
-EfiCpuidExt  ENDP
-END
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf b/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf
index c5e3cf4d..f1e8c7f6 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf
@@ -58,7 +58,6 @@
   gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam
 
 [Guids]
-  gEfiPlatformCpuInfoGuid
   gEfiStatusCodeDataTypeStringGuid              ## CONSUMES
 
 [Depex]
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c
index 074bf7de..61ecc52c 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/MemoryCallback.c
@@ -124,7 +124,8 @@ MemoryDiscoveredPpiNotifyCallback (
 {
   EFI_STATUS                  Status;
   EFI_BOOT_MODE               BootMode;
-  EFI_CPUID_REGISTER          FeatureInfo;
+  UINT32                      MaximumExtendedFunction;
+  CPUID_VIR_PHY_ADDRESS_SIZE_EAX  Eax;
   UINT8                       CpuAddressWidth;
   UINT16                      Pm1Cnt;
   EFI_PEI_HOB_POINTERS        Hob;
@@ -279,10 +280,10 @@ MemoryDiscoveredPpiNotifyCallback (
   // Create a CPU hand-off information
   //
   CpuAddressWidth = 32;
-  AsmCpuid (EFI_CPUID_EXTENDED_FUNCTION, &FeatureInfo.RegEax, &FeatureInfo.RegEbx, &FeatureInfo.RegEcx, &FeatureInfo.RegEdx);
-  if (FeatureInfo.RegEax >= EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE) {
-    AsmCpuid (EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE, &FeatureInfo.RegEax, &FeatureInfo.RegEbx, &FeatureInfo.RegEcx, &FeatureInfo.RegEdx);
-    CpuAddressWidth = (UINT8) (FeatureInfo.RegEax & 0xFF);
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaximumExtendedFunction, NULL, NULL, NULL);
+  if (MaximumExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Eax.Uint32, NULL, NULL, NULL);
+    CpuAddressWidth = (UINT8) (Eax.Bits.PhysicalAddressBits);
   }
 
   BuildCpuHob(CpuAddressWidth, 16);
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
index 6a2ecf8f..8c02adba 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
@@ -53,7 +53,7 @@ Abstract:
 #include <Library/BaseLib.h>
 #include <Library/PeiServicesLib.h>
 #include <Library/MtrrLib.h>
-#include <Library/CpuIA32.h>
+#include <Register/Cpuid.h>
 
 #include <IndustryStandard/Pci22.h>
 #include <Ppi/Speaker.h>
@@ -95,8 +95,6 @@ Abstract:
 #define SMBIOS_WAKEUP_TYPE_PCI_PME            0x07
 #define SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED  0x08
 
-#define EFI_CPUID_VIRT_PHYS_ADDRESS_SIZE       0x80000008
-
 //
 // Defines for stall ppi
 //
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
index eeb9a4a0..8350cf47 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf
@@ -78,7 +78,6 @@ ENTRY_POINT               = PlatformEarlyInitEntry
   gEfiSetupVariableGuid
   gEfiPlatformInfoGuid
   gEfiPlatformBootModeGuid
-  gEfiPlatformCpuInfoGuid
   gEfiGlobalVariableGuid
   gRecoveryOnFatFloppyDiskGuid
   gRecoveryOnFatUsbDiskGuid
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
index d3969f23..aac93b0b 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf
@@ -100,7 +100,6 @@
   gEfiSetupVariableGuid
   gEfiPlatformInfoGuid
   gEfiPlatformBootModeGuid
-  gEfiPlatformCpuInfoGuid
   gEfiGlobalVariableGuid
   gRecoveryOnFatFloppyDiskGuid
   gRecoveryOnFatUsbDiskGuid
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccIA32.dsc
new file mode 100644
index 00000000..7993ee57
--- /dev/null
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccIA32.dsc
@@ -0,0 +1,1335 @@
+#/** @file
+# Platform description.
+#
+# Copyright (c) 2012  - 2019, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+  PLATFORM_NAME                       = Vlv2TbltDevicePkg
+  PLATFORM_GUID                       = 465B0A0B-7AC1-443b-8F67-7B8DEC145F90
+  PLATFORM_VERSION                    = 0.1
+  DSC_SPECIFICATION                   = 0x00010005
+  OUTPUT_DIRECTORY                    = Build/Vlv2TbltDevicePkgIA32
+  SUPPORTED_ARCHITECTURES             = IA32
+  BUILD_TARGETS                       = DEBUG|RELEASE
+  SKUID_IDENTIFIER                    = DEFAULT
+
+  DEFINE RC_BINARY_RELEASE        = TRUE
+  #
+  # Platform On/Off features are defined here
+  #
+  #
+  # Platform Support:: Set only one token except Crestview Hills
+  #
+  #   3.BayleyBay
+  #     ENBDT_PF_ENABLE  = TRUE
+  #
+  !include Vlv2TbltDevicePkg/AutoPlatformCFG.txt
+  !include Vlv2TbltDevicePkg/PlatformPkgConfig.dsc
+
+!if $(X64_CONFIG) == TRUE
+  DEFINE      DXE_ARCHITECTURE        = X64
+!else
+  DEFINE      DXE_ARCHITECTURE        = IA32
+!endif
+
+  FLASH_DEFINITION                    = Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
+!if $(LFMA_ENABLE) == TRUE
+  FIX_LOAD_TOP_MEMORY_ADDRESS         = 0xFFFFFFFFFFFFFFFF
+  DEFINE   TOP_MEMORY_ADDRESS         = 0xFFFFFFFFFFFFFFFF
+!else
+  FIX_LOAD_TOP_MEMORY_ADDRESS         = 0x0
+  DEFINE   TOP_MEMORY_ADDRESS         = 0x0
+!endif
+
+  DEFINE   PLATFORM_PCIEXPRESS_BASE   = 0E0000000
+
+################################################################################
+#
+# SKU Identification section - list of all SKU IDs supported by this
+#                              Platform.
+#
+################################################################################
+[SkuIds]
+  0|DEFAULT              # The entry: 0|DEFAULT is reserved and always required.
+
+################################################################################
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+################################################################################
+[LibraryClasses.common]
+  #
+  # Entry point
+  #
+  PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+  UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+
+  #
+  # Basic
+  #
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+!if $(SSE2_ENABLE) == TRUE
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf
+!else
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
+!endif
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
+  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
+  PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
+  PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+!if $(RC_BINARY_RELEASE) == TRUE
+  PchPlatformLib|Vlv2TbltDevicePkg/Library/PchPlatformLib/PchPlatformLib.inf
+!endif
+  #
+  # UEFI & PI
+  #
+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+  UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
+  UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+  BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf
+  SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+  FlashDeviceLib|Vlv2TbltDevicePkg/Library/FlashDeviceLib/FlashDeviceLib.inf
+  UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+  #
+  # Framework
+  #
+!if $(S3_ENABLE) == TRUE
+  S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
+!else
+  S3BootScriptLib|MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf
+!endif
+  S3IoLib|MdePkg/Library/BaseS3IoLib/BaseS3IoLib.inf
+  S3PciLib|MdePkg/Library/BaseS3PciLib/BaseS3PciLib.inf
+
+  #
+  # Generic Modules
+  #
+!if $(USB_ENABLE) == TRUE
+  UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+!endif
+!if $(SCSI_ENABLE) == TRUE
+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+!endif
+
+  OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+!if $(CAPSULE_ENABLE) == TRUE
+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
+!else
+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+!endif
+  FmpAuthenticationLib|MdeModulePkg/Library/FmpAuthenticationLibNull/FmpAuthenticationLibNull.inf
+  IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
+  PlatformFlashAccessLib|Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.inf
+  MicrocodeFlashAccessLib|Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.inf
+  DisplayUpdateProgressLib|MdeModulePkg/Library/DisplayUpdateProgressLibGraphics/DisplayUpdateProgressLibGraphics.inf
+  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+  SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+  IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf
+  DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+
+  #
+  # CPU
+  #
+  MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
+  LocalApicLib|UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
+  CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+  MpInitLib|UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+
+  #
+  # ICH
+  #
+  SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
+  SmmLib|Vlv2TbltDevicePkg/Library/PchSmmLib/PchSmmLib.inf
+
+  #
+  # Platform
+  #
+  TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+  ResetSystemLib|Vlv2TbltDevicePkg/Library/ResetSystemLib/ResetSystemLib.inf
+
+  PlatformCmosLib|Vlv2TbltDevicePkg/Library/PlatformCmosLib/PlatformCmosLib.inf
+
+  #
+  # Misc
+  #
+  MonoStatusCodeLib|Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf
+!if $(TARGET) == RELEASE
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+!else
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+  SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+!endif
+
+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+!if $(TPM_ENABLED) == TRUE
+  TpmCommLib|SecurityPkg/Library/TpmCommLib/TpmCommLib.inf
+  Tpm12CommandLib|SecurityPkg/Library/Tpm12CommandLib/Tpm12CommandLib.inf
+  Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLibDTpm.inf
+
+!endif
+
+  PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf
+  DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf
+  SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+!else
+  PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+  DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+!endif
+
+  #
+  # CryptLib
+  #
+!if $(TPM_ENABLED) == TRUE
+  IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+  OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+!endif
+
+ BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf
+
+  StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+  OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+  IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+  PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
+  TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+  AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
+  FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+!else
+  TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+  AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+!endif
+  VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+  ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+  FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+  SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+!if $(NETWORK_ISCSI_ENABLE) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+  OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+  IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+!endif
+  TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+  Tcg2PhysicalPresenceLib|SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.inf
+  Tcg2PpVendorLib|SecurityPkg/Library/Tcg2PpVendorLibNull/Tcg2PpVendorLibNull.inf
+
+
+  Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf
+  BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
+
+[LibraryClasses.IA32.SEC]
+!if $(PERFORMANCE_ENABLE) == TRUE
+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+!endif
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+[LibraryClasses.IA32.PEIM, LibraryClasses.IA32.PEI_CORE, LibraryClasses.IA32.SEC]
+  #
+  # PEI phase common
+  #
+
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+  ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+  MultiPlatformLib|Vlv2TbltDevicePkg/Library/MultiPlatformLib/MultiPlatformLib.inf
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+  CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
+  MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+
+!if $(PERFORMANCE_ENABLE) == TRUE
+  PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf
+  TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+!endif
+
+!if $(TARGET) == RELEASE
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+!else
+  DebugLib|MdeModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+  SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+!endif
+
+  LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
+  HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.inf
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+!endif
+
+[LibraryClasses.IA32]
+  #
+  # DXE phase common
+  #
+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+
+  TcgPhysicalPresenceLib|SecurityPkg/Library/DxeTcgPhysicalPresenceLib/DxeTcgPhysicalPresenceLib.inf
+!if $(TPM_ENABLED) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+!endif
+
+  LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxDxeLib.inf
+  EfiRegTableLib|Vlv2TbltDevicePkg/Library/EfiRegTableLib/EfiRegTableLib.inf
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+!endif
+
+  HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.inf
+
+[LibraryClasses.IA32.DXE_DRIVER]
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+  CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+!if $(PERFORMANCE_ENABLE) == TRUE
+  PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf
+  TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+!endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+  FlashDeviceLib|Vlv2TbltDevicePkg/Library/FlashDeviceLib/FlashDeviceLibDxe.inf
+
+[LibraryClasses.IA32.DXE_CORE]
+  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+!if $(PERFORMANCE_ENABLE) == TRUE
+  PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+  TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+!endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+[LibraryClasses.IA32.DXE_SMM_DRIVER]
+  MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf
+  SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf
+  MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
+  LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf
+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+  SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
+  SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+  SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
+
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
+  !if $(TARGET) != RELEASE
+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+  !endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SmmDebugAgentLib.inf
+  TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+!endif
+  CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
+
+[LibraryClasses.IA32.SMM_CORE]
+  MemoryAllocationLib|MdeModulePkg/Library/PiSmmCoreMemoryAllocationLib/PiSmmCoreMemoryAllocationLib.inf
+  SmmServicesTableLib|MdeModulePkg/Library/PiSmmCoreSmmServicesTableLib/PiSmmCoreSmmServicesTableLib.inf
+  ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf
+  SmmCorePlatformHookLib|MdeModulePkg/Library/SmmCorePlatformHookLibNull/SmmCorePlatformHookLibNull.inf
+  SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
+
+!if $(TPM_ENABLED) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
+!endif
+
+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+
+!if $(TARGET) != RELEASE
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+
+[LibraryClasses.IA32.DXE_RUNTIME_DRIVER]
+  ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+!endif
+!if $(TPM_ENABLED) == TRUE
+  BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+!endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+!if $(CAPSULE_ENABLE) == TRUE
+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
+!endif
+
+[LibraryClasses.common.UEFI_DRIVER]
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+[LibraryClasses.IA32.UEFI_APPLICATION]
+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsFeatureFlag.common]
+!if $(MINI_BIOS_ENABLE) == FALSE
+  gPlatformModuleTokenSpaceGuid.PcdBdsDispatchAdditionalOprom|TRUE
+!else
+  gPlatformModuleTokenSpaceGuid.PcdBdsDispatchAdditionalOprom|FALSE
+!endif
+#
+# If PcdDxeIplSwitchToLongMode is TRUE, DxeIpl will load a 64-bit DxeCore and switch to long mode to hand over to DxeCore.
+#
+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE
+
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserGrayOutTextStatement|TRUE
+
+!if $(CAPSULE_RESET_ENABLE) == TRUE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|TRUE
+!else
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE
+!endif
+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
+!if $(TARGET) == RELEASE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
+!else
+  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
+!endif
+  gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
+!if $(ISA_SERIAL_STATUS_CODE_ENABLE) == TRUE
+  gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseIsaSerial|TRUE
+!else
+  gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseIsaSerial|FALSE
+!endif
+!if $(USB_SERIAL_STATUS_CODE_ENABLE) == TRUE
+  gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseUsbSerial|TRUE
+!else
+  gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseUsbSerial|FALSE
+!endif
+!if $(RAM_SERIAL_STATUS_CODE_ENABLE) == TRUE
+  gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam|TRUE
+!else
+  gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam|FALSE
+!endif
+
+
+!if $(VARIABLE_INFO_ENABLE) == TRUE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableCollectStatistics|TRUE
+!else
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableCollectStatistics|FALSE
+!endif
+
+!if $(SOURCE_DEBUG_ENABLE)
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|TRUE
+!endif
+
+  gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|TRUE
+
+[PcdsFixedAtBuild.common]
+!if $(SECURE_BOOT_ENABLE) == TRUE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x22000
+!else
+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x4000
+!endif
+  gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
+!if $(S4_ENABLE) == TRUE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|TRUE
+!else
+  gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!endif
+!if $(TARGET) == RELEASE
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
+!else
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+!endif
+!if $(PERFORMANCE_ENABLE) == TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|60
+!endif
+
+  gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
+  gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|2
+!endif
+
+  #
+  # Set SMM stack size to 16 KB.
+  #
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x4000
+
+  gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+
+  #
+  # Clear unused single certificate PCD
+  #
+  gEfiSecurityPkgTokenSpaceGuid.PcdPkcs7CertBuffer|{0}
+
+  #
+  # Lock all updatable firmware devices at End of DXE
+  #
+  gFmpDevicePkgTokenSpaceGuid.PcdFmpDeviceLockEventGuid|{GUID(gEfiEndOfDxeEventGroupGuid)}
+#  gFmpDevicePkgTokenSpaceGuid.PcdFmpDeviceLockEventGuid|{GUID(gEfiEventReadyToBootGuid)}
+
+  #
+  # Set PcdFmpDeviceTestKeySha256Digest to {0} to disable test key detection
+  #
+#  gFmpDevicePkgTokenSpaceGuid.PcdFmpDeviceTestKeySha256Digest|{0}
+
+[PcdsFixedAtBuild.IA32]
+!if $(TARGET) == RELEASE
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
+!else
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+!endif
+
+!if $(RECOVERY_ENABLE)
+  gEfiMdeModulePkgTokenSpaceGuid.PcdRecoveryFileName|L"VLV2REC.Cap"
+!endif
+
+[PcdsPatchableInModule.common]
+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803805c6
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x$(PLATFORM_PCIEXPRESS_BASE)
+
+  #######################################################################################################
+  #
+  # Begin of MRC parameters
+  #
+
+  ## Memory Parameter Patchable.
+  #  FALSE - MRC Parameters are fixed for MinnowBoard Max<BR>
+  #  TRUE  - MRC Parameters are patchable by following PCDs<BR>
+  # @Prompt Memory Parameter Patchable.
+  # @ValidList 0x80000001 | 0, 1
+  gVlvRefCodePkgTokenSpaceGuid.PcdMemoryParameterPatchable|FALSE
+
+  ## Memory Down or DIMM slot.
+  #  0 - DIMM<BR>
+  #  1 - Memory Down<BR>
+  # @Prompt Enable Memory Down
+  # @ValidList 0x80000001 | 0, 1
+  gVlvRefCodePkgTokenSpaceGuid.PcdEnableMemoryDown|1
+
+  ## The speed of DRAM.
+  #  0 - 800 MHz<BR>
+  #  1 - 1066 MHz<BR>
+  #  2 - 1333 MHz<BR>
+  #  3 - 1600 MHz<BR>
+  # @Prompt DRAM Speed
+  # @ValidList 0x80000001 | 0, 1, 2, 3
+  gVlvRefCodePkgTokenSpaceGuid.PcdDramSpeed|1
+
+  ## DRAM Type.
+  #  0 - DDR3<BR>
+  #  1 - DDR3L<BR>
+  #  2 - DDR3U<BR>
+  #  3 - DDR3All<BR>
+  #  4 - LPDDR2<BR>
+  #  5 - LPDDR3<BR>
+  #  6 - DDR4<BR>
+  # @Prompt DRAM Type
+  # @ValidList 0x80000001 | 0, 1, 2, 3, 4, 5, 6
+  gVlvRefCodePkgTokenSpaceGuid.PcdDramType|1
+
+  ## Please populate DIMM slot 0 if only one DIMM is supported.
+  #  0 - Disable<BR>
+  #  1 - Enable<BR>
+  # @Prompt DIMM 0 Enable
+  # @ValidList 0x80000001 | 0, 1
+  gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm0|1
+
+  ## DIMM 1 has to be identical to DIMM 0.
+  #  0 - Disable<BR>
+  #  1 - Enable<BR>
+  # @Prompt DIMM 1 Enable Type
+  # @ValidList 0x80000001 | 0, 1
+  gVlvRefCodePkgTokenSpaceGuid.PcdEnableDimm1|0
+
+  ## DRAM device data width.
+  #  0 - x8<BR>
+  #  1 - x16<BR>
+  #  2 - x32<BR>
+  # @Prompt DIMM_DWIDTH
+  # @ValidList 0x80000001 | 0, 1, 2
+  gVlvRefCodePkgTokenSpaceGuid.PcdDimmDataWidth|1
+
+  ## DRAM device data density.
+  #  0 - 1 Gbit<BR>
+  #  1 - 2 Gbit<BR>
+  #  2 - 4 Gbit<BR>
+  #  3 - 8 Gbit<BR>
+  # @Prompt DIMM_Density
+  # @ValidList 0x80000001 | 0, 1, 2, 3
+  gVlvRefCodePkgTokenSpaceGuid.PcdDimmDensity|2
+
+  ## DRAM device data bus width.
+  #  0 - 8 bits<BR>
+  #  1 - 16 bits<BR>
+  #  2 - 32 bits<BR>
+  #  3 - 64 bits<BR>
+  # @Prompt DIMM_BusWidth
+  # @ValidList 0x80000001 | 0, 1, 2, 3
+  gVlvRefCodePkgTokenSpaceGuid.PcdDimmBusWidth|3
+
+  ## Ranks Per DIMM or Sides Per DIMM.
+  #  0 - 1 Rank<BR>
+  #  1 - 2 Ranks<BR>
+  # @Prompt DIMM_Sides
+  # @ValidList 0x80000001 | 0, 1
+  gVlvRefCodePkgTokenSpaceGuid.PcdRankPerDimm|0
+
+  ## tCL.<BR><BR>
+  # @Prompt tCL
+  gVlvRefCodePkgTokenSpaceGuid.PcdTcl|11
+
+  ## tRP and tRCD in DRAM clk - 5:12.5ns, 6:15ns, etc.
+  # @Prompt tRP_tRCD
+  gVlvRefCodePkgTokenSpaceGuid.PcdTrpTrcd|11
+
+  ## tWR in DRAM clk.
+  # @Prompt tWR
+  gVlvRefCodePkgTokenSpaceGuid.PcdTwr|12
+
+  ## tWTR in DRAM clk.
+  # @Prompt tWTR
+  gVlvRefCodePkgTokenSpaceGuid.PcdTwtr|6
+
+  ## tRRD in DRAM clk.
+  # @Prompt tRRD
+  gVlvRefCodePkgTokenSpaceGuid.PcdTrrd|6
+
+  ## tRTP in DRAM clk.
+  # @Prompt tRTP
+  gVlvRefCodePkgTokenSpaceGuid.PcdTrtp|6
+
+  ## tFAW in DRAM clk.
+  # @Prompt tFAW
+  gVlvRefCodePkgTokenSpaceGuid.PcdTfaw|32
+
+  #
+  # End of MRC parameters.
+  #
+  ###############################################################################################
+
+[PcdsDynamicHii.common.DEFAULT]
+  gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
+  gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
+  gPlatformModuleTokenSpaceGuid.PcdBootState|L"BootState"|gPlatformModuleTokenSpaceGuid|0x0|TRUE
+
+[PcdsDynamicDefault.common.DEFAULT]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
+  !if $(TPM_ENABLED) == TRUE
+    gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x7b, 0x3a, 0xcd, 0x72, 0xA5, 0xFE, 0x5e, 0x4f, 0x91, 0x65, 0x4d, 0xd1, 0x21, 0x87, 0xbb, 0x13}
+  !endif
+
+  ## This PCD defines the video horizontal resolution.
+  #  This PCD could be set to 0 then video resolution could be at highest resolution.
+  #gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
+  ## This PCD defines the video vertical resolution.
+  #  This PCD could be set to 0 then video resolution could be at highest resolution.
+  #gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
+
+  ## This PCD defines the Console output column and the default value is 25 according to UEFI spec.
+  #  This PCD could be set to 0 then console output could be at max column and max row.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31
+  ## This PCD defines the Console output row and the default value is 80 according to UEFI spec.
+  #  This PCD could be set to 0 then console output could be at max column and max row.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100
+
+  ## The PCD is used to specify the video horizontal resolution of text setup.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|800
+  ## The PCD is used to specify the video vertical resolution of text setup.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|600
+  ## The PCD is used to specify the console output column of text setup.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|100
+  ## The PCD is used to specify the console output column of text setup.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|31
+
+!if $(TPM_ENABLED) == TRUE
+  gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+  gEfiSecurityPkgTokenSpaceGuid.PcdTpmScrtmPolicy|1
+!endif
+
+[PcdsDynamicExDefault.common.DEFAULT]
+  gEfiVLVTokenSpaceGuid.PcdTCSmbaIoBaseAddress|0x1040
+  gEfiVLVTokenSpaceGuid.PcdEmmcManufacturerId|0
+  gEfiVLVTokenSpaceGuid.PcdProductSerialNumber|0
+  gEfiVLVTokenSpaceGuid.PcdMeasuredBootEnable|TRUE
+  gEfiVLVTokenSpaceGuid.PcdFTPMErrorOccur|FALSE
+  gEfiVLVTokenSpaceGuid.PcdFTPMErrorSkip|FALSE
+  gEfiVLVTokenSpaceGuid.PcdFTPMCommand|0
+  gEfiVLVTokenSpaceGuid.PcdFTPMResponse|0
+  gEfiVLVTokenSpaceGuid.PcdFTPMNotRespond|FALSE
+  gEfiVLVTokenSpaceGuid.PcdFTPMStatus|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateSmmDataPtr|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0
+  gEfiVLVTokenSpaceGuid.PcdCpuLockBoxDataAddress|0
+  gEfiVLVTokenSpaceGuid.PcdCpuSmramCpuDataAddress|0
+  gEfiVLVTokenSpaceGuid.PcdCpuLockBoxSize|0
+  gEfiSecurityPkgTokenSpaceGuid.PcdUserPhysicalPresence|TRUE
+
+[PcdsDynamicExDefault.X64.DEFAULT]
+!if $(RECOVERY_ENABLE)
+  gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{GUID("AF9C9EB2-12AD-4D3E-A4D4-96F6C9966215")}|VOID*|0x10
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{GUID("4096267b-da0a-42eb-b5eb-fef31d207cb4")}|VOID*|0x10
+!endif
+
+[Components.IA32]
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
+
+  MdeModulePkg/Core/Pei/PeiMain.inf {
+!if $(TARGET) == DEBUG
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+!endif
+    <PcdsPatchableInModule>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+  }
+
+  Vlv2TbltDevicePkg/MonoStatusCode/MonoStatusCode.inf {
+!if $(TARGET) == DEBUG
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+!endif
+  }
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf {
+    <PcdsPatchableInModule>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+  }
+
+!if $(RC_BINARY_RELEASE) == TRUE
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
+!endif
+
+!if $(RC_BINARY_RELEASE) == TRUE
+  Vlv2TbltDevicePkg/PlatformPei/PlatformPei.inf {
+    <BuildOptions>
+      *_*_IA32_CC_FLAGS      = -DRC_BINARY_RELEASE
+  !if $(TARGET) == DEBUG
+      <PcdsFixedAtBuild>
+        gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+  !endif
+  }
+!endif
+
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf{
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+      DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+      PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
+      SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+    }
+!endif
+
+!if $(TPM_ENABLED) == TRUE
+  SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
+  SecurityPkg/Tcg/TcgPei/TcgPei.inf {
+    <LibraryClasses>
+      NULL|SecurityPkg/Library/HashInstanceLibSha1/HashInstanceLibSha1.inf
+      NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf
+      PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+}
+!endif
+
+ Vlv2TbltDevicePkg/PlatformInitPei/PlatformInitPei.inf {
+    <PcdsPatchableInModule>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803805c6
+    <LibraryClasses>
+!if $(TARGET) != RELEASE
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+      PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+  }
+  Vlv2TbltDevicePkg/FvInfoPei/FvInfoPei.inf
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
+!if $(PCIESC_ENABLE) == TRUE
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf {
+    <PcdsPatchableInModule>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+  }
+!endif
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
+
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
+  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
+  UefiCpuPkg/CpuIoPei/CpuIoPei.inf
+  UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
+  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
+
+!if $(RECOVERY_ENABLE)
+  #
+  # Recovery
+  #
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
+  MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
+  MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
+  MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
+  FatPkg/FatPei/FatPei.inf
+  MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
+  SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf {
+    <LibraryClasses>
+      FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibRsa2048Sha256/FmpAuthenticationLibRsa2048Sha256.inf
+      PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+  }
+!endif
+
+!if $(CAPSULE_ENABLE) == TRUE
+  MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+!endif
+  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
+    <LibraryClasses>
+!if $(LZMA_ENABLE) == TRUE
+    NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+!endif
+  }
+
+ MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
+
+!if $(TPM_ENABLED) == TRUE
+  SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+  }
+!endif
+!if $(ACPI50_ENABLE) == TRUE
+  MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf{
+    <LibraryClasses>
+      TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+  }
+
+!endif
+!if $(PERFORMANCE_ENABLE) == TRUE
+  MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
+!endif
+[Components.IA32]
+  #
+  # EDK II Related Platform codes
+  #
+  MdeModulePkg/Core/Dxe/DxeMain.inf {
+    <PcdsPatchableInModule>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+    <LibraryClasses>
+!if $(DXE_CRC32_SECTION_ENABLE) == TRUE
+      NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+!endif
+!if $(LZMA_ENABLE) == TRUE
+      NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+!endif
+!if $(TARGET) != RELEASE
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+  }
+  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  }
+  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+
+  MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+  MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf  {
+    <LibraryClasses>
+!if $(TARGET) != RELEASE
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+  }
+
+  MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
+  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf{
+    <LibraryClasses>
+!if $(SECURE_BOOT_ENABLE) == TRUE
+      NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
+!endif
+
+!if $(TPM_ENABLED) == TRUE
+      NULL|SecurityPkg/Library/DxeTpmMeasureBootLib/DxeTpmMeasureBootLib.inf
+!endif
+  }
+  MdeModulePkg/Universal/Metronome/Metronome.inf
+
+  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf {
+    <LibraryClasses>
+      PlatformBootManagerLib|Vlv2TbltDevicePkg/Library/DxePlatformBootManagerLib/DxePlatformBootManagerLib.inf
+      Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibTcg2/Tpm2DeviceLibTcg2.inf
+  }
+  MdeModulePkg/Logo/LogoDxe.inf
+  MdeModulePkg/Application/UiApp/UiApp.inf {
+    <LibraryClasses>
+      NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+      NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+      NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+  }
+
+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
+  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf {
+    <LibraryClasses>
+      NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+      SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+  }
+  Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbSmm.inf
+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+  SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf {
+    <LibraryClasses>
+      PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
+    <BuildOptions>
+      #
+      # Specify GUID gEfiIfrBootMaintenanceGuid, to install Secure Boot Configuration menu
+      # into Boot Maintenance Manager menu
+      #
+      *_*_*_VFR_FLAGS   = -g b2dedc91-d59f-48d2-898a-12490c74a4e0
+  }
+!endif
+   MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf {
+    <LibraryClasses>
+      FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+  }
+
+  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
+  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+
+  Vlv2TbltDevicePkg/FvbRuntimeDxe/FvbRuntimeDxe.inf
+
+  Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
+
+  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
+  PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf{
+    <PcdsPatchableInModule>
+        gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0xF0000043
+  }
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitSmm.inf
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
+
+!if $(PCIESC_ENABLE) == TRUE
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
+!endif
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
+
+  #
+  # Performance Application; Set PERFORMANCE_ENABLE=TRUE for normal boot performance and smm performance data
+  #
+!if $(PERFORMANCE_ENABLE) == TRUE
+  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf {
+    <PcdsFixedAtBuild>
+      gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+  }
+!endif
+
+  Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf{
+    <LibraryClasses>
+!if $(TARGET) != RELEASE
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  }
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
+
+!if $(TPM_ENABLED) == TRUE
+  SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+  }
+
+  SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+    <BuildOptions>
+      #
+      # specify GUID gEfiIfrNotInTPVPageGuid, this page will not
+      # be showed in TPV page.
+      #
+      *_*_*_VFR_FLAGS   = -g e58809f8-fbc1-48e2-883a-a30fdc4b441e
+  }
+
+  SecurityPkg/Tcg/TcgDxe/TcgDxe.inf {
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  }
+  SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
+!endif
+  #
+  # EDK II Related Platform codes
+  #
+  Vlv2TbltDevicePkg/PlatformSmm/PlatformSmm.inf{
+    <LibraryClasses>
+    !if $(TARGET) != RELEASE
+          DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+    !endif
+          PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  }
+  Vlv2TbltDevicePkg/PlatformInfoDxe/PlatformInfoDxe.inf
+  Vlv2TbltDevicePkg/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
+  Vlv2TbltDevicePkg/PlatformDxe/PlatformDxe.inf
+
+  Vlv2TbltDevicePkg/PciPlatform/PciPlatform.inf
+  Vlv2TbltDevicePkg/SaveMemoryConfig/SaveMemoryConfig.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
+  Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
+!if $(GOP_DRIVER_ENABLE) == TRUE
+  Vlv2TbltDevicePkg/PlatformGopPolicy/PlatformGopPolicy.inf
+
+!endif
+
+
+  #
+  # SMM
+  #
+  MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
+  MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
+  UefiCpuPkg/CpuDxe/CpuDxe.inf
+  UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
+  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+  UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
+  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
+  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/GraphicDxeInitSmm.inf
+
+  #
+  # ACPI
+  #
+   MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf {
+    <PcdsPatchableInModule>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0xF0000043
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+    <LibraryClasses>
+      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+  }
+  MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+
+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+  Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
+
+  Vlv2DeviceRefCodePkg/AcpiTablesPCAT/AcpiTables.inf
+
+  Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.inf
+
+  MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
+
+  #
+  # PCI
+  #
+  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+
+
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
+
+
+  #
+  # ISA
+  #
+  Vlv2TbltDevicePkg/PcuSio/PcuSio.inf
+  MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
+
+!if $(ACPI50_ENABLE) == TRUE
+  MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf {
+    <LibraryClasses>
+      TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+  }
+  MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf {
+    <LibraryClasses>
+      TimerLib|Vlv2TbltDevicePkg/Library/IntelPchAcpiTimerLib/IntelPchAcpiTimerLib.inf
+  }
+!endif
+
+#
+# eMMC/SD Card
+#
+  MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.inf
+  MdeModulePkg/Bus/Sd/EmmcDxe/EmmcDxe.inf
+  MdeModulePkg/Bus/Sd/SdDxe/SdDxe.inf
+
+#
+# IDE/SCSI/AHCI
+#
+  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+  FatPkg/EnhancedFatDxe/Fat.inf
+  ShellPkg/Application/Shell/Shell.inf {
+    <LibraryClasses>
+      ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+      NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
+      NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
+      HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+      PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+      BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
+    <PcdsFixedAtBuild>
+      gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
+      gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+      gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
+  }
+!if $(SATA_ENABLE) == TRUE
+  Vlv2SocBinPkg/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
+!endif
+  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+!if $(SCSI_ENABLE) == TRUE
+  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+!endif
+#
+# Console
+#
+  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+
+  #
+  # USB
+  #
+!if $(USB_ENABLE) == TRUE
+  MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+  MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+  MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+  MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+  MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+  MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
+  MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+
+!endif
+
+  #
+  # SMBIOS
+  #
+  MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+  Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
+
+  #
+  # CPU/FW Microde
+  #
+  Vlv2SocBinPkg/Microcode/MicrocodeUpdates.inf {
+    <BuildOptions>
+      *_*_*_GENFW_FLAGS = -a 0x800 -p 0xFF
+  }
+
+
+  #
+  # Network Stacks
+  #
+!include NetworkPkg/Network.dsc.inc
+
+!if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)
+  MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
+  MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
+!endif
+
+!if $(CAPSULE_ENABLE)
+  !include Vlv2TbltDevicePkg/FmpMinnowMaxSystem.dsc
+  !include Vlv2TbltDevicePkg/FmpGreenSampleDevice.dsc
+  !include Vlv2TbltDevicePkg/FmpBlueSampleDevice.dsc
+  !include Vlv2TbltDevicePkg/FmpRedSampleDevice.dsc
+!endif
+
+!if $(MICOCODE_CAPSULE_ENABLE)
+  IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf {
+    <LibraryClasses>
+      DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+      PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+      SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+  }
+!endif
+
+[BuildOptions]
+#
+# Define Build Options both for EDK and EDKII drivers.
+#
+
+#
+# Define token for different Platform
+#
+  DEFINE MINNOW2_FSP_OPTION =
+
+!if $(ENBDT_PF_BUILD) == TRUE
+  DEFINE ENBDT_PF_ENABLE = -DENBDT_PF_ENABLE=1
+!else
+  DEFINE ENBDT_PF_ENABLE = -DENBDT_PF_ENABLE=0
+!endif
+
+
+!if $(CLKGEN_CONFIG_EXTRA_ENABLE) == TRUE
+  DEFINE CLKGEN_CONFIG_EXTRA_BUILD_OPTION = -DCLKGEN_CONFIG_EXTRA=1
+!else
+  DEFINE CLKGEN_CONFIG_EXTRA_BUILD_OPTION =
+!endif
+
+
+
+!if $(PCIESC_ENABLE) == TRUE
+  DEFINE PCIESC_SUPPORT_BUILD_OPTION = -DPCIESC_SUPPORT=1
+!else
+  DEFINE PCIESC_SUPPORT_BUILD_OPTION =
+!endif
+!if $(SATA_ENABLE) == TRUE
+  DEFINE SATA_SUPPORT_BUILD_OPTION = -DSATA_SUPPORT=1
+!else
+  DEFINE SATA_SUPPORT_BUILD_OPTION =
+!endif
+!if $(ENBDT_S3_SUPPORT) == TRUE
+  DEFINE ENBDT_S3_SUPPORT_OPTIONS = -DNOCS_S3_SUPPORT
+!else
+  DEFINE ENBDT_S3_SUPPORT_OPTIONS =
+!endif
+
+!if $(X64_CONFIG) == TRUE
+  DEFINE X64_BUILD_ENABLE = -DX64_BUILD_ENABLE=1
+!else
+  DEFINE X64_BUILD_ENABLE =
+!endif
+
+!if $(TPM_ENABLED) == TRUE
+  DEFINE DSC_TPM_BUILD_OPTIONS = -DTPM_ENABLED
+!else
+  DEFINE DSC_TPM_BUILD_OPTIONS =
+!endif
+
+
+  DEFINE EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS = $(MINNOW2_FSP_OPTION) $(MINNOW2_BUILD_OPTION) $(ENBDT_PF_ENABLE) $(EXTERNAL_VGA_BUILD_OPTION) $(PCIE_ENUM_WA_BUILD_OPTION) $(X0_WA_ENABLE_BUILD_OPTION) $(A0_WA_ENABLE_BUILD_OPTION) $(MICROCODE_FREE_BUILD_OPTIONS) $(SIMICS_BUILD_OPTIONS) $(HYBRID_BUILD_OPTIONS) $(COMPACT_BUILD_OPTIONS) $(VP_BUILD_OPTIONS) $(SYSCTL_ID_BUILD_OPTION) $(CLKGEN_CONFIG_EXTRA_BUILD_OPTION) $(SYSCTL_X0_CONVERT_BOARD_OPTION) $(ENBDT_S3_SUPPORT_OPTIONS) $(SATA_SUPPORT_BUILD_OPTION) $(PCIESC_SUPPORT_BUILD_OPTION) $(DSC_FTPM_ERROR_WR_BUILD_OPTIONS) $(DSC_TPM_BUILD_OPTIONS) $(DSC_BYTI_SECURE_BOOT_BUILD_OPTIONS)
+!if $(PERFORMANCE_ENABLE) == TRUE
+  DEFINE PDB_BUILD_OPTION = /Zi
+!endif
+
+  GCC:*_*_*_CC_FLAGS = -Wno-missing-braces
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+  MSFT:*_*_X64_GENFW_FLAGS  = --keepexceptiontable
+  GCC:*_*_X64_GENFW_FLAGS   = --keepexceptiontable
+  INTEL:*_*_X64_GENFW_FLAGS = --keepexceptiontable
+  DEFINE SOURCE_LEVEL_DEBUG_BUILD_OPTIONS =
+!else
+  DEFINE SOURCE_LEVEL_DEBUG_BUILD_OPTIONS =
+
+!endif
+
+#
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level
+# protection of DXE_RUNTIME_DRIVER modules
+#
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+
+#
+# Force PE/COFF sections to be aligned at 4KB boundaries to support page level
+# protection of DXE_SMM_DRIVER/SMM_CORE modules
+#
+[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]
+  MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
+  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+
+[BuildOptions.Common.EDKII]
+  *_*_IA32_ASM_FLAGS     = $(VP_BUILD_OPTIONS) -D EDKII_GLUE_PciExpressBaseAddress=$(PLATFORM_PCIEXPRESS_BASE)h -DNOCS_S3_SUPPORT
+
+  *_*_IA32_CC_FLAGS      = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_IA32_VFRPP_FLAGS   = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_IA32_APP_FLAGS     = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_IA32_PP_FLAGS      = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_IA32_ASLPP_FLAGS   = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+
+  *_*_X64_CC_FLAGS       = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS) $(SOURCE_LEVEL_DEBUG_BUILD_OPTIONS)
+  *_*_X64_VFRPP_FLAGS    = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_X64_APP_FLAGS      = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_X64_PP_FLAGS       = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+  *_*_X64_ASLPP_FLAGS    = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
index 26c1caad..ee0d055d 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
@@ -222,7 +222,6 @@
 !endif
 
  BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf
- CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf
 
   StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
index dc6d8b1b..62ca4f67 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc
@@ -220,7 +220,6 @@
 !endif
 
  BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf
- CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf
 
   StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
index cbc87aa9..282ff3c2 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformPkgX64.dsc
@@ -222,7 +222,6 @@
 !endif
 
  BiosIdLib|BoardModulePkg/Library/BiosIdLib/DxeBiosIdLib.inf
- CpuIA32Lib|Vlv2TbltDevicePkg/Library/CpuIA32Lib/CpuIA32Lib.inf
 
   StallSmmLib|Vlv2TbltDevicePkg/Library/StallSmmLib/StallSmmLib.inf
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h
index b4a30511..1876977e 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.h
@@ -41,7 +41,6 @@
 #include <Library/DxeServicesTableLib.h>
 #include <Library/HiiLib.h>
 #include <Library/BiosIdLib.h>
-#include <Library/CpuIA32.h>
 #include <Library/HobLib.h>
 #include <Guid/PlatformInfo.h>
 #include <IndustryStandard/Pci22.h>
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
index 8ff24604..ce92b924 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/PlatformSetupDxe.inf
@@ -61,6 +61,7 @@
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
   SecurityPkg/SecurityPkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
   BoardModulePkg/BoardModulePkg.dec
   Vlv2TbltDevicePkg/PlatformPkg.dec
   Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec    #for PchAccess.h
@@ -79,7 +80,6 @@
   UefiRuntimeServicesTableLib
   PrintLib
   BiosIdLib
-  CpuIA32Lib
   IoLib
   HobLib
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
index be99356d..1770d0de 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PlatformSetupDxe/SetupInfoRecords.c
@@ -27,6 +27,8 @@ Revision History:
 #include <IndustryStandard/SmBios.h>
 #include <Library/IoLib.h>
 #include <Guid/GlobalVariable.h>
+#include <Register/Cpuid.h>
+#include <Register/Msr.h>
 
 #include "Valleyview.h"
 #include "VlvAccess.h"
@@ -74,7 +76,6 @@ SB_REV  SBRevisionTable[] = {
 #define PREFIX_ZERO   0x20
 
 #define ICH_REG_REV                 0x08
-#define MSR_IA32_PLATFORM_ID        0x17
 
 
 BOOLEAN                         mSetupInfoDone = FALSE;
@@ -495,7 +496,7 @@ UpdateAdditionalInformation (
       GetOptionalStringByIndex ((CHAR8*)((UINT8*)Type4Record + Type4Record->Hdr.Length), StrIndex, &ProcessorVersion);
       HiiSetString (mHiiHandle, STR_PROCESSOR_VERSION_VALUE, ProcessorVersion, NULL);
 
-      MicrocodeRevision = (UINT32) RShiftU64 (AsmReadMsr64 (EFI_MSR_IA32_BIOS_SIGN_ID), 32);
+      MicrocodeRevision = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32);
       UnicodeSPrint (NewString, sizeof (NewString), L"%8x", MicrocodeRevision);
       HiiSetString (mHiiHandle, STR_PROCESSOR_MICROCODE_VALUE, NewString, NULL);
     }
@@ -590,22 +591,29 @@ VOID
 UpdateCPUInformation ()
 {
   CHAR16								Buffer[40];
-  UINT16                                FamilyId;
-  UINT8                                 Model;
-  UINT8                                 SteppingId;
-  UINT8                                 ProcessorType;
+  UINT32                                FamilyId;
+  UINT32                                Model;
+  UINT32                                SteppingId;
   EFI_STATUS                            Status;
   EFI_MP_SERVICES_PROTOCOL              *MpService;
   UINTN                                 MaximumNumberOfCPUs;
   UINTN                                 NumberOfEnabledCPUs;
   UINT32								Buffer32 = 0xFFFFFFFF;   // Keep buffer with unknown device
-
-  EfiCpuVersion (&FamilyId, &Model, &SteppingId, &ProcessorType);
-
-  //
-  //we need raw Model data
-  //
-  Model = Model & 0xf;
+  CPUID_VERSION_INFO_EAX  Eax;
+  CPUID_VERSION_INFO_EBX  Ebx;
+  CPUID_VERSION_INFO_ECX  Ecx;
+  CPUID_VERSION_INFO_EDX  Edx;
+
+  AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx.Uint32);
+  FamilyId = Eax.Bits.FamilyId;
+  if (Eax.Bits.FamilyId == 0x0F) {
+    FamilyId |= (Eax.Bits.ExtendedFamilyId << 4);
+  }
+  Model = Eax.Bits.Model;
+  if (Eax.Bits.FamilyId == 0x06 || Eax.Bits.FamilyId == 0x0f) {
+    Model |= (Eax.Bits.ExtendedModelId << 4);
+  }
+  SteppingId = Eax.Bits.SteppingId;
 
   //
   //Family/Model/Step
@@ -633,7 +641,7 @@ UpdateCPUInformation ()
   //
   // Update Mobile / Desktop / Tablet SKU
   //
-  Buffer32 =(UINT32) RShiftU64 (EfiReadMsr (MSR_IA32_PLATFORM_ID), 50) & 0x07;
+  Buffer32 =(UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_PLATFORM_ID), 50) & 0x07;
 
   switch(Buffer32){
       case 0x0:
@@ -903,7 +911,7 @@ UpdatePlatformInformation (
   // VLV-QC Desktop       010
   // VLV-QC Notebook      011
   //
-  CpuFlavor = RShiftU64 (EfiReadMsr (MSR_IA32_PLATFORM_ID), 50) & 0x07;
+  CpuFlavor = RShiftU64 (AsmReadMsr64 (MSR_IA32_PLATFORM_ID), 50) & 0x07;
 
   switch(CpuFlavor){
     case 0x0:
@@ -1038,9 +1046,9 @@ UpdatePlatformInformation (
   //
   // Microcode Revision
   //
-  EfiWriteMsr (EFI_MSR_IA32_BIOS_SIGN_ID, 0);
-  EfiCpuid (EFI_CPUID_VERSION_INFO, NULL);
-  MicroCodeVersion = (UINT32) RShiftU64 (EfiReadMsr (EFI_MSR_IA32_BIOS_SIGN_ID), 32);
+  AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
+  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
+  MicroCodeVersion = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32);
   UnicodeSPrint (Buffer, sizeof (Buffer), L"%x", MicroCodeVersion);
   HiiSetString(mHiiHandle,STRING_TOKEN(STR_PROCESSOR_MICROCODE_VALUE), Buffer, NULL);
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
index 3583e324..4fd618a9 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
@@ -18,15 +18,12 @@ Abstract:
 #include <Protocol/MpService.h>
 #include <Library/BaseLib.h>
 #include <Library/DebugLib.h>
-#include <Library/CpuIA32.h>
+#include <Register/Cpuid.h>
+#include <Register/Msr.h>
 
 #include <PchRegs.h>
 #include <Library/PchPlatformLib.h>
 
-#define EFI_CPUID_FAMILY                      0x0F00
-#define EFI_CPUID_MODEL                       0x00F0
-#define EFI_CPUID_STEPPING                    0x000F
-
 EFI_STATUS 
 EFIAPI
 PpmPolicyEntry(
@@ -36,7 +33,6 @@ PpmPolicyEntry(
 {
   EFI_BOOT_SERVICES        *pBS;
   EFI_MP_SERVICES_PROTOCOL *MpService;
-  EFI_CPUID_REGISTER        Cpuid01 = { 0, 0, 0, 0};
   EFI_HANDLE                Handle;
   EFI_STATUS                Status;
   UINTN                     CpuCount;
@@ -70,13 +66,13 @@ PpmPolicyEntry(
   //
   // Store the CPUID for use by SETUP items.
   //
-  AsmCpuid (EFI_CPUID_VERSION_INFO, &Cpuid01.RegEax, &Cpuid01.RegEbx, &Cpuid01.RegEcx, &Cpuid01.RegEdx);
+  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
 
   mDxePlatformPpmPolicy.Revision                       = PPM_PLATFORM_POLICY_PROTOCOL_REVISION_4;
 
   //Read CPU Mobile feature from PLATFORM_ID_MSR MSR(0x17) NOTFB_I_AM_NOT_MOBILE_FUSE_CLIAMC00H Bit 28
   //Bit Description: { Disables Mobile features 0 = I am NOT a mobile part 1 = I am a mobile part (default)"}
-  CPUMobileFeature = ((RShiftU64 (AsmReadMsr64(EFI_MSR_IA32_PLATFORM_ID), 28)) & 0x1);
+  CPUMobileFeature = ((RShiftU64 (AsmReadMsr64(MSR_IA32_PLATFORM_ID), 28)) & 0x1);
 
   if (!EFI_ERROR(Status)) {
     if (CPUMobileFeature == 1){//CPU mobile feature
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
index 2c0a13f6..5bcce029 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.inf
@@ -27,6 +27,7 @@
 
 [Packages]
   MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
   Vlv2TbltDevicePkg/PlatformPkg.dec
   Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c
index 684cda83..d5a42436 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c
@@ -23,8 +23,9 @@ Abstract:
 
 #include "MiscSubclassDriver.h"
 #include <Library/PrintLib.h>
-#include <Library/CpuIA32.h>
 #include <Protocol/DxeSmmReadyToLock.h>
+#include <Register/Cpuid.h>
+#include <Register/Msr.h>
 
 
 VOID
@@ -32,18 +33,24 @@ GetCPUStepping ( )
 {
   CHAR16    Buffer[40];
 
-  UINT16                                FamilyId;
-  UINT8                                 Model;
-  UINT8                                 SteppingId;
-  UINT8                                 ProcessorType;
-
-
-  EfiCpuVersion (&FamilyId, &Model, &SteppingId, &ProcessorType);
-
-  //
-  //we need raw Model data
-  //
-  Model = Model & 0xf;
+  UINT32                                FamilyId;
+  UINT32                                Model;
+  UINT32                                SteppingId;
+  CPUID_VERSION_INFO_EAX  Eax;
+  CPUID_VERSION_INFO_EBX  Ebx;
+  CPUID_VERSION_INFO_ECX  Ecx;
+  CPUID_VERSION_INFO_EDX  Edx;
+
+  AsmCpuid (CPUID_VERSION_INFO, &Eax.Uint32, &Ebx.Uint32, &Ecx.Uint32, &Edx.Uint32);
+  FamilyId = Eax.Bits.FamilyId;
+  if (Eax.Bits.FamilyId == 0x0F) {
+    FamilyId |= (Eax.Bits.ExtendedFamilyId << 4);
+  }
+  Model = Eax.Bits.Model;
+  if (Eax.Bits.FamilyId == 0x06 || Eax.Bits.FamilyId == 0x0f) {
+    Model |= (Eax.Bits.ExtendedModelId << 4);
+  }
+  SteppingId = Eax.Bits.SteppingId;
 
   //
   //Family/Model/Step
@@ -243,9 +250,9 @@ GetUcodeVersion()
   //
   // Microcode Revision
   //
-  EfiWriteMsr (EFI_MSR_IA32_BIOS_SIGN_ID, 0);
-  EfiCpuid (EFI_CPUID_VERSION_INFO, NULL);
-  MicroCodeVersion = (UINT32) RShiftU64 (EfiReadMsr (EFI_MSR_IA32_BIOS_SIGN_ID), 32);
+  AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
+  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
+  MicroCodeVersion = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32);
   UnicodeSPrint (Buffer, sizeof (Buffer), L"%x", MicroCodeVersion);
   HiiSetString(mHiiHandle,STRING_TOKEN(STR_MISC_UCODE_VERSION), Buffer, NULL);
 }
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
index 97a782e3..f1bb15ae 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x94Function.c
@@ -29,7 +29,6 @@ Abstract:
 #include <Protocol/I2cBus.h>
 
 #include <Library/IoLib.h>
-#include <Library/CpuIA32.h>
 #include <Library/UefiRuntimeServicesTableLib.h>
 #include <Guid/PlatformInfo.h>
 #include <Guid/SetupVariable.h>
@@ -73,7 +72,6 @@ SB_REV  SBRevisionTable[] = {
 #define PREFIX_ZERO   0x20
 
 #define ICH_REG_REV                 0x08
-#define MSR_IA32_PLATFORM_ID        0x17
 #define CHARACTER_NUMBER_FOR_VALUE  30
 
 
@@ -565,7 +563,7 @@ UpdatePlatformInformation (
   //
   //CPU flavor
   //
-  CpuFlavor = RShiftU64 (EfiReadMsr (MSR_IA32_PLATFORM_ID), 50) & 0x07;
+  CpuFlavor = RShiftU64 (AsmReadMsr64 (MSR_IA32_PLATFORM_ID), 50) & 0x07;
 
   switch(CpuFlavor){
     case 0x0:
@@ -661,9 +659,9 @@ UpdatePlatformInformation (
   //
   // Microcode Revision
   //
-  EfiWriteMsr (EFI_MSR_IA32_BIOS_SIGN_ID, 0);
-  EfiCpuid (EFI_CPUID_VERSION_INFO, NULL);
-  MicroCodeVersion = (UINT32) RShiftU64 (EfiReadMsr (EFI_MSR_IA32_BIOS_SIGN_ID), 32);
+  AsmWriteMsr64 (MSR_IA32_BIOS_SIGN_ID, 0);
+  AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, NULL);
+  MicroCodeVersion = (UINT32) RShiftU64 (AsmReadMsr64 (MSR_IA32_BIOS_SIGN_ID), 32);
   UnicodeSPrint (Buffer, sizeof (Buffer), L"%x", MicroCodeVersion);
   HiiSetString(mHiiHandle,STRING_TOKEN(STR_MISC_PROCESSOR_MICROCODE_VALUE), Buffer, NULL);
 
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
index e71a03ce..8a52d017 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
@@ -20,7 +20,6 @@ Abstract:
 #include "MiscSubclassDriver.h"
 
 #include <Protocol/MpService.h>
-#include <Library/CpuIA32.h>
 #include <Library/TimerLib.h>
 #include <Register/Cpuid.h>
 
@@ -102,7 +101,7 @@ DetermineiFsbFromMsr (
   // Determine the processor core frequency
   //
   UINT64	Temp;
-  Temp = (EfiReadMsr (BSEL_CR_OVERCLOCK_CONTROL)) & FUSE_BSEL_MASK;
+  Temp = (AsmReadMsr64 (BSEL_CR_OVERCLOCK_CONTROL)) & FUSE_BSEL_MASK;
   return miFSBFrequencyTable[(UINT32)(Temp)];
 
 }
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
index 016fb53b..94d9cd67 100644
--- a/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
+++ b/Platform/Intel/Vlv2TbltDevicePkg/SmBiosMiscDxe/SmBiosMiscDxe.inf
@@ -103,7 +103,6 @@
   UefiLib
   BiosIdLib
   PrintLib
-  CpuIA32Lib
   PchPlatformLib
   NetLib
   HobLib
diff --git a/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh b/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh
index 03fa0623..1705b162 100755
--- a/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh
+++ b/Platform/Intel/Vlv2TbltDevicePkg/bld_vlv.sh
@@ -104,6 +104,9 @@ for (( i=1; i<=$#; ))
     elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/X64" ]; then
       Arch=X64
       shift
+    elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/IA32" ]; then
+      Arch=IA32
+      shift
     elif [ "$(echo $1 | tr 'a-z' 'A-Z')" == "/YL" ]; then
       SpiLock=1
       shift      
@@ -243,11 +246,11 @@ build
 ##**********************************************************************
 echo Skip "Running fce..."
 
+cp -f $BUILD_PATH/FV/VLV.fd $BUILD_PATH/FV/Vlv.ROM
+
 ##**********************************************************************
 ## Build Capsules
 ##**********************************************************************
-cp -f $WORKSPACE/Build/Vlv2TbltDevicePkg/${TARGET}_${TOOL_CHAIN_TAG}/FV/VLV.fd \
-      $WORKSPACE/Build/Vlv2TbltDevicePkg/${TARGET}_${TOOL_CHAIN_TAG}/FV/Vlv.ROM
 build -p $PLATFORM_PKG_PATH/PlatformCapsuleGcc.dsc
 
 echo
author	Michael D Kinney <michael.d.kinney@intel.com>	2019-07-08 15:03:25 -0700
committer	Michael D Kinney <michael.d.kinney@intel.com>	2019-07-12 17:29:41 -0700
commit	6a728b4b7d6b45a9e044f3fe261f732b0f1958e2 (patch)
tree	3138c3e75130b03a4474c52ce1e97c4860941028
parent	e286c36ae4c07cfa6496e779dae2616eb34f6f3c (diff)