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authorAndrei Warkentin <andrey.warkentin@gmail.com>2020-03-26 11:53:22 +0000
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2020-03-26 13:34:55 +0100
commitfcc2a81066a24abac8673c901402316b6b252415 (patch)
tree36873960eee2809bfdd8364a45c1f7b2bd897bb7
parent02a758c5fcd67a29d4902e85a627f86313fcdc8e (diff)
Platform/RPi/AcpiTables: Describe DMA constraints for devices behind GPU
Legacy devices on a Raspberry Pi sit behind GPU/VideoCore and can only address the first GB of RAM. This address range of 0xc0000000-0xffffffff requires a translation, since it is aliased to the first GB of memory 0x00000000-0x3fffffff, which is what this commit accomplishes by introducing a new "GDV0" device along with a "_DMA" ResourceTemplate that performs the address translation. Note that this translation does not apply to the ARM cores, PCIe, GENET, and 40-bit DMA channels, that all have a wider view of the address space. Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
-rw-r--r--Platform/RaspberryPi/AcpiTables/Dsdt.asl139
-rw-r--r--Platform/RaspberryPi/AcpiTables/GpuDevs.asl24
2 files changed, 149 insertions, 14 deletions
diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/AcpiTables/Dsdt.asl
index 6b0fb716..95766b00 100644
--- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl
+++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl
@@ -3,7 +3,7 @@
* Differentiated System Definition Table (DSDT)
*
* Copyright (c) 2020, Pete Batard <pete@akeo.ie>
- * Copyright (c) 2018, Andrey Warkentin <andrey.warkentin@gmail.com>
+ * Copyright (c) 2018-2020, Andrey Warkentin <andrey.warkentin@gmail.com>
* Copyright (c) Microsoft Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -14,6 +14,8 @@
#include <IndustryStandard/Bcm2836Gpio.h>
#include <IndustryStandard/Bcm2836Gpu.h>
#include <IndustryStandard/Bcm2836Pwm.h>
+#include <IndustryStandard/Bcm2836Sdio.h>
+#include <IndustryStandard/Bcm2836SdHost.h>
#include <Net/Genet.h>
#include "AcpiTables.h"
@@ -25,6 +27,25 @@
#define BCM_ALT4 0x3
#define BCM_ALT5 0x2
+//
+// The ASL compiler does not support argument arithmetic in functions
+// like QWordMemory (). So we need to instantiate dummy qword regions
+// that we can then update the Min, Max and Length attributes of.
+// The two macros below help accomplish this.
+//
+#define QWORDMEMORYBUF(Index) \
+ QWordMemory (ResourceProducer,, \
+ MinFixed, MaxFixed, NonCacheable, ReadWrite, \
+ 0x0, 0x0, 0x0, 0x0, 0x1,,, RB ## Index)
+
+#define QWORDMEMORYSET(Index, Offset, Length) \
+ CreateQwordField (RBUF, RB ## Index._MIN, MI ## Index) \
+ CreateQwordField (RBUF, RB ## Index._MAX, MA ## Index) \
+ CreateQwordField (RBUF, RB ## Index._LEN, LE ## Index) \
+ Store (Length, LE ## Index) \
+ Add (BCM2836_SOC_REGISTERS, Offset, MI ## Index) \
+ Add (MI ## Index, LE ## Index - 1, MA ## Index)
+
DefinitionBlock ("Dsdt.aml", "DSDT", 5, "RPIFDN", "RPI", 2)
{
Scope (\_SB_)
@@ -74,7 +95,121 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "RPIFDN", "RPI", 2)
}
}
- include ("GpuDevs.asl")
+ //
+ // GPU device container describes the DMA translation required
+ // when a device behind the GPU wants to access Arm memory.
+ // Only the first GB can be addressed.
+ //
+ Device (GDV0)
+ {
+ Name (_HID, "ACPI0004")
+ Name (_UID, 0x1)
+ Name (_CCA, 0x0)
+
+ Method (_CRS, 0, Serialized) {
+ //
+ // Container devices with _DMA must have _CRS, meaning GDV0
+ // to provide all resources that GpuDevs.asl consume (except
+ // interrupts).
+ //
+ Name (RBUF, ResourceTemplate () {
+ QWORDMEMORYBUF(01)
+ QWORDMEMORYBUF(02)
+ QWORDMEMORYBUF(03)
+ // QWORDMEMORYBUF(04)
+ // QWORDMEMORYBUF(05)
+ QWORDMEMORYBUF(06)
+ QWORDMEMORYBUF(07)
+ QWORDMEMORYBUF(08)
+ QWORDMEMORYBUF(09)
+ QWORDMEMORYBUF(10)
+ QWORDMEMORYBUF(11)
+ QWORDMEMORYBUF(12)
+ QWORDMEMORYBUF(13)
+ QWORDMEMORYBUF(14)
+ QWORDMEMORYBUF(15)
+ // QWORDMEMORYBUF(16)
+ QWORDMEMORYBUF(17)
+ QWORDMEMORYBUF(18)
+ QWORDMEMORYBUF(19)
+ QWORDMEMORYBUF(20)
+ QWORDMEMORYBUF(21)
+ QWORDMEMORYBUF(22)
+ QWORDMEMORYBUF(23)
+ QWORDMEMORYBUF(24)
+ QWORDMEMORYBUF(25)
+ })
+
+ // USB
+ QWORDMEMORYSET(01, BCM2836_USB_OFFSET, BCM2836_USB_LENGTH)
+
+ // GPU
+ QWORDMEMORYSET(02, BCM2836_V3D_BUS_OFFSET, BCM2836_V3D_BUS_LENGTH)
+ QWORDMEMORYSET(03, BCM2836_HVS_OFFSET, BCM2836_HVS_LENGTH)
+ // QWORDMEMORYSET(04, BCM2836_PV0_OFFSET, BCM2836_PV0_LENGTH)
+ // QWORDMEMORYSET(05, BCM2836_PV1_OFFSET, BCM2836_PV1_LENGTH)
+ QWORDMEMORYSET(06, BCM2836_PV2_OFFSET, BCM2836_PV2_LENGTH)
+ QWORDMEMORYSET(07, BCM2836_HDMI0_OFFSET, BCM2836_HDMI0_LENGTH)
+ QWORDMEMORYSET(08, BCM2836_HDMI1_OFFSET, BCM2836_HDMI1_LENGTH)
+
+ // Mailbox
+ QWORDMEMORYSET(09, BCM2836_MBOX_OFFSET, BCM2836_MBOX_LENGTH)
+
+ // VCHIQ
+ QWORDMEMORYSET(10, BCM2836_VCHIQ_OFFSET, BCM2836_VCHIQ_LENGTH)
+
+ // GPIO
+ QWORDMEMORYSET(11, GPIO_OFFSET, GPIO_LENGTH)
+
+ // I2C
+ QWORDMEMORYSET(12, BCM2836_I2C1_OFFSET, BCM2836_I2C1_LENGTH)
+ QWORDMEMORYSET(13, BCM2836_I2C2_OFFSET, BCM2836_I2C2_LENGTH)
+
+ // SPI
+ QWORDMEMORYSET(14, BCM2836_SPI0_OFFSET, BCM2836_SPI0_LENGTH)
+ QWORDMEMORYSET(15, BCM2836_SPI1_OFFSET, BCM2836_SPI1_LENGTH)
+ // QWORDMEMORYSET(16, BCM2836_SPI2_OFFSET, BCM2836_SPI2_LENGTH)
+
+ // PWM
+ QWORDMEMORYSET(17, BCM2836_PWM_DMA_OFFSET, BCM2836_PWM_DMA_LENGTH)
+ QWORDMEMORYSET(18, BCM2836_PWM_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH)
+ QWORDMEMORYSET(19, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH)
+ QWORDMEMORYSET(20, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH)
+ QWORDMEMORYSET(21, BCM2836_PWM_CLK_OFFSET, BCM2836_PWM_CLK_LENGTH)
+
+ // UART
+ QWORDMEMORYSET(22, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH)
+ QWORDMEMORYSET(23, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH)
+
+ // SDC
+ QWORDMEMORYSET(24, MMCHS1_OFFSET, MMCHS1_LENGTH)
+ QWORDMEMORYSET(25, SDHOST_OFFSET, SDHOST_LENGTH)
+
+ Return (RBUF)
+ }
+
+ Name (_DMA, ResourceTemplate() {
+ //
+ // Only the first GB is available.
+ // Bus 0xC0000000 -> CPU 0x00000000.
+ //
+ QWordMemory (ResourceConsumer,
+ ,
+ MinFixed,
+ MaxFixed,
+ NonCacheable,
+ ReadWrite,
+ 0x0,
+ 0x00000000C0000000, // MIN
+ 0x00000000FFFFFFFF, // MAX
+ 0xFFFFFFFF40000000, // TRA
+ 0x0000000040000000, // LEN
+ ,
+ ,
+ )
+ })
+ include ("GpuDevs.asl")
+ }
#if (RPI_MODEL == 4)
Device (ETH0)
diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
index 99f03333..966a94cd 100644
--- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
+++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
@@ -75,8 +75,8 @@ Device (GPU0)
// Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_HDMI1_INTERRUPT }
// HDMI DDC connection
- I2CSerialBus (0x50,, 100000,, "\\_SB.I2C2",,,,) // EDID
- I2CSerialBus (0x30,, 100000,, "\\_SB.I2C2",,,,) // E-DDC Segment Pointer
+ I2CSerialBus (0x50,, 100000,, "\\_SB.GDV0.I2C2",,,,) // EDID
+ I2CSerialBus (0x30,, 100000,, "\\_SB.GDV0.I2C2",,,,) // E-DDC Segment Pointer
})
Method (_CRS, 0x0, Serialized)
{
@@ -167,7 +167,7 @@ Device (VCIQ)
Name (_CID, "VCIQ")
Name (_UID, 0)
Name (_CCA, 0x0)
- Name (_DEP, Package() { \_SB.RPIQ })
+ Name (_DEP, Package() { \_SB.GDV0.RPIQ })
Method (_STA)
{
Return (0xf)
@@ -192,7 +192,7 @@ Device (VCSM)
Name (_CID, "VCSM")
Name (_UID, 0)
Name (_CCA, 0x0)
- Name (_DEP, Package() { \_SB.VCIQ })
+ Name (_DEP, Package() { \_SB.GDV0.VCIQ })
Method (_STA)
{
Return (0xf)
@@ -241,7 +241,7 @@ Device (I2C1)
{
MEMORY32FIXED (ReadWrite, 0, BCM2836_I2C1_LENGTH, RMEM)
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { BCM2836_I2C1_INTERRUPT }
- PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 2, 3 }
+ PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, ResourceConsumer, , ) { 2, 3 }
})
Method (_CRS, 0x0, Serialized)
{
@@ -289,9 +289,9 @@ Device (SPI0)
{
MEMORY32FIXED (ReadWrite, 0, BCM2836_SPI0_LENGTH, RMEM)
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared) { BCM2836_SPI0_INTERRUPT }
- PinFunction (Exclusive, PullDown, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 9, 10, 11 } // MISO, MOSI, SCLK
- PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 8 } // CE0
- PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 7 } // CE1
+ PinFunction (Exclusive, PullDown, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, ResourceConsumer, , ) { 9, 10, 11 } // MISO, MOSI, SCLK
+ PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, ResourceConsumer, , ) { 8 } // CE0
+ PinFunction (Exclusive, PullUp, BCM_ALT0, "\\_SB.GDV0.GPI0", 0, ResourceConsumer, , ) { 7 } // CE1
})
Method (_CRS, 0x0, Serialized)
@@ -307,7 +307,7 @@ Device (SPI1)
Name (_CID, "BCMAUXSPI")
Name (_UID, 0x1)
Name (_CCA, 0x0)
- Name (_DEP, Package() { \_SB.RPIQ })
+ Name (_DEP, Package() { \_SB.GDV0.RPIQ })
Method (_STA)
{
Return (0xf)
@@ -316,8 +316,8 @@ Device (SPI1)
{
MEMORY32FIXED (ReadWrite, 0, BCM2836_SPI1_LENGTH, RMEM)
Interrupt (ResourceConsumer, Level, ActiveHigh, Shared,) { BCM2836_SPI1_INTERRUPT }
- PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 19, 20, 21 } // MISO, MOSI, SCLK
- PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB.GPI0", 0, ResourceConsumer, , ) { 16 } // CE2
+ PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB.GDV0.GPI0", 0, ResourceConsumer, , ) { 19, 20, 21 } // MISO, MOSI, SCLK
+ PinFunction (Exclusive, PullDown, BCM_ALT4, "\\_SB.GDV0.GPI0", 0, ResourceConsumer, , ) { 16 } // CE2
})
Method (_CRS, 0x0, Serialized)
@@ -334,7 +334,7 @@ Device (SPI1)
// Name (_CID, "BCMAUXSPI")
// Name (_UID, 0x2)
// Name (_CCA, 0x0)
-// Name (_DEP, Package() { \_SB.RPIQ })
+// Name (_DEP, Package() { \_SB.GDV0.RPIQ })
// Method (_STA)
// {
// Return (0xf) // Disabled