Platform/ARM/Sgi: Add ACPI tables for Rd-Daniel Config-M

Add Madt and Dsdt ACPI tables that are specific for RD-Daniel Config-M
platform. Reuse the rest of the shared ACPI tables in SgiPkg.

Change-Id: I82f0eaaae6bb4cd515e04ed0a6f8a039c63cf557
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

3 files changed, 322 insertions, 0 deletions

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
new file mode 100644
index 00000000..57873ef5
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Dsdt.asl
@@ -0,0 +1,118 @@
+/** @file

+*  Differentiated System Description Table Fields (DSDT)

+*

+*  Copyright (c) 2020, ARM Ltd. All rights reserved.

+*

+*  This program and the accompanying materials are licensed and made available

+*  under the terms and conditions of the BSD License which accompanies this

+*  distribution.  The full text of the license may be found at

+*  http://opensource.org/licenses/bsd-license.php

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+*

+**/

+

+#include "SgiPlatform.h"

+#include "SgiAcpiHeader.h"

+

+DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",

+                 EFI_ACPI_ARM_OEM_REVISION) {

+  Scope (_SB) {

+    Device (CP00) { // Zeus core 0

+      Name (_HID, "ACPI0007")

+      Name (_UID, 0)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP01) { // Zeus core 1

+      Name (_HID, "ACPI0007")

+      Name (_UID, 1)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP02) { // Zeus core 2

+      Name (_HID, "ACPI0007")

+      Name (_UID, 2)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP03) { // Zeus core 3

+      Name (_HID, "ACPI0007")

+      Name (_UID, 3)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP04) { // Zeus core 4

+      Name (_HID, "ACPI0007")

+      Name (_UID, 4)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP05) { // Zeus core 5

+      Name (_HID, "ACPI0007")

+      Name (_UID, 5)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP06) { // Zeus core 6

+      Name (_HID, "ACPI0007")

+      Name (_UID, 6)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP07) { // Zeus core 7

+      Name (_HID, "ACPI0007")

+      Name (_UID, 7)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP08) { // Zeus core 8

+      Name (_HID, "ACPI0007")

+      Name (_UID, 8)

+      Name (_STA, 0xF)

+    }

+

+   Device (CP09) { // Zeus core 9

+      Name (_HID, "ACPI0007")

+      Name (_UID, 9)

+      Name (_STA, 0xF)

+    }

+

+   Device (CP10) { // Zeus core 10

+      Name (_HID, "ACPI0007")

+      Name (_UID, 10)

+      Name (_STA, 0xF)

+    }

+

+   Device (CP11) { // Zeus core 11

+      Name (_HID, "ACPI0007")

+      Name (_UID, 11)

+      Name (_STA, 0xF)

+    }

+

+    Device (CP12) { // Zeus core 12

+      Name (_HID, "ACPI0007")

+      Name (_UID, 12)

+      Name (_STA, 0xF)

+    }

+

+   Device (CP13) { // Zeus core 13

+      Name (_HID, "ACPI0007")

+      Name (_UID, 13)

+      Name (_STA, 0xF)

+    }

+

+   Device (CP14) { // Zeus core 14

+      Name (_HID, "ACPI0007")

+      Name (_UID, 14)

+      Name (_STA, 0xF)

+    }

+

+   Device (CP15) { // Zeus core 15

+      Name (_HID, "ACPI0007")

+      Name (_UID, 15)

+      Name (_STA, 0xF)

+    }

+  } // Scope(_SB)

+}

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
new file mode 100644
index 00000000..421f6b96
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgM/Madt.aslc
@@ -0,0 +1,141 @@
+/** @file

+*  Multiple APIC Description Table (MADT)

+*

+*  Copyright (c) 2020, ARM Limited. All rights reserved.

+*

+*  This program and the accompanying materials are licensed and made available

+*  under the terms and conditions of the BSD License which accompanies this

+*  distribution.  The full text of the license may be found at

+*  http://opensource.org/licenses/bsd-license.php

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+*

+**/

+

+#include "SgiPlatform.h"

+#include "SgiAcpiHeader.h"

+#include <Library/AcpiLib.h>

+#include <Library/ArmLib.h>

+#include <Library/PcdLib.h>

+#include <IndustryStandard/Acpi.h>

+

+#define CORES             (FixedPcdGet32 (PcdClusterCount) * \

+                          FixedPcdGet32 (PcdCoreCount))

+

+// Multiple APIC Description Table

+#pragma pack (1)

+

+typedef struct {

+  EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

+  EFI_ACPI_6_2_GIC_STRUCTURE                            GicInterfaces[CORES];

+  EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;

+  EFI_ACPI_6_2_GICR_STRUCTURE                           GicRedistributor;

+  EFI_ACPI_6_2_GIC_ITS_STRUCTURE                        GicIts[4];

+} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE;

+

+#pragma pack ()

+

+STATIC EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {

+  {

+    ARM_ACPI_HEADER (

+      EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,

+      EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE,

+      EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION

+    ),

+    // MADT specific fields

+    0, // LocalApicAddress

+    0  // Flags

+  },

+  {

+    // Format: EFI_ACPI_6_2_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Mpidr, Flags,

+    //                                          PmuIrq, GicBase, GicVBase,

+    //                                          GicHBase, GsivId, GicRBase,

+    //                                          Efficiency)

+    // Note: The GIC Structure of the primary CPU must be the first entry

+    // (see note in 5.2.12.14 GICC Structure of ACPI v6.2).

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core0

+      0, 0, GET_MPID(0x0, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core1

+      0, 1, GET_MPID(0x100, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core2

+      0, 2, GET_MPID(0x200, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core3

+      0, 3, GET_MPID(0x300, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core4

+      0, 4, GET_MPID(0x400, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core5

+      0, 5, GET_MPID(0x500, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core6

+      0, 6, GET_MPID(0x600, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core7

+      0, 7, GET_MPID(0x700, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core8

+      0, 8, GET_MPID(0x800, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core9

+      0, 9, GET_MPID(0x900, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core10

+      0, 10, GET_MPID(0xa00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core11

+      0, 11, GET_MPID(0xb00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core12

+      0, 12, GET_MPID(0xc00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core13

+      0, 13, GET_MPID(0xd00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core14

+      0, 14, GET_MPID(0xe00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+    EFI_ACPI_6_2_GICC_STRUCTURE_INIT( // Zeus core15

+      0, 15, GET_MPID(0xf00, 0x0), EFI_ACPI_6_2_GIC_ENABLED, 23,

+      FixedPcdGet32 (PcdGicDistributorBase),

+      0x2c020000, 0x2c010000, 25, 0 /* GicRBase */, 0 /* Efficiency */),

+  },

+  // GIC Distributor Entry

+  EFI_ACPI_6_2_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet32 (PcdGicDistributorBase),

+                                    0, 3),

+  // GIC Redistributor

+  EFI_ACPI_6_2_GIC_REDISTRIBUTOR_INIT(FixedPcdGet32 (PcdGicRedistributorsBase),

+                                      SIZE_16MB),

+  // GIC ITS

+  {

+    EFI_ACPI_6_2_GIC_ITS_INIT(0, 0x30040000),

+    EFI_ACPI_6_2_GIC_ITS_INIT(1, 0x30080000),

+    EFI_ACPI_6_2_GIC_ITS_INIT(2, 0x300C0000),

+    EFI_ACPI_6_2_GIC_ITS_INIT(3, 0x30100000),

+  },

+};

+

+//

+// Reference the table being generated to prevent the optimizer from removing

+// the data structure from the executable

+//

+VOID* CONST ReferenceAcpiTable = &Madt;

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
new file mode 100644
index 00000000..783b9151
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdDanielCfgMAcpiTables.inf
@@ -0,0 +1,63 @@
+## @file

+#  ACPI table data and ASL sources required to boot the platform.

+#

+#  Copyright (c) 2020, ARM Ltd. All rights reserved.

+#

+#  This program and the accompanying materials are licensed and made available

+#  under the terms and conditions of the BSD License which accompanies this

+#  distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+##

+

+[Defines]

+  INF_VERSION                    = 0x0001001A

+  BASE_NAME                      = RdDanielCfgMAcpiTables

+  FILE_GUID                      = c712719a-0aaf-438c-9cdd-35ab4d60207d  # gArmSgiAcpiTablesGuid

+  MODULE_TYPE                    = USER_DEFINED

+  VERSION_STRING                 = 1.0

+

+[Sources]

+  Dbg2.aslc

+  SsdtRos.asl

+  Fadt.aslc

+  Gtdt.aslc

+  Iort.aslc

+  Mcfg.aslc

+  RdDanielCfgM/Dsdt.asl

+  RdDanielCfgM/Madt.aslc

+  Spcr.aslc

+

+[Packages]

+  ArmPkg/ArmPkg.dec

+  ArmPlatformPkg/ArmPlatformPkg.dec

+  EmbeddedPkg/EmbeddedPkg.dec

+  MdePkg/MdePkg.dec

+  Platform/ARM/SgiPkg/SgiPlatform.dec

+

+[FixedPcd]

+  gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase

+  gArmPlatformTokenSpaceGuid.PL011UartInterrupt

+

+  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum

+  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum

+  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum

+  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum

+  gArmTokenSpaceGuid.PcdGicDistributorBase

+  gArmTokenSpaceGuid.PcdGicRedistributorsBase

+  gArmTokenSpaceGuid.PcdGenericWatchdogControlBase

+  gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase

+  gArmTokenSpaceGuid.PcdPciBusMin

+  gArmTokenSpaceGuid.PcdPciBusMax

+

+  gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress

+  gArmSgiTokenSpaceGuid.PcdVirtioBlkSize

+  gArmSgiTokenSpaceGuid.PcdVirtioBlkInterrupt

+  gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress

+  gArmSgiTokenSpaceGuid.PcdVirtioNetSize

+  gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt

+

+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress