Platform/ARM/Sgi: Move common platform description to SSDT

Move common platform description entries in platform specific DSDT to
a SSDT that can be reused on all SGI/RD platforms.

Change-Id: I958298ffc0f454db52728276a3ae6b92b144e544
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

6 files changed, 97 insertions, 139 deletions

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
index 5583e610..d66c7cbf 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Dsdt.asl
@@ -1,7 +1,7 @@
 /** @file

 *  Differentiated System Description Table Fields (DSDT)

 *

-*  Copyright (c) 2018, ARM Ltd. All rights reserved.

+*  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.

 *

 *  SPDX-License-Identifier: BSD-2-Clause-Patent

 *

@@ -208,73 +208,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
       Name (_STA, 0xF)

     }

 

-    // UART PL011

-    Device (COM0) {

-      Name (_HID, "ARMH0011")

-      Name (_CID, "ARMH0011")

-      Name (_UID, Zero)

-      Name (_STA, 0xF)

-      Name (_CRS, ResourceTemplate() {

-        Memory32Fixed (

-          ReadWrite,

-          FixedPcdGet64 (PcdSerialDbgRegisterBase),

-          0x1000

-        )

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }

-      })

-    }

-

-    // SMSC 91C111

-    Device (ETH0) {

-      Name (_HID, "LNRO0003")

-      Name (_UID, Zero)

-      Name (_STA, 0xF)

-      Name (_CRS, ResourceTemplate() {

-        Memory32Fixed (ReadWrite, 0x18000000, 0x1000)

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }

-      })

-      Name (_DSD, Package() {

-        ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),

-        Package () {

-          Package (2) {"reg-io-width", 4 },

-        }

-      })

-    }

-

-    // VIRTIO DISK

-    Device (VR00) {

-      Name (_HID, "LNRO0005")

-      Name (_UID, 0)

-      Name (_CCA, 1)    // mark the device coherent

-

-      Name (_CRS, ResourceTemplate() {

-        Memory32Fixed (

-          ReadWrite,

-          FixedPcdGet32 (PcdVirtioBlkBaseAddress),

-          FixedPcdGet32 (PcdVirtioBlkSize)

-        )

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {

-          FixedPcdGet32 (PcdVirtioBlkInterrupt)

-        }

-      })

-    }

-

-    // VIRTIO NET

-    Device (VR01) {

-      Name (_HID, "LNRO0005")

-      Name (_UID, 1)

-      Name (_CCA, 1)    // mark the device coherent

-

-      Name (_CRS, ResourceTemplate() {

-        Memory32Fixed (

-          ReadWrite,

-          FixedPcdGet32 (PcdVirtioNetBaseAddress),

-          FixedPcdGet32 (PcdVirtioNetSize)

-        )

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {

-          FixedPcdGet32 (PcdVirtioNetInterrupt)

-        }

-      })

-    }

   } // Scope(_SB)

 }

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
index e780698c..7ebd70b1 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf
@@ -1,7 +1,7 @@
 ## @file

 #  ACPI table data and ASL sources required to boot the platform.

 #

-#  Copyright (c) 2018, ARM Ltd. All rights reserved.

+#  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -16,6 +16,7 @@
 

 [Sources]

   Dbg2.aslc

+  SsdtRos.asl

   Fadt.aslc

   Gtdt.aslc

   Iort.aslc

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
index 45316d50..cb05eed3 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Dsdt.asl
@@ -1,7 +1,7 @@
 /** @file

 *  Differentiated System Description Table Fields (DSDT)

 *

-*  Copyright (c) 2018, ARM Ltd. All rights reserved.

+*  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.

 *

 *  SPDX-License-Identifier: BSD-2-Clause-Patent

 *

@@ -62,72 +62,5 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "ARMLTD", "ARMSGI",
       Name (_STA, 0xF)

     }

 

-    // UART PL011

-    Device (COM0) {

-      Name (_HID, "ARMH0011")

-      Name (_CID, "ARMH0011")

-      Name (_UID, Zero)

-      Name (_STA, 0xF)

-      Name (_CRS, ResourceTemplate () {

-        Memory32Fixed (

-          ReadWrite,

-          FixedPcdGet64 (PcdSerialDbgRegisterBase),

-          0x1000

-          )

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }

-      })

-    }

-

-    // SMSC 91C111

-    Device (ETH0) {

-      Name (_HID, "LNRO0003")

-      Name (_UID, Zero)

-      Name (_STA, 0xF)

-      Name (_CRS, ResourceTemplate () {

-        Memory32Fixed (ReadWrite, 0x18000000, 0x1000)

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }

-      })

-      Name (_DSD, Package() {

-        ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),

-                Package() {

-                  Package(2) {"reg-io-width", 4 },

-                }

-      })

-    }

-

-    // VIRTIO DISK

-    Device (VR00) {

-      Name (_HID, "LNRO0005")

-      Name (_UID, 0)

-      Name (_CCA, 1)    // mark the device coherent

-

-      Name (_CRS, ResourceTemplate() {

-        Memory32Fixed (

-          ReadWrite,

-          FixedPcdGet32 (PcdVirtioBlkBaseAddress),

-          FixedPcdGet32 (PcdVirtioBlkSize)

-        )

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {

-          FixedPcdGet32 (PcdVirtioBlkInterrupt)

-        }

-      })

-    }

-

-    // VIRTIO NET

-    Device (VR01) {

-      Name (_HID, "LNRO0005")

-      Name (_UID, 1)

-      Name (_CCA, 1)    // mark the device coherent

-

-      Name (_CRS, ResourceTemplate() {

-        Memory32Fixed (ReadWrite,

-          FixedPcdGet32 (PcdVirtioNetBaseAddress),

-          FixedPcdGet32 (PcdVirtioNetSize)

-        )

-        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {

-          FixedPcdGet32 (PcdVirtioNetInterrupt)

-        }

-      })

-    }

   } // Scope(_SB)

 }

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
index 871697ea..2d4354f3 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf
@@ -1,7 +1,7 @@
 ## @file

 #  ACPI table data and ASL sources required to boot the platform.

 #

-#  Copyright (c) 2018, ARM Ltd. All rights reserved.

+#  Copyright (c) 2018-2020, ARM Ltd. All rights reserved.

 #

 #  SPDX-License-Identifier: BSD-2-Clause-Patent

 #

@@ -16,6 +16,7 @@
 

 [Sources]

   Dbg2.aslc

+  SsdtRos.asl

   Fadt.aslc

   Gtdt.aslc

   Iort.aslc

diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 61f17b3e..75f8e6dd 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -16,6 +16,7 @@
 

 [Sources]

   Dbg2.aslc

+  SsdtRos.asl

   Fadt.aslc

   Gtdt.aslc

   Iort.aslc

diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl b/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
new file mode 100644
index 00000000..5b348da9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl
@@ -0,0 +1,90 @@
+/** @file

+*  Secondary System Description Table Fields (SSDT)

+*

+*  Copyright (c) 2020, ARM Ltd. All rights reserved.

+*

+*  This program and the accompanying materials are licensed and made available

+*  under the terms and conditions of the BSD License which accompanies this

+*  distribution.  The full text of the license may be found at

+*  http://opensource.org/licenses/bsd-license.php

+*

+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+*

+**/

+

+#include "SgiPlatform.h"

+#include "SgiAcpiHeader.h"

+

+DefinitionBlock ("SsdtRosTable.aml", "SSDT", 1, "ARMLTD", "ARMSGI",

+                 EFI_ACPI_ARM_OEM_REVISION) {

+  Scope (_SB) {

+    // UART PL011

+    Device (COM0) {

+      Name (_HID, "ARMH0011")

+      Name (_CID, "ARMH0011")

+      Name (_UID, Zero)

+      Name (_STA, 0xF)

+      Name (_CRS, ResourceTemplate () {

+        Memory32Fixed (

+          ReadWrite,

+          FixedPcdGet64 (PcdSerialDbgRegisterBase),

+          0x1000

+          )

+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 147 }

+      })

+    }

+

+    // SMSC 91C111

+    Device (ETH0) {

+      Name (_HID, "LNRO0003")

+      Name (_UID, Zero)

+      Name (_STA, 0xF)

+      Name (_CRS, ResourceTemplate () {

+        Memory32Fixed (ReadWrite, 0x18000000, 0x1000)

+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 111 }

+      })

+      Name (_DSD, Package() {

+        ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),

+                Package() {

+                  Package(2) {"reg-io-width", 4 },

+                }

+      })

+    }

+

+    // VIRTIO DISK

+    Device (VR00) {

+      Name (_HID, "LNRO0005")

+      Name (_UID, 0)

+      Name (_CCA, 1)    // mark the device coherent

+

+      Name (_CRS, ResourceTemplate() {

+        Memory32Fixed (

+          ReadWrite,

+          FixedPcdGet32 (PcdVirtioBlkBaseAddress),

+          FixedPcdGet32 (PcdVirtioBlkSize)

+        )

+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {

+          FixedPcdGet32 (PcdVirtioBlkInterrupt)

+        }

+      })

+    }

+

+    // VIRTIO NET

+    Device (VR01) {

+      Name (_HID, "LNRO0005")

+      Name (_UID, 1)

+      Name (_CCA, 1)    // mark the device coherent

+

+      Name (_CRS, ResourceTemplate() {

+        Memory32Fixed (ReadWrite,

+          FixedPcdGet32 (PcdVirtioNetBaseAddress),

+          FixedPcdGet32 (PcdVirtioNetSize)

+        )

+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {

+          FixedPcdGet32 (PcdVirtioNetInterrupt)

+        }

+      })

+    }

+  } // Scope(_SB)

+}