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Fixed driver crash on ARP packets. Fixed TX recycle buffer overflow.
Added prototype for SnpWaitForPacketNotify SNP call and notify event.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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The UEFI driver for Marvell Yukon NIC, part 3
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
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The UEFI driver for Marvell Yukon NIC, part 2
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
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The UEFI driver for Marvell Yukon NIC, part 4
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
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The UEFI driver for Marvell Yukon NIC, part 1
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
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This patch was extracted from the patch Jeremy posted upstream in Nov
2015. Since then, I've posted patches to migrate Juno to
OpenPlatformPkg, so I've copied portion of the patch here.
SMBIOS data is consumed by a wide range of enterprise applications.
Fill in the basic requirements of the SMBIOS specification by hardcoding
the minimum required structures and data using Juno information. With
this change both the EFI shell and linux dmidecode commands return useful
information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride TRUE
Mainline Tianocore EDK2 fails to boot on TC2. I tested pure upstream
code at this commit:
f447734 2016-01-26 MdeModulePkg:Make the logic in ConfigRouting.c clear and safe [Dandan Bi]
The following trace is shown on the serial console:
------------------------------------------------------------------------
Loading driver at 0x000BF805000 EntryPoint=0x000BF805251 FaultTolerantWriteDxe.efi
Data Abort Exception PC at 0xBF8BDFF8 CPSR 0xA0000113 NzCveAift_svc
/working/platforms/uefi/edk2/Build/ArmVExpress-CTA15-A7/DEBUG_GCC49/ARM/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe/DEBUG/VariableRuntimeDxe.dll
loaded at 0xBF8B4000 (PE/COFF offset) 0x9FF8 (ELF or Mach-O offset)
0x8FF8
0xE1901F9F LDREX r1, [r0]
R0 0xBF8E0A34 R1 0xBF8C4F90 R2 0x00000002 R3 0xBF8E0A34
R4 0x00000044 R5 0x00000400 R6 0x00000000 R7 0xB000021C
R8 0x80000100 R9 0xB8000000 R10 0xBFFEC000 R11 0x00000000
R12 0x00000000 SP 0xBFFFFB08 LR 0xBF8BDF1B PC 0xBF8BDFF8
DFSR 0x00001008 DFAR 0xBF8E0A34 IFSR 0x00001236 IFAR 0xED414047
Precise External Abort: read from 0xBF8E0A34
Instruction Access Flag fault on Page at 0xED414047
ASSERT [ArmCpuDxe]
/working/platforms/uefi/edk2/ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c(260):
((BOOLEAN)(0==1))
------------------------------------------------------------------------
'git bisect' shows that the commit below causes the problem:
------------------------------------------------------------------------
commit 0c9a522f28772049ae37c85b8ae589a98d2d3b81
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Thu Nov 12 11:40:57 2015 +0000
ArmPkg/ArmLib: mark all cached mappings as (inner) shareable
Mark all cached memory mappings as shareable (or inner shareable on
AArch64) so that our view of memory is kept coherent by the hardware.
This is relevant for things like coherent DMA and virtualization (where
a guest may migrate to another core) but in general, since UEFI on ARM
is mostly used in a context where the secure firmware and possibly a
secure OS are already up and running, it is best to refrain from using
any non-shareable mappings.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18778 6f19259b-4bc3-4df7-8a09-765794883524
------------------------------------------------------------------------
Only the revert of the change to TT_DESCRIPTOR_SECTION_WRITE_BACK is
needed to get TC2 working again.
However, the topic was discussed on the mailing list:
https://www.mail-archive.com/edk2-devel@lists.01.org/msg03974.html
The correct solution for platforms that wish to revert this behaviour
is to set the following PCD to TRUE:
gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride
However, for TC2 should not need to do this. Work continues to
ascertain why TC2 breaks with shareable mappings. Current thinking is
that CCI-400 needs configuring before shareable mappings will work.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Git tends to see .depex files as text, causing hideous patches being
generated (and breaking PatchCheck.py).
Add a .gitattributes file instructing git to treat them as binary.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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Move to the unicore PrePi implementation. This is possible, since we only
support executing under ATF anyway, so only the boot CPU enters UEFI in
EL2, and booting multiple cores using the ARM_MP_CORE protocol is only
supported when using the LinuxLoader.
The reason we need to make this change is because Juno implements this
protocol using 32-bit wide mailbox registers, which is awkward on an
otherwise 64-bit architecture, and this is holding back progress for
other platforms that need to implement the ACPI parking protocol.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
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A PRIORI declarations are evil. They force a driver to be dispatched
before any other drivers, while completely ignoring normal precedence
rules or protocol dependencies.
In this particular case, the DXE version of Pcd.inf is loaded a priori to
work around the problem that the default PcdLib resolution introduces a
a protocol dependency on gPcdProtocolGuid, which provides dynamic PCD
handling for other drivers, and is implemented by Pcd.inf. Since Pcd.inf
depends on PcdLib as well, it can never be dispatched in the ordinary way
if it inherits the default PcdLib resolution (since that will make it depend
on itself), and so it must be made to depend on the Null implementation of
PcdLib explicitly.
So add this explicit override, and drop the A PRIORI declarations.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
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Currently, the only supported way of running Tianocore on FVP is using
ARM Trusted Firmware at EL3, in which case only a single core will enter
the UEFI firmware at EL2. This means we can move to the UniCore flavor
of PrePi/PrePeiCore, which now have been made compatible with running
on an otherwise MpCore capable system. So replace the .inf references,
and drop or update the PCDs related to secondary boot as appropriate.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
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The PCI Routing Table (_PRT) for Juno does not specify the Interrupt
trigger type and polarity. In the absence of this information, the
kernel uses PCI default interrupt type (level triggered, active low)
which is incompatible with GICv2 compliant interrupt controller such
as on Juno.
Absence of interrupt type leads to errors such as following in kernel
boot log -
[ 1.353696] genirq: Setting trigger mode 8 for irq 9 failed (gic_set_type+0x0/0x5c)
[ 1.478286] genirq: Setting trigger mode 8 for irq 17 failed (gic_set_type+0x0/0x5c)
[ 1.563723] genirq: Setting trigger mode 8 for irq 18 failed (gic_set_type+0x0/0x5c)
Fix this issue by providing the correct information (level triggered,
active high) to the kernel by using the PCI Link device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The patch corrects Juno LAN9118 base address.
The previous version specified address 0x1a000000, but the TRM documents
it as being located at 0x18000000. Due to the magic of hardware aliasing,
the old version was functional, but let's use the documented value.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Daniil Egranov <daniil.egranov@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The built-in Linux loader is broken in several ways, one of which is that
it shields the UEFI environment from the OS. So remove it from the FVP build.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
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Use the new PCI related PCD names after they have been moved from
ArmPlatformPkg to ArmPkg
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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The FACS table does not expose anything meaningful on AArch64, and since
the Tianocore ACPI table handling code insists on locating FACS below 4 GB,
which may fail since since AArch64 platforms may not have any system RAM
below 4 GB to begin with, having its definition in the source tree does
more harm than good.
The reason for this behavior is to ensure that a 32-bit PEI can access the
FACS table on an otherwise 64-bit system, but this is a concern that does not
apply to AArch64, since PEI always runs in 64-bit mode in that case. The PI
spec currently does not provide any means for PEI to convey its bitness or
how much system RAM it can access, so a permanent fix requires a spec update
first.
So simply remove the FACS table until the PIWG clarifies the spec in this
regard.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
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Dandan submitted this patch to the EDK2 Mailing list for review before
FVP was moved to OpenPlatformPkg:
https://www.mail-archive.com/edk2-devel@lists.01.org/msg07113.html
His original commit message:
ArmPlatformPkg: Add FileExplorerLib.inf to the dsc file
V3: Add FileExplorerLib when SECURE_BOOT_ENABLE == TRUE, so
when to use FileExplorerLib is clear.
Because SecureBootConfigDxe use FileExplorerLib now, but
FileExplorerLib is not in the dsc file of the package
that use SecureBootConfigDxe. Now add it to pass build.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Dandan Bi <dandan.bi@intel.com>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The upstream code uses a PCD to set the FIFO depth:
f423d76 2016-03-17 MdeModulePkg/SerialDxe: Set FIFO depth with PCD
Add a sensible default for the PCD before the code becomes more widely
used.
The PL011UartInitializePort function in the PL011 driver expects the
receive FIFO depth to be set to a sane value or zero to use the
appropriate default for the version of PL011 present on the device.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Change our resolution for the previously unused CpuExceptionHandlerLib
from the null implementation to the newly added implementation specific
to AARCH64 and ARM. This is needed since our CpuDxe will start using it
in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Change our resolution for the previously unused CpuExceptionHandlerLib
from the null implementation to the newly added implementation specific
to AARCH64 and ARM. This is needed since our CpuDxe will start using it
in a subsequent patch.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Remove the null resolution for CpuExceptionHandlerLib: this version will
no longer work once we update ARM's CpuDxe to depend on the ARM specific
version. Since this module does not actually rely on it, let's just remove
all mention of it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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For lack of suitable hardware upon which a proper implementation of RngLib
can be based, this implements a pseudo-random version of RngLib based on
the generic timer, the cycle counter and a couple of rounds of AES.
NOTE: while the values produced by this library may look like random values
to the human eye, they most certainly are not, and use of this library in
production is UNSAFE. For this reason, the library is provided as a binary
only, and will print a warning to the console the first time it is invoked.
Since Juno is a development platform with no entropy source in hardware,
wire up this library for it into RngDxe
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Suggested-by: Leif Lindholm <leif.lindholm@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
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The comments on PcdDebugPrintErrorLevel are clearly based on a version
of MdePkg/Include/Library/DebugLib.h predating SVN r12933.
Bring up to date to reduce confusion (and fix a couple of mistakes).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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Since the on-board USB controller is an EHCI one, that is the only host
controller driver enabled for Juno. Add UHCI and XHCI as well, in order
to support PCIe expansion cards.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
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The LAN9118 driver in EDK2 has been updated to include a PCD for
over-riding the default auto-negotiation timeout.
The default setting of 4000us is not long enough for TC2, so set it to
400000.
NOTE: LAN9118 on TC2 is only working in RELEASE builds at the moment.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The LAN9118 driver in EDK2 has been updated to include a PCD for
over-riding the default auto-negotiation timeout.
The default setting of 4000us is not long enough for Juno, so set it to
40000.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Import new SCP binaries from juno-latest-oe-uefi-20160125-1708,
to work with ARM-TF v1.2.
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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This platform is untested and no longer supported, so remove it from the
tree.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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The Sec binary has not been used ever since the introduction of ARM
Trusted Firmware, so remove this untested binary from our builds.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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GICv3 with v2 legacy support was removed, but this patch adds it back in
conditionally.
The default continues to use GICv3 natively unless specifically
requested at build time by defining "ARM_FVP_GICV3_WITH_V2_LEGACY".
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Use the TTYTERM console type by default so that we understand control
codes sent by Linux terminals.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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It defaults to off, so you have to specify -D EDK2_ENABLE_PL111=1 to
enable it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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The TTYTERM console type allows Linux terminals to send the correct
control codes for function keys, backspace, etc.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Rather than use a pre-built Shell binary, build the Shell from source.
This allows the developer to debug and fix bugs in Shell, as well as
test the latest source code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Add Intel BDS support and remove ARM BDS support.
I had to increase the image size in the process.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Defining EDK2_OUT_DIR at build time allows the builder to specify the
output directory used.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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Use the .fdf and .dsc.inc files from OpenPlatformPkg.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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This is a straight copy of the TC2 dsc & fdf files from EDK2 at this
commit:
f447734 2016-01-26 MdeModulePkg:Make the logic in ConfigRouting.c clear and safe [Dandan Bi]
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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commit 660aaec3118b0763ee4fcd83b936bf15ffcf23a9
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Tue Dec 15 13:08:56 2015 +0000
ArmVExpressPkg/ArmVExpress-FVP-AArch64: run GICv3 in v3 mode
After fixing ArmGicEnableDistributor() in a previous patch, there is no
longer a reason to run the GICv3 in v2 mode, so remove the PCD override.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19275 6f19259b-4bc3-4df7-8a09-765794883524
[1] http://sourceforge.net/p/tianocore/edk2/ci/660aaec3118b0763ee4fcd83b936bf15ffcf23a9/
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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This commit is a direct copy of the changes from this commit applied to
Tianocore EDK2 [1]:
commit 0ad3e6d4a6578e8714e7735d1b9d0b51e6999fcc
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Tue Aug 25 13:11:25 2015 +0000
ArmPlatformPkg/FVP: unify support for Foundation and Base models
Now that the PL180 and PL111 drivers know how to behave when executed
on the Foundation model (which does not emulate the hardware), we can
remove the ARM_FOUNDATION_FVP ifdefs and produce a single build that
runs on both the Foundation model and the Base model.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18309 6f19259b-4bc3-4df7-8a09-765794883524
[1] http://sourceforge.net/p/tianocore/edk2/ci/0ad3e6d4a6578e8714e7735d1b9d0b51e6999fcc/
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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This commit is a direct copy of the changes from this commit applied to
Tianocore EDK2 [1]:
commit e820fe36c4867667a267ab4df41dff682b35c2d0
Author: Star Zeng <star.zeng@intel.com>
Date: Tue Aug 25 03:03:52 2015 +0000
ArmPlatformPkg: Link separated VarCheckUefiLib NULL class library instance
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18291 6f19259b-4bc3-4df7-8a09-765794883524
The Juno part of this change had already been committed, so I only
applied the FVP and A15 RTSM portions.
[1] http://sourceforge.net/p/tianocore/edk2/ci/e820fe36c4867667a267ab4df41dff682b35c2d0/
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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This commit is a direct copy of the changes from this commit applied to
Tianocore EDK2 [1]:
commit 16d11eed2933e2ef3d611cba2453b9d6484a83e4
Author: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Mon Aug 10 07:55:10 2015 +0000
ArmPlatformPkg/FVP: use 'auto' alignment and FIXED placement for XIP modules
Now that GenFw correctly propagates the minimum alignment of the ELF
input sections to the PE/COFF binary, we can simply select 'auto'
alignment in the FDF Rule section instead of tweaking it by hand.
Also add the FIXED FFS attribute to the module types that may execute
in place. This enables a newly added optimization in GenFfs that strips
redundant padding, preventing excessive waste of FV space if the section
alignment is considerable (i.e., 2 KB or 4 KB)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18196 6f19259b-4bc3-4df7-8a09-765794883524
[1] http://sourceforge.net/p/tianocore/edk2/ci/16d11eed2933e2ef3d611cba2453b9d6484a83e4/
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
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FVP/AcpiTables update apic to acpica-tools 20150930 release.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Graeme Gregory <graeme.gregory@linaro.org>
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Update to work with moved SerialDxe and deleted GlobalVariableLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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PlatformGlobalVariableLib was non-specification-compliant and has now
been dropped from EDK2. Adjust configs to work with current upstream.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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SerialDxe moved out of EmbeddedPkg into MdeModulePkg.
Update ports to align with this.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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SVN r18751 corrected the spelling of the ArmLib function
ArmDataSyncronizationBarrier to
ArmDataSynchronizationBarrier. Mirror that in this copy.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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Synchronize with svn: r18723
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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