/* * dts file for Hisilicon Hi6220 SoC * * Copyright (C) 2015, Hisilicon Ltd. */ #include #include / { compatible = "hisilicon,hi6220"; interrupt-parent = <&gic>; #address-cells = <2>; #size-cells = <2>; psci { compatible = "arm,psci-0.2"; method = "smc"; }; cpus { #address-cells = <2>; #size-cells = <0>; cpu-map { cluster0 { core0 { cpu = <&cpu0>; }; core1 { cpu = <&cpu1>; }; core2 { cpu = <&cpu2>; }; core3 { cpu = <&cpu3>; }; }; cluster1 { core0 { cpu = <&cpu4>; }; core1 { cpu = <&cpu5>; }; core2 { cpu = <&cpu6>; }; core3 { cpu = <&cpu7>; }; }; }; cpu0: cpu@0 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x0>; enable-method = "psci"; clocks = <&stub_clock 0>; clock-latency = <0>; operating-points = < /* kHz */ 1200000 0 960000 0 729000 0 432000 0 208000 0 >; #cooling-cells = <2>; /* min followed by max */ cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu1: cpu@1 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x1>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu2: cpu@2 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x2>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu3: cpu@3 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x3>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu4: cpu@100 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu5: cpu@101 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x101>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu6: cpu@102 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x102>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; cpu7: cpu@103 { compatible = "arm,cortex-a53", "arm,armv8"; device_type = "cpu"; reg = <0x0 0x103>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0_0 &CLUSTER_SLEEP_0>; }; idle-states { entry-method = "arm,psci"; CPU_SLEEP_0_0: cpu-sleep-0-0 { compatible = "arm,idle-state"; local-timer-stop; arm,psci-suspend-param = <0x0010000>; entry-latency-us = <250>; exit-latency-us = <500>; min-residency-us = <950>; }; CLUSTER_SLEEP_0: cluster-sleep-0 { compatible = "arm,idle-state"; local-timer-stop; arm,psci-suspend-param = <0x1010000>; entry-latency-us = <600>; exit-latency-us = <1100>; min-residency-us = <2700>; wakeup-latency-us = <1500>; }; }; }; gic: interrupt-controller@f6801000 { compatible = "arm,gic-400"; reg = <0x0 0xf6801000 0 0x1000>, /* GICD */ <0x0 0xf6802000 0 0x2000>, /* GICC */ <0x0 0xf6804000 0 0x2000>, /* GICH */ <0x0 0xf6806000 0 0x2000>; /* GICV */ #address-cells = <0>; #interrupt-cells = <3>; interrupt-controller; interrupts = ; }; timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; interrupts = , , , ; }; soc { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <2>; ranges; sram: sram@fff80000 { compatible = "hisilicon,hi6220-sramctrl", "syscon"; reg = <0x0 0xfff80000 0x0 0x12000>; }; ao_ctrl: ao_ctrl@f7800000 { compatible = "hisilicon,hi6220-aoctrl", "syscon"; reg = <0x0 0xf7800000 0x0 0x2000>; #clock-cells = <1>; }; sys_ctrl: sys_ctrl@f7030000 { compatible = "hisilicon,hi6220-sysctrl", "syscon"; reg = <0x0 0xf7030000 0x0 0x2000>; #clock-cells = <1>; }; media_ctrl: media_ctrl@f4410000 { compatible = "hisilicon,hi6220-mediactrl", "syscon"; reg = <0x0 0xf4410000 0x0 0x1000>; #clock-cells = <1>; }; pm_ctrl: pm_ctrl@f7032000 { compatible = "hisilicon,hi6220-pmctrl", "syscon"; reg = <0x0 0xf7032000 0x0 0x1000>; #clock-cells = <1>; }; stub_clock: stub_clock { compatible = "hisilicon,hi6220-stub-clk"; hisilicon,hi6220-clk-sram = <&sram>; #clock-cells = <1>; mboxes = <&mailbox 1>; }; dual_timer0: dual_timer@f8008000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x0 0xf8008000 0x0 0x1000>; interrupts = , ; clocks = <&ao_ctrl 27>, <&ao_ctrl 27>; clock-names = "apb_pclk", "apb_pclk"; }; uart0: uart@f8015000 { /* console */ compatible = "arm,pl011", "arm,primecell"; reg = <0x0 0xf8015000 0x0 0x1000>; interrupts = ; clocks = <&ao_ctrl 36>, <&ao_ctrl 36>; clock-names = "uartclk", "apb_pclk"; }; gpio0: gpio@f8011000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf8011000 0x0 0x1000>; interrupts = <0 52 0x4>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio1: gpio@f8012000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf8012000 0x0 0x1000>; interrupts = <0 53 0x4>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio2: gpio@f8013000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf8013000 0x0 0x1000>; interrupts = <0 54 0x4>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio3: gpio@f8014000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf8014000 0x0 0x1000>; interrupts = <0 55 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 80 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio4: gpio@f7020000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7020000 0x0 0x1000>; interrupts = <0 56 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 88 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio5: gpio@f7021000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7021000 0x0 0x1000>; interrupts = <0 57 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 96 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio6: gpio@f7022000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7022000 0x0 0x1000>; interrupts = <0 58 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 104 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio7: gpio@f7023000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7023000 0x0 0x1000>; interrupts = <0 59 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 112 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio8: gpio@f7024000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7024000 0x0 0x1000>; interrupts = <0 60 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 120 2 &pmx0 2 2 6>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio9: gpio@f7025000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7025000 0x0 0x1000>; interrupts = <0 61 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 8 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio10: gpio@f7026000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7026000 0x0 0x1000>; interrupts = <0 62 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 0 1 &pmx0 1 16 7>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio11: gpio@f7027000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7027000 0x0 0x1000>; interrupts = <0 63 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 23 3 &pmx0 3 28 5>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio12: gpio@f7028000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7028000 0x0 0x1000>; interrupts = <0 64 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 33 3 &pmx0 3 43 5>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio13: gpio@f7029000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf7029000 0x0 0x1000>; interrupts = <0 65 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 48 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio14: gpio@f702a000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf702a000 0x0 0x1000>; interrupts = <0 66 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 56 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio15: gpio@f702b000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf702b000 0x0 0x1000>; interrupts = <0 67 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = < &pmx0 0 74 6 &pmx0 6 122 1 &pmx0 7 126 1 >; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio16: gpio@f702c000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf702c000 0x0 0x1000>; interrupts = <0 68 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 127 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio17: gpio@f702d000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf702d000 0x0 0x1000>; interrupts = <0 69 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 135 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio18: gpio@f702e000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf702e000 0x0 0x1000>; interrupts = <0 70 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 143 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; gpio19: gpio@f702f000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x0 0xf702f000 0x0 0x1000>; interrupts = <0 71 0x4>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pmx0 0 151 8>; interrupt-controller; #interrupt-cells = <2>; clocks = <&ao_ctrl 2>; clock-names = "apb_pclk"; status = "ok"; }; mailbox: mailbox@f7510000 { #mbox-cells = <1>; compatible = "hisilicon,hi6220-mbox"; reg = <0x0 0xf7510000 0x0 0x1000>, /* IPC_S */ <0x0 0x06dff800 0x0 0x0800>; /* Mailbox buffer */ interrupts = ; }; tsensor: tsensor@0,f7030700 { compatible = "hisilicon,tsensor"; reg = <0x0 0xf7030700 0x0 0x1000>; interrupts = ; clocks = <&sys_ctrl 22>; clock-names = "thermal_clk"; #thermal-sensor-cells = <1>; }; thermal-zones { local: local { polling-delay-passive = <1000>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ /* sensor ID */ thermal-sensors = <&tsensor 0>; trips { local_alert: local_alert { temperature = <70000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "passive"; }; local_crit: local_crit { temperature = <90000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; }; cooling-maps { /* There are currently no cooling maps because there are no cooling devices */ }; }; cluster1: cluster1 { polling-delay-passive = <1000>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ /* sensor ID */ thermal-sensors = <&tsensor 1>; trips { cluster1_alert: cluster1_alert { temperature = <70000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "passive"; }; cluster1_crit: cluster1_crit { temperature = <90000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; }; cooling-maps { /* There are currently no cooling maps because there are no cooling devices */ }; }; cluster0: cluster0 { polling-delay-passive = <1000>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ /* sensor ID */ thermal-sensors = <&tsensor 2>; trips { cluster0_alert: cluster0_alert { temperature = <70000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "passive"; }; cluster0_crit: cluster0_crit { temperature = <90000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; }; cooling-maps { map0 { trip = <&cluster0_alert>; cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; }; }; }; gpu: gpu { polling-delay-passive = <1000>; /* milliseconds */ polling-delay = <5000>; /* milliseconds */ /* sensor ID */ thermal-sensors = <&tsensor 3>; trips { gpu_alert: gpu_alert { temperature = <70000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "passive"; }; gpu_crit: gpu_crit { temperature = <90000>; /* millicelsius */ hysteresis = <2000>; /* millicelsius */ type = "critical"; }; }; cooling-maps { /* There are currently no cooling maps because there are no cooling devices */ }; }; }; mtcmos { compatible = "hisilicon,hi6220-mtcmos-driver"; hisilicon,mtcmos-steady-us = <10>; hisilicon,mtcmos-sc-on-base = <0xf7800000>; hisilicon,mtcmos-acpu-on-base = <0xf65a0000>; mtcmos1: regulator@a1{ regulator-name = "G3D_PD_VDD"; regulator-compatible = "mtcmos1"; hisilicon,ctrl-regs = <0x830 0x834 0x83c>; hisilicon,ctrl-data = <1 0x1>; }; mtcmos2: regulator@a2{ regulator-name = "SOC_MED"; regulator-compatible = "mtcmos2"; hisilicon,ctrl-regs = <0x830 0x834 0x83c>; hisilicon,ctrl-data = <2 0x1>; }; }; }; pmic: pmic@F8000000 { compatible = "hisilicon,hi655x-pmic-driver"; reg = <0x0 0xf8000000 0x0 0x1000>; #interrupt-cells = <2>; interrupt-controller; pmu_irq_gpio = <&gpio_pmu_irq_n>; status = "ok"; ldo2: regulator@a21 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo2"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <3200000>; hisilicon,valid-modes-mask = <0x02>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x029 0x02a 0x02b>; hisilicon,ctrl-data = <0x1 0x1>; hisilicon,vset-regs = <0x072>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <2500000>,<2600000>, <2700000>,<2800000>, <2900000>,<3000000>, <3100000>,<3200000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "sensor_analog"; }; ldo7: regulator@a26 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo7"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; hisilicon,valid-modes-mask = <0x0a>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x029 0x02a 0x02b>; hisilicon,ctrl-data = <0x6 0x1>; hisilicon,vset-regs = <0x078>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <1800000>,<1850000>, <2850000>,<2900000>, <3000000>,<3100000>, <3200000>,<3300000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "sd_card_io"; }; ldo10: regulator@a29 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo10"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3000000>; hisilicon,valid-modes-mask = <0x0a>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <360>; hisilicon,ctrl-regs = <0x02c 0x02d 0x02e>; hisilicon,ctrl-data = <0x1 0x1>; hisilicon,vset-regs = <0x07b>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <1800000>,<1850000>, <1900000>,<2750000>, <2800000>,<2850000>, <2900000>,<3000000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "sd_card"; }; ldo13: regulator@a32 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo13"; regulator-min-microvolt = <1600000>; regulator-max-microvolt = <1950000>; hisilicon,valid-modes-mask = <0x0a>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x02c 0x02d 0x02e>; hisilicon,ctrl-data = <0x4 0x1>; hisilicon,vset-regs = <0x07e>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <1600000>,<1650000>, <1700000>,<1750000>, <1800000>,<1850000>, <1900000>,<1950000>; hisilicon,num_consumer_supplies = <3>; hisilicon,consumer-supplies = "scamera_core", "mcamera_io", "scamera_io"; }; ldo14: regulator@a33 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo14"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <3200000>; hisilicon,valid-modes-mask = <0x02>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x02c 0x02d 0x02e>; hisilicon,ctrl-data = <0x5 0x1>; hisilicon,vset-regs = <0x07f>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <2500000>,<2600000>, <2700000>,<2800000>, <2900000>,<3000000>, <3100000>,<3200000>; hisilicon,num_consumer_supplies = <3>; hisilicon,consumer-supplies = "scamera_avdd", "mcamera_avdd", "mcamera_vcm"; }; ldo15: regulator@a34 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo15"; regulator-min-microvolt = <1600000>; regulator-max-microvolt = <1950000>; regulator-boot-on; regulator-always-on; hisilicon,valid-modes-mask = <0x0a>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x02c 0x02d 0x02e>; hisilicon,ctrl-data = <0x6 0x1>; hisilicon,vset-regs = <0x080>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <1600000>,<1650000>, <1700000>,<1750000>, <1800000>,<1850000>, <1900000>,<1950000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "codec_analog"; }; ldo17: regulator@a36 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo17"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <3200000>; hisilicon,valid-modes-mask = <0x02>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x02f 0x030 0x031>; hisilicon,ctrl-data = <0x0 0x1>; hisilicon,vset-regs = <0x082>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <2500000>,<2600000>, <2700000>,<2800000>, <2900000>,<3000000>, <3100000>,<3200000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "vibrator"; }; ldo19: regulator@a38 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo19"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3000000>; hisilicon,valid-modes-mask = <0x0a>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <360>; hisilicon,ctrl-regs = <0x02f 0x030 0x031>; hisilicon,ctrl-data = <0x2 0x1>; hisilicon,vset-regs = <0x084>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <1800000>,<1850000>, <1900000>,<2750000>, <2800000>,<2850000>, <2900000>,<3000000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "emmc_vddm"; }; ldo21: regulator@a40 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo21"; regulator-min-microvolt = <1650000>; regulator-max-microvolt = <2000000>; regulator-always-on; hisilicon,valid-modes-mask = <0x02>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x02f 0x030 0x031>; hisilicon,ctrl-data = <0x4 0x1>; hisilicon,vset-regs = <0x086>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <1650000>,<1700000>, <1750000>,<1800000>, <1850000>,<1900000>, <1950000>,<2000000>; }; ldo22: regulator@a41 { compatible = "hisilicon,hi655x-regulator-pmic"; regulator-name = "ldo22"; regulator-min-microvolt = <900000>; regulator-max-microvolt = <1200000>; regulator-boot-on; regulator-always-on; hisilicon,valid-modes-mask = <0x02>; hisilicon,valid-ops-mask = <0x01d>; hisilicon,initial-mode = <0x02>; hisilicon,regulator-type = <0x01>; hisilicon,off-on-delay = <120>; hisilicon,ctrl-regs = <0x02f 0x030 0x031>; hisilicon,ctrl-data = <0x5 0x1>; hisilicon,vset-regs = <0x087>; hisilicon,vset-data = <0 0x3>; hisilicon,regulator-n-vol = <8>; hisilicon,vset-table = <900000>,<1000000>, <1050000>,<1100000>, <1150000>,<1175000>, <1185000>,<1200000>; hisilicon,num_consumer_supplies = <1>; hisilicon,consumer-supplies = "mcamera_core"; }; }; };