From b5fb0cc7f1c90e3b00d40b64681efcbf8bcdeb9e Mon Sep 17 00:00:00 2001 From: Shaohui Xie Date: Wed, 3 Nov 2010 17:36:37 +0800 Subject: powerpc/fsl_rio: Fix non-standard HID1 register access Moved setting of RFXE bit so we get machine checks on RIO errors into cpu_setup so that the RIO code isn't core specific. Signed-off-by: Shaohui Xie Cc: Li Yang Cc: Roy Zang Cc: Alexandre Bounine Signed-off-by: Kumar Gala --- arch/powerpc/kernel/cpu_setup_fsl_booke.S | 6 ++++++ arch/powerpc/sysdev/fsl_rio.c | 2 -- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/powerpc') diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index 894e64fa481e..5c518ad3445c 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S @@ -64,6 +64,12 @@ _GLOBAL(__setup_cpu_e500v2) bl __e500_icache_setup bl __e500_dcache_setup bl __setup_e500_ivors +#ifdef CONFIG_RAPIDIO + /* Ensure that RFXE is set */ + mfspr r3,SPRN_HID1 + oris r3,r3,HID1_RFXE@h + mtspr SPRN_HID1,r3 +#endif mtlr r4 blr _GLOBAL(__setup_cpu_e500mc) diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 9725369d432a..4c518d17ee9b 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c @@ -1556,8 +1556,6 @@ int fsl_rio_setup(struct platform_device *dev) saved_mcheck_exception = ppc_md.machine_check_exception; ppc_md.machine_check_exception = fsl_rio_mcheck_exception; #endif - /* Ensure that RFXE is set */ - mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000)); return 0; err: -- cgit v1.2.3