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linux-linaro-lsk-v3.18-android
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(cherry-pick from commit 312fcae227037619dc858c9ccd362c7b847730a2)
This patch provides core functions for migration of zsmalloc. Migraion
policy is simple as follows.
for each size class {
while {
src_page = get zs_page from ZS_ALMOST_EMPTY
if (!src_page)
break;
dst_page = get zs_page from ZS_ALMOST_FULL
if (!dst_page)
dst_page = get zs_page from ZS_ALMOST_EMPTY
if (!dst_page)
break;
migrate(from src_page, to dst_page);
}
}
For migration, we need to identify which objects in zspage are allocated
to migrate them out. We could know it by iterating of freed objects in a
zspage because first_page of zspage keeps free objects singly-linked list
but it's not efficient. Instead, this patch adds a tag(ie,
OBJ_ALLOCATED_TAG) in header of each object(ie, handle) so we could check
whether the object is allocated easily.
This patch adds another status bit in handle to synchronize between user
access through zs_map_object and migration. During migration, we cannot
move objects user are using due to data coherency between old object and
new object.
[akpm@linux-foundation.org: zsmalloc.c needs sched.h for cond_resched()]
Signed-off-by: Minchan Kim <minchan@kernel.org>
Cc: Juneho Choi <juno.choi@lge.com>
Cc: Gunho Lee <gunho.lee@lge.com>
Cc: Luigi Semenzato <semenzato@google.com>
Cc: Dan Streetman <ddstreet@ieee.org>
Cc: Seth Jennings <sjennings@variantweb.net>
Cc: Nitin Gupta <ngupta@vflare.org>
Cc: Jerome Marchand <jmarchan@redhat.com>
Cc: Sergey Senozhatsky <sergey.senozhatsky@gmail.com>
Cc: Joonsoo Kim <iamjoonsoo.kim@lge.com>
Cc: Mel Gorman <mel@csn.ul.ie>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Bug: 25951511
Change-Id: I8653c4496085428acbdd5d4d8ca6b3993b1e5c87
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(cherry-pick from commit 3eba0c6a56c04f2b017b43641a821f1ebfb7fb4c)
Currently the underlay of zpool: zsmalloc/zbud, do not know who creates
them. There is not a method to let zsmalloc/zbud find which caller they
belong to.
Now we want to add statistics collection in zsmalloc. We need to name the
debugfs dir for each pool created. The way suggested by Minchan Kim is to
use a name passed by caller(such as zram) to create the zsmalloc pool.
/sys/kernel/debug/zsmalloc/zram0
This patch adds an argument `name' to zs_create_pool() and other related
functions.
Bug: 25951511
Change-Id: I9b18dd901e8c6b39e4b6c2aaef49b23fe7de0241
Signed-off-by: Ganesh Mahendran <opensource.ganesh@gmail.com>
Acked-by: Minchan Kim <minchan@kernel.org>
Cc: Seth Jennings <sjennings@variantweb.net>
Cc: Nitin Gupta <ngupta@vflare.org>
Cc: Dan Streetman <ddstreet@ieee.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Add ftrace event trace_sched_cpu_hotplug to track cpu
hot-add and hot-remove events.
This is useful in a variety of power, performance and
debug analysis scenarios.
Change-Id: I5d202c7a229ffacc3aafb7cf9afee0b0ee7b0931
Signed-off-by: Arun Bharadwaj <abharadw@codeaurora.org>
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Change-Id: I73f6ec437c1f805437d9376abb6510d1364b07ec
Signed-off-by: Ruchi Kandoi <kandoiruchi@google.com>
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Decare war on uninterruptible sleep. Add a tracepoint which
walks the kernel stack and dumps the first non-scheduler function
called before the scheduler is invoked.
Change-Id: I19e965d5206329360a92cbfe2afcc8c30f65c229
Signed-off-by: Riley Andrews <riandrews@google.com>
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linux-linaro-lsk-v3.18
Conflicts solution:
/* Using the latest version dts', that is except the serial
* port definition in juno.dts, others keep the pcie/master
* version.
*/
arch/arm64/boot/dts/arm/Makefile
arch/arm64/boot/dts/arm/juno-clocks.dtsi
arch/arm64/boot/dts/arm/juno.dts
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Add imx6sx iomux-gpr register field define in "imx6q-iomuxc-gpr.h" header
file, which is not fully define all iomux-gpr registers and fields, only
align with freescale internal tree related GPR macro define.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
(cherry picked from commit 49c71d1c3dccff640cc082875bd8d62988d63df9)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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* v3.18/topic/aosp: (25 commits)
wakeup: Add the guard condition for len in pm_get_active_wakeup_sources
CHROMIUM: android: Unconditionally remove callbacks in sync_fence_free()
CHROMIUM: android: fix warning when releasing active sync point
mm: reorder can_do_mlock to fix audit denial
staging: ion: debugfs to shrink pool
usb: gadget: configfs: handle gadget reset request for android
Enable adb with android-pipe in IA image
selinux: Android kernel compatibility with M userspace
selinux: extended permissions for ioctls
security: add ioctl specific auditing to lsm_audit
selinux: remove unnecessary pointer reassignment
Revert "security: lsm_audit: add ioctl specific auditing"
Revert "SELinux: per-command whitelisting of ioctls"
Revert "SELinux: use deletion-safe iterator to free list"
Revert "SELinux: ss: Fix policy write for ioctl operations"
android: add CONFIG_DEBUG_RODATA to recommended config
arm: mm: support ARCH_MMAP_RND_BITS.
mm: mmap: Add new /proc tunable for mmap_base ASLR.
Don't kill IPv4 sockets when killing IPv6 sockets was requested.
uid_cputime: Check for the range while removing range of UIDs.
...
Conflicts:
drivers/usb/gadget/Kconfig
Conflict due to android-3.18 merge trying to sneak in Android
Composite Gadget "USB_G_ANDROID" changes into
drivers/usb/gadget/Kconfig which we have already moved to
drivers/usb/gadget/legacy/Kconfig during last restructuring.
Resolution (as recommended by Amit Pundir)
Delete "USB_G_ANDROID" and dependent config option and keep only
USB_CONFIGFS_F_MIDI specific changes from AOSP commit 2ccf4f4f216f
"usb: gadget: Remove circular dependency on Config".
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linux-linaro-lsk-v3.18
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The only three users of that field are not using the msi_controller
structure anymore, so drop it altogether.
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-20-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit f075915ac0b11847fcfc8c4d55526a317e71c4d1)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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We can now lookup the base ITS domain, making it possible to
initialize the PCI/MSI code independently from the main ITS
subsystem.
This allows us to remove all the previously add hooks.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-15-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit 54456db9a23753b87ce4d49adabe7da853bf13a2)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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It is becoming obvious that having the PCI/MSI code in the same
file as the the core ITS code is giving people implementing non-PCI
MSI support the wrong kind of idea.
In order to make things a bit clearer, let's move the PCI/MSI code
out to its own file. Hopefully it will make it clear that whoever
thinks of hooking into the core ITS better have a very strong point.
We use a temporary entry point that will get removed in a subsequent
patch, once the proper infrastructure is added.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-12-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit f130420e51df30891b55efcef24f5358b2fc2b97)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Some IRQ domains are not designed to directly provide interrupts
to devices, but strictly to be used by other domains. An example
of this is the GICv3 ITS, which is completely bus agnostic, and
on which it is possible to implement a PCI/MSI domain.
Just introduce the irq_domain_bus_token property for now.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-11-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit a5716070d88cba1a0a8a18fea809ea6e3374e276)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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As for PCI, we're able to populate the msi_domain field at probe time,
provided that the device tree has an "msi-parent" property.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-9-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit c706c239af5bc297b5fbf1adc715632e1c222f7a)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Add of_pci_dma_configure() to allow updating the DMA configuration of the
PCI device using the configuration from DT of the parent of the root bridge
device. Use the newly added APIs pci_get/put_host_bridge_device() for
implementing this.
[bhelgaas: fold in fix for host bridges with no parent OF device]
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> (AMD Seattle)
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Joerg Roedel <joro@8bytes.org>
CC: Grant Likely <grant.likely@linaro.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit c49b8fc26e115a37eca6f7bcef1847eb80f2a4fd)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Add helper functions to get/put the root bus's host bridge device.
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> (AMD Seattle)
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Joerg Roedel <joro@8bytes.org>
CC: Grant Likely <grant.likely@linaro.org>
CC: Rob Herring <robh+dt@kernel.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit 6675a601d72be408025e675599702e30a99188aa)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Move of_dma_configure() to device.c so it can be re-used for PCI devices to
obtain DMA configuration from DT. Also add a second argument so that for
PCI, the DT node of root bus host bridge can be used to obtain the DMA
configuration for the slave PCI device.
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> (AMD Seattle)
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
CC: Joerg Roedel <joro@8bytes.org>
CC: Grant Likely <grant.likely@linaro.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit 1f5c69aa51f9c7c8d2a5c2e4dc339f6c7d5c15cd)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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of_iommu_configure() is called from of_dma_configure() to setup iommu ops
using DT property. This API is currently used for platform devices for
which DMA configuration (including IOMMU ops) may come from the device's
parent. To extend this functionality for PCI devices, this API needs to
take a parent node ptr as an argument instead of assuming device's parent.
This is needed since for PCI, the DMA configuration may be defined in the
DT node of the root bus bridge's parent device. Currently only dma-range
is used for PCI and IOMMU is not supported. Return error if the device is
PCI.
Add "parent" parameter (a struct device_node *) to of_iommu_configure().
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> (AMD Seattle)
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Will Deacon <will.deacon@arm.com>
CC: Joerg Roedel <joro@8bytes.org>
CC: Grant Likely <grant.likely@linaro.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: Arnd Bergmann <arnd@arndb.de>
(cherry picked from commit ed748621031c2a205749997421e59fb4dfb1e909)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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This patch extends of_dma_configure so that it sets up the IOMMU for a
device, as well as the coherent/non-coherent DMA mapping ops.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit 97890ba9289c66e23f2f2d431937693b6498d6f6)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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set_arch_dma_coherent_ops is called from of_dma_configure in order to
swizzle the architectural dma-mapping functions over to a cache-coherent
implementation. This is currently implemented only for ARM.
In anticipation of re-using this mechanism for IOMMU-backed dma-mapping
ops too, this patch replaces the function with a broader
arch_setup_dma_ops callback which will be extended in future.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit a3a60f81ee6f8fa65a57fa186b395bcd1f1bb097)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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This patch adds a new function to the iommu_ops structure to allow an
OF device to be added to a specific IOMMU instance using the recently
merged generic devicetree binding for IOMMUs. The callback (of_xlate)
takes a struct device representing the master and an of_phandle_args
representing the IOMMU and the correspondong IDs for the new master.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Joerg Roedel <jroedel@suse.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit d0f60a44f5120a8e1c48995285c7d8d1e4915b35)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Since the data pointer in the DT node is public and may be overwritten
by conflicting code, move the DT-probed IOMMU ops to a private list
where they will be safe.
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
[will: added missing #include and missing ')']
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit a42a7a1fb5f1f9004b023594609dc22da02fc08b)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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The generic IOMMU device-tree bindings can be used to add arbitrary OF
masters to an IOMMU with a compliant binding.
This patch introduces of_iommu_configure, which does exactly that.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Joerg Roedel <jroedel@suse.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit 7eba1d51485197fa77c43c42eae3ce04b4b1c1c0)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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IOMMU drivers must be initialised before any of their upstream devices,
otherwise the relevant iommu_ops won't be configured for the bus in
question. To solve this, a number of IOMMU drivers use initcalls to
initialise the driver before anything has a chance to be probed.
Whilst this solves the immediate problem, it leaves the job of probing
the IOMMU completely separate from the iommu_ops to configure the IOMMU,
which are called on a per-bus basis and require the driver to figure out
exactly which instance of the IOMMU is being requested. In particular,
the add_device callback simply passes a struct device to the driver,
which then has to parse firmware tables or probe buses to identify the
relevant IOMMU instance.
This patch takes the first step in addressing this problem by adding an
early initialisation pass for IOMMU drivers, giving them the ability to
store some per-instance data in their iommu_ops structure and store that
in their of_node. This can later be used when parsing OF masters to
identify the IOMMU instance in question.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Joerg Roedel <jroedel@suse.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
(cherry picked from commit 1cd076bf67793942ed921b766f7d461de2ebc0a2)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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If the ITS or the redistributors report their shareability as zero,
then it is important to make sure they will no generate any cacheable
traffic, as this is unlikely to produce the expected result.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1427465705-17126-5-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit 241a386c7dbb8b0db400a1f92f2ebe3b10eb661d)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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The ITS driver sometime mixes up the use of GICR_PROPBASE bitfields
for the GICR_PENDBASE register, and GITS_BASER for GICR_CBASE.
This does not lead to any observable bug because similar bits are
at the same location, but this just make the code even harder to
understand...
This patch provides the required #defines and fixes the mixup.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1427465705-17126-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit 4ad3e3634a6cbe916722c7113c5b488d52c7a3dc)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Define macros for GITS_CTLR fields to avoid using magic numbers.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Yun Wu <wuyun.wu@huawei.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1425659870-11832-11-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit 7cb991164a46992a499ecdc77b17f8ac94bdb75f)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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The ITS table allocator is only allocating a single page per table.
This works fine for most things, but leads to silent lack of
interrupt delivery if we end-up with a device that has an ID that is
out of the range defined by a single page of memory. Even worse, depending
on the page size, behaviour changes, which is not a very good experience.
A solution is actually to allocate memory for the full range of ID that
the ITS supports. A massive waste memory wise, but at least a safe bet.
Tested on a Phytium SoC.
Tested-by: Chen Baozi <chenbaozi@kylinos.com.cn>
Acked-by: Chen Baozi <chenbaozi@kylinos.com.cn>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1425659870-11832-3-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit f54b97ed0b17d3da5f98ba8188cd5646415a922d)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Commit
853a33ce6932 irqchip: gic-v2m: Add support for ARM GICv2m MSI(-X) doorbell
Introduced a series of warnings when building ARM multi_v7_defconfig:
include/linux/irqchip/arm-gic.h:109:53: warning: its scope is only this definition or declaration, which is probably not what you want
In file included from arch/arm/mach-ux500/pm.c:13:0:
include/linux/irqchip/arm-gic.h:109:53: warning: 'struct irq_domain' declared inside parameter list
int gicv2m_of_init(struct device_node *node, struct irq_domain *parent);
^
Fix this by adding the proper include.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
[ jac merged much more correct version from Marc into this patch ]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Link: https://lkml.kernel.org/r/1417170975-1163-1-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit df870c78848aac4d953f61a8926a792de8133b9e)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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ARM GICv2m specification extends GICv2 to support MSI(-X) with
a new register frame. This allows a GICv2 based system to support
MSI with minimal changes.
Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
[maz: converted the driver to use stacked irq domains,
updated changelog]
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416941243-7181-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit 853a33ce6932601030f550653aea91a0e0a71511)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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As the ITS is always a subsystem if GICv3, its probing/init is
driven by the main GICv3 code.
Plug that code in (guarded by a config option).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416839720-18400-12-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit da33f31de3e1eebb198109c1cccdc3a094e369c4)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Now, the bit of code that allow us to use the ITS as a MSI controller.
Both MSI and MSI-X are supported.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416839720-18400-10-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit b48ac83d6bbc20a973c3e8133fd1ebda873d026a)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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The ITS is configured through a number commands that the driver
issues to the HW using a memory-based circular buffer.
This patch implements the subset of commands that are required
for Linux.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416839720-18400-5-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit cc2d3216f53c9fff0030eb71cacc4ce5f39d1d7e)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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The basic GICv3 driver has almost no use for the redistributor
(other than the basic per-CPU interrupts), but the ITS needs
a lot more from them.
As such, rework the set of data structures. The behaviour of the
GICv3 driver is otherwise unaffected.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Link: https://lkml.kernel.org/r/1416839720-18400-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit f5c1434c217fd72ac0d24d3142d09e49a3d4e72e)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Use io{read,write}32be if the caller specified IRQ_GC_BE_IO when creating
the irqchip.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-5-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit b79055952badbd73710685643bab44104f2509ea)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Currently, these I/O accessors always assume little endian 32-bit
registers (readl/writel). On some systems the IRQ registers need to be
accessed in BE mode or using 16-bit loads/stores, so we will provide a
way to override the default behavior.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-4-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit 2b28037632b1e62b92c0616f08652d806008c80d)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Pass in the irq_chip_generic struct so we can use different readl/writel
settings for each irqchip driver, when appropriate. Compute
(gc->reg_base + reg_offset) in the helper function because this is pretty
much what all callers want to do anyway.
Compile-tested using the following configurations:
at91_dt_defconfig (CONFIG_ATMEL_AIC_IRQ=y)
sama5_defconfig (CONFIG_ATMEL_AIC5_IRQ=y)
sunxi_defconfig (CONFIG_ARCH_SUNXI=y)
tb10x (ARC) is untested.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Acked-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.kernel.org/r/1415342669-30640-3-git-send-email-cernekee@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
(cherry picked from commit 332fd7c4fef5f3b166e93decb07fd69eb24f7998)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Userspace can close the sync device while there are still active fence
points, in which case kernel produces the following warning:
[ 43.853176] ------------[ cut here ]------------
[ 43.857834] WARNING: CPU: 0 PID: 892 at /mnt/host/source/src/third_party/kernel/v3.18/drivers/staging/android/sync.c:439 android_fence_release+0x88/0x104()
[ 43.871741] CPU: 0 PID: 892 Comm: Binder_5 Tainted: G U 3.18.0-07661-g0550ce9 #1
[ 43.880176] Hardware name: Google Tegra210 Smaug Rev 1+ (DT)
[ 43.885834] Call trace:
[ 43.888294] [<ffffffc000207464>] dump_backtrace+0x0/0x10c
[ 43.893697] [<ffffffc000207580>] show_stack+0x10/0x1c
[ 43.898756] [<ffffffc000ab1258>] dump_stack+0x74/0xb8
[ 43.903814] [<ffffffc00021d414>] warn_slowpath_common+0x84/0xb0
[ 43.909736] [<ffffffc00021d530>] warn_slowpath_null+0x14/0x20
[ 43.915482] [<ffffffc00088aefc>] android_fence_release+0x84/0x104
[ 43.921582] [<ffffffc000671cc4>] fence_release+0x104/0x134
[ 43.927066] [<ffffffc00088b0cc>] sync_fence_free+0x74/0x9c
[ 43.932552] [<ffffffc00088b128>] sync_fence_release+0x34/0x48
[ 43.938304] [<ffffffc000317bbc>] __fput+0x100/0x1b8
[ 43.943185] [<ffffffc000317cc8>] ____fput+0x8/0x14
[ 43.947982] [<ffffffc000237f38>] task_work_run+0xb0/0xe4
[ 43.953297] [<ffffffc000207074>] do_notify_resume+0x44/0x5c
[ 43.958867] ---[ end trace 5a2aa4027cc5d171 ]---
Let's fix it by introducing a new optional callback (disable_signaling)
to fence operations so that drivers can do proper clean ups when we
remove last callback for given fence.
BUG=chrome-os-partner:40303
TEST=Boot Smaug and observe that warning is gone.
Change-Id: I05c34dcf74438c28405438c7ead0706b1f810fff
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/303409
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
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Many PCI controllers' configuration space accesses are memory-mapped and
vary only in address calculation and access checks. There are 2 main
access methods: a decoded address space such as ECAM or a single address
and data register similar to x86. This implementation can support both
cases as well as be used in cases that need additional pre- or post-access
handling.
Add a new pci_ops member, map_bus, which can do access checks and any
necessary setup. It returns the address to use for the configuration space
access. The access types supported are 32-bit only accesses or correct
byte, word, or dword sized accesses.
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit 1f94a94f67e1083e19fb7b436dd7ca7a4ba03f2b)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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In order to populate the PCI host bridge msi_domain, use the
"msi-parent" attribute to lookup a corresponding irq domain.
If found, this is our MSI domain.
This gets plugged into the core PCI code.
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-6-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit b165e2b60b39888a7ff8efbc1de40137471dda41)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Add a stub for pci_device_to_OF_node() so drivers don't need to
use #ifdef CONFIG_OF around calls to it.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
(cherry picked from commit f0b66a2cf68ed3613fe72fe01ed309f998e2bbb3)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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When creating a PCI/MSI domain, tag it with DOMAIN_BUS_PCI_MSI so
that it can be looked-up using irq_find_matching_host().
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-3-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit 0380839dc90c53e24ddfa0f17ad909c2ddc345c2)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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As MSI-type features are creeping into non-PCI devices, it is
starting to make sense to give our struct device some form of
support for this, by allowing a pointer to an MSI irq domain to
be set/retrieved.
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-4-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit f1421db8ca4c110144be97a5997ed83d34685db5)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
Conflicts solution:
include/linux/device.h /* skip msi_list in comments */
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It is not uncommon (at least with the ARM stuff) to have a piece
of hardware that implements different flavours of "interrupts".
A typical example of this is the GICv3 ITS, which implements
standard PCI/MSI support, but also some form of "generic MSI".
So far, the PCI/MSI domain is registered using the ITS device_node,
so that irq_find_host can return it. On the contrary, the raw MSI
domain is not registered with an device_node, making it impossible
to be looked up by another subsystem (obviously, using the same
device_node twice would only result in confusion, as it is not
defined which one irq_find_host would return).
A solution to this is to "type" domains that may be aliasing, and
to be able to lookup an device_node that matches a given type.
For this, we introduce irq_find_matching_host() as a superset
of irq_find_host:
struct irq_domain *irq_find_matching_host(struct device_node *node,
enum irq_domain_bus_token bus_token);
where bus_token is the "type" we want to match the domain against
(so far, only DOMAIN_BUS_ANY is defined). This result in some
moderately invasive changes on the PPC side (which is the only
user of the .match method).
This has otherwise no functionnal change.
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit ad3aedfbb04b3a2af54473cfe31f13953cfe9d84)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
Conflicts solution:
add arch/powerpc/platforms/powernv/opal-irqchip.c
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Add helper function msi_desc_to_pci_sysdata() to retrieve sysdata from
an MSI descriptor. To avoid pulling include/linux/pci.h into
include/linux/msi.h, msi_desc_to_pci_sysdata() is implemented as a normal
function instead of an inline function.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Reviewed-by: Yijing Wang <wangyijing@huawei.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Alexander Gordeev <agordeev@redhat.com>
Link: http://lkml.kernel.org/r/1436428847-8886-2-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit c179c9b978b90bdf9cb39f5b5716dede157f1eaf)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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Rename irq_data_get_msi() as irq_data_get_msi_desc() to keep consistency
with other irq_data access helpers.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
(cherry picked from commit c391f262bee9d0d6424a99c85183a06c50e307ee)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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No point to expose this to the world. The only legitimate user is the
core code.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
(cherry picked from commit 74faaf7aa64c76b60db0f5c994fd43a46be772ce)
Signed-off-by: Alex Shi <alex.shi@linaro.org>
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