aboutsummaryrefslogtreecommitdiff
path: root/drivers
diff options
context:
space:
mode:
authorMarc Zyngier <marc.zyngier@arm.com>2015-09-13 12:14:32 +0100
committerAlex Shi <alex.shi@linaro.org>2015-11-08 11:17:56 +0800
commite90877af11c25b5c370c47942408d4b3def3c328 (patch)
tree1da0e1beeb45a896888d5a6666c84a00aa942017 /drivers
parent516e6d13df6eff703621db0c61bc89e410b44ed7 (diff)
irqchip/gic-v3-its: Add missing cache flushes
When the ITS is configured for non-cacheable transactions, make sure that the allocated, zeroed memory is flushed to the Point of Coherency, allowing the ITS to observe the zeros instead of random garbage (or even get its own data overwritten by zeros being evicted from the cache...). Fixes: 241a386c7dbb "irqchip: gicv3-its: Use non-cacheable accesses when no shareability" Reported-and-tested-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Pavel Fedin <p.fedin@samsung.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1442142873-20213-3-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> (cherry picked from commit 5a9a8915c8888b615521b17d70a4342187eae60b) Signed-off-by: Alex Shi <alex.shi@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/irqchip/irq-gic-v3-its.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 1447d127b452..a89fe14a0287 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -899,8 +899,10 @@ retry_baser:
* non-cacheable as well.
*/
shr = tmp & GITS_BASER_SHAREABILITY_MASK;
- if (!shr)
+ if (!shr) {
cache = GITS_BASER_nC;
+ __flush_dcache_area(base, alloc_size);
+ }
goto retry_baser;
}
@@ -1141,6 +1143,8 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
return NULL;
}
+ __flush_dcache_area(itt, sz);
+
dev->its = its;
dev->itt = itt;
dev->nr_ites = nr_ites;