diff options
author | Suzuki K. Poulose <suzuki.poulose@arm.com> | 2015-01-21 12:43:11 +0000 |
---|---|---|
committer | David Brown <david.brown@linaro.org> | 2015-12-03 16:53:47 -0800 |
commit | b8da49cc08e90f3e0dccae3d5b7eca414154eacf (patch) | |
tree | 7836644a022e01b49ad4ec77c6beebd57cb924cc /arch/arm64/Kconfig | |
parent | 9a2eab91078346f0a7885b2f29a487a397a508e0 (diff) |
arm64: Emulate SETEND for AArch32 tasks
commit 2d888f48e056119495847a269a435d5c3d9df349 upstream.
Emulate deprecated 'setend' instruction for AArch32 bit tasks.
setend [le/be] - Sets the endianness of EL0
On systems with CPUs which support mixed endian at EL0, the hardware
support for the instruction can be enabled by setting the SCTLR_EL1.SED
bit. Like the other emulated instructions it is controlled by an entry in
/proc/sys/abi/. For more information see :
Documentation/arm64/legacy_instructions.txt
The instruction is emulated by setting/clearing the SPSR_EL1.E bit, which
will be reflected in the PSTATE.E in AArch32 context.
This patch also restores the native endianness for the execution of signal
handlers, since the process could have changed the endianness.
Note: All CPUs on the system must have mixed endian support at EL0. Once the
handler is registered, hotplugging a CPU which doesn't support mixed endian,
could lead to unexpected results/behavior in applications.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: David Brown <david.brown@linaro.org>
Diffstat (limited to 'arch/arm64/Kconfig')
-rw-r--r-- | arch/arm64/Kconfig | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 4c79862392b1..7f74b4ce7934 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -544,6 +544,21 @@ config CP15_BARRIER_EMULATION If unsure, say Y +config SETEND_EMULATION + bool "Emulate SETEND instruction" + help + The SETEND instruction alters the data-endianness of the + AArch32 EL0, and is deprecated in ARMv8. + + Say Y here to enable software emulation of the instruction + for AArch32 userspace code. + + Note: All the cpus on the system must have mixed endian support at EL0 + for this feature to be enabled. If a new CPU - which doesn't support mixed + endian - is hotplugged in after this feature has been enabled, there could + be unexpected results in the applications. + + If unsure, say Y endif endmenu |