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-rw-r--r--arch/alpha/kernel/time.c3
-rw-r--r--arch/arm/common/timer-sp.c8
-rw-r--r--arch/arm/kernel/smp_twd.c7
-rw-r--r--arch/arm/mach-at91/at91rm9200_time.c1
-rw-r--r--arch/arm/mach-clps711x/common.c3
-rw-r--r--arch/arm/mach-cns3xxx/core.c8
-rw-r--r--arch/arm/mach-imx/epit.c9
-rw-r--r--arch/arm/mach-imx/time.c9
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c9
-rw-r--r--arch/arm/mach-ixp4xx/common.c7
-rw-r--r--arch/arm/mach-netx/time.c13
-rw-r--r--arch/arm/mach-omap1/timer32k.c5
-rw-r--r--arch/arm/mach-omap2/timer.c5
-rw-r--r--arch/arm/mach-spear/time.c10
-rw-r--r--arch/arm/mach-w90x900/time.c5
-rw-r--r--arch/arm/plat-iop/time.c7
-rw-r--r--arch/arm/plat-orion/time.c8
-rw-r--r--arch/mips/kernel/cevt-ds1287.c8
-rw-r--r--arch/mips/kernel/cevt-gt641xx.c6
-rw-r--r--arch/mips/kernel/cevt-txx9.c5
-rw-r--r--arch/mips/loongson/common/cs5536/cs5536_mfgpt.c7
-rw-r--r--arch/mips/ralink/cevt-rt3352.c1
-rw-r--r--arch/powerpc/kernel/time.c8
-rw-r--r--arch/sparc/kernel/time_32.c6
-rw-r--r--arch/tile/kernel/time.c3
-rw-r--r--drivers/clocksource/bcm_kona_timer.c8
-rw-r--r--drivers/clocksource/cs5535-clockevt.c4
-rw-r--r--drivers/clocksource/exynos_mct.c7
-rw-r--r--drivers/clocksource/moxart_timer.c8
-rw-r--r--drivers/clocksource/mxs_timer.c7
-rw-r--r--drivers/clocksource/samsung_pwm_timer.c6
-rw-r--r--drivers/clocksource/sun4i_timer.c8
-rw-r--r--drivers/clocksource/tegra20_timer.c5
-rw-r--r--drivers/clocksource/time-armada-370-xp.c8
-rw-r--r--drivers/clocksource/time-orion.c8
-rw-r--r--drivers/clocksource/timer-marco.c8
-rw-r--r--drivers/clocksource/timer-sun5i.c8
37 files changed, 113 insertions, 133 deletions
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index bae51cdee967..97b8bac91d30 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -177,13 +177,12 @@ qemu_ce_set_mode(enum clock_event_mode mode, struct clock_event_device *ce)
{
/* The mode member of CE is updated for us in generic code.
Just make sure that the event is disabled. */
- qemu_set_alarm_abs(0);
-
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
+ qemu_set_alarm_abs(0);
break;
default:
diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c
index 0dc511c1b16b..765543a51d93 100644
--- a/arch/arm/common/timer-sp.c
+++ b/arch/arm/common/timer-sp.c
@@ -131,12 +131,10 @@ static int sp804_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
unsigned long ctrl = TIMER_CTRL_32BIT | TIMER_CTRL_IE;
- int ret = 0;
-
- writel(ctrl, clkevt_base + TIMER_CTRL);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ writel(ctrl, clkevt_base + TIMER_CTRL);
writel(clkevt_reload, clkevt_base + TIMER_LOAD);
ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
break;
@@ -155,11 +153,11 @@ static int sp804_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_RESUME:
break;
default:
- ret = -ENOSYS;
+ return -ENOSYS;
}
writel(ctrl, clkevt_base + TIMER_CTRL);
- return ret;
+ return 0;
}
static int sp804_set_next_event(unsigned long next,
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index fc6593c44746..9ecf1ed9dced 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -40,7 +40,6 @@ static int twd_set_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
unsigned long ctrl;
- int ret = 0;
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
@@ -53,18 +52,18 @@ static int twd_set_mode(enum clock_event_mode mode,
/* period set, and timer enabled in 'next_event' hook */
ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
ctrl = 0;
break;
+ default:
+ return -ENOSYS;
}
writel_relaxed(ctrl, twd_base + TWD_TIMER_CONTROL);
- return ret;
+ return 0;
}
static int twd_set_next_event(unsigned long evt,
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index fa30fcd2e883..e609a406bd1d 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -141,6 +141,7 @@ clkevt32k_mode(enum clock_event_mode mode, struct clock_event_device *dev)
irqmask = 0;
break;
default:
+ /* irqmask retains value from last call */
ret = -ENOSYS;
}
at91_st_write(AT91_ST_IER, irqmask);
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 8c4a9dbf95c1..0f40eada1b2d 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -267,8 +267,6 @@ static u64 notrace clps711x_sched_clock_read(void)
static int clps711x_clockevent_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- disable_irq(IRQ_TC2OI);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
enable_irq(IRQ_TC2OI);
@@ -276,6 +274,7 @@ static int clps711x_clockevent_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_RESUME:
+ disable_irq(IRQ_TC2OI);
/* Left event sources disabled, no more interrupts appear */
break;
default:
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c
index d83098cce3ca..71e1e732e0f8 100644
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -86,7 +86,7 @@ static int cns3xxx_timer_set_mode(enum clock_event_mode mode,
{
unsigned long ctrl = readl(cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
int pclk = cns3xxx_cpu_clock() / 8;
- int reload, ret = 0;
+ int reload;
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
@@ -98,18 +98,18 @@ static int cns3xxx_timer_set_mode(enum clock_event_mode mode,
/* period set, and timer enabled in 'next_event' hook */
ctrl |= (1 << 2) | (1 << 9);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
ctrl = 0;
break;
+ default:
+ return -ENOSYS;
}
writel(ctrl, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);
- return ret;
+ return 0;
}
static int cns3xxx_timer_set_next_event(unsigned long evt,
diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c
index 239d6fc8b9e8..8f74753385f1 100644
--- a/arch/arm/mach-imx/epit.c
+++ b/arch/arm/mach-imx/epit.c
@@ -127,8 +127,6 @@ static int epit_set_mode(enum clock_event_mode mode,
epit_irq_acknowledge();
}
- /* Remember timer mode */
- clockevent_mode = mode;
local_irq_restore(flags);
switch (mode) {
@@ -150,8 +148,15 @@ static int epit_set_mode(enum clock_event_mode mode,
/* Left event sources disabled, no more interrupts appear */
break;
default:
+ /* Enable interrupts again */
+ local_irq_save(flags);
+ epit_irq_enable();
+ local_irq_restore(flags);
return -ENOSYS;
}
+
+ /* Remember timer mode */
+ clockevent_mode = mode;
return 0;
}
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c
index ba091981f204..4ac1b147d3fb 100644
--- a/arch/arm/mach-imx/time.c
+++ b/arch/arm/mach-imx/time.c
@@ -200,8 +200,6 @@ static int mxc_set_mode(enum clock_event_mode mode,
clock_event_mode_label[mode]);
#endif /* DEBUG */
- /* Remember timer mode */
- clockevent_mode = mode;
local_irq_restore(flags);
switch (mode) {
@@ -223,8 +221,15 @@ static int mxc_set_mode(enum clock_event_mode mode,
/* Left event sources disabled, no more interrupts appear */
break;
default:
+ /* Enable interrupts again */
+ local_irq_save(flags);
+ gpt_irq_enable();
+ local_irq_restore(flags);
return -ENOSYS;
}
+
+ /* Remember timer mode */
+ clockevent_mode = mode;
return 0;
}
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index cf99de805e3d..dccac71af23f 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -312,20 +312,17 @@ static int clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device
{
u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
- /* Disable timer */
- writel(ctrl, clkevt_base + TIMER_CTRL);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ writel(ctrl, clkevt_base + TIMER_CTRL);
/* Enable the timer and start the periodic tick */
writel(timer_reload, clkevt_base + TIMER_LOAD);
ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
- writel(ctrl, clkevt_base + TIMER_CTRL);
break;
case CLOCK_EVT_MODE_ONESHOT:
+ writel(ctrl, clkevt_base + TIMER_CTRL);
/* Leave the timer disabled, .set_next_event will enable it */
ctrl &= ~TIMER_CTRL_PERIODIC;
- writel(ctrl, clkevt_base + TIMER_CTRL);
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
@@ -336,6 +333,8 @@ static int clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device
default:
return -ENOSYS;
}
+
+ writel(ctrl, clkevt_base + TIMER_CTRL);
return 0;
}
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index bfeb36af005c..e1b6f96a13e4 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -517,7 +517,6 @@ static int ixp4xx_set_mode(enum clock_event_mode mode,
{
unsigned long opts = *IXP4XX_OSRT1 & IXP4XX_OST_RELOAD_MASK;
unsigned long osrt = *IXP4XX_OSRT1 & ~IXP4XX_OST_RELOAD_MASK;
- int ret = 0;
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
@@ -536,15 +535,15 @@ static int ixp4xx_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_RESUME:
opts |= IXP4XX_OST_ENABLE;
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
osrt = opts = 0;
break;
+ default:
+ return -ENOSYS;
}
*IXP4XX_OSRT1 = osrt | opts;
- return ret;
+ return 0;
}
static struct clock_event_device clockevent_ixp4xx = {
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c
index 311f4beed6a2..8baa83deb206 100644
--- a/arch/arm/mach-netx/time.c
+++ b/arch/arm/mach-netx/time.c
@@ -35,13 +35,10 @@ static int netx_set_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
u32 tmode;
- int ret = 0;
-
- /* disable timer */
- writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
writel(LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
NETX_GPIO_COUNTER_CTRL_IRQ_EN |
@@ -49,24 +46,24 @@ static int netx_set_mode(enum clock_event_mode mode,
break;
case CLOCK_EVT_MODE_ONESHOT:
+ writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN |
NETX_GPIO_COUNTER_CTRL_RUN;
break;
- default:
- ret = -ENOSYS;
- /* fall through */
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
tmode = 0;
break;
+ default:
+ return -ENOSYS;
}
writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
- return ret;
+ return 0;
}
static int netx_set_next_event(unsigned long evt,
diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c
index df0b45d6d5a1..1cc57bb3ea2a 100644
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -122,18 +122,17 @@ static int omap_32k_timer_set_next_event(unsigned long delta,
static int omap_32k_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- omap_32k_timer_stop();
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ omap_32k_timer_stop();
omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
break;
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
- break;
case CLOCK_EVT_MODE_RESUME:
+ omap_32k_timer_stop();
break;
default:
return -ENOSYS;
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 1282a886abd2..c4f71e9c3960 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -106,10 +106,9 @@ static int omap2_gp_timer_set_mode(enum clock_event_mode mode,
{
u32 period;
- __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
period = clkev.rate / HZ;
period -= 1;
/* Looks like we need to first set the load value separately */
@@ -120,11 +119,11 @@ static int omap2_gp_timer_set_mode(enum clock_event_mode mode,
0xffffffff - period, OMAP_TIMER_POSTED);
break;
case CLOCK_EVT_MODE_ONESHOT:
- break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ __omap_dm_timer_stop(&clkev, OMAP_TIMER_POSTED, clkev.rate);
break;
default:
return -ENOSYS;
diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c
index b65fe2235044..d26d303e5c8a 100644
--- a/arch/arm/mach-spear/time.c
+++ b/arch/arm/mach-spear/time.c
@@ -112,10 +112,11 @@ static int clockevent_set_mode(enum clock_event_mode mode,
/* stop the timer */
val = readw(gpt_base + CR(CLKEVT));
val &= ~CTRL_ENABLE;
- writew(val, gpt_base + CR(CLKEVT));
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ writew(val, gpt_base + CR(CLKEVT));
+
period = clk_get_rate(gpt_clk) / HZ;
period >>= CTRL_PRESCALER16;
writew(period, gpt_base + LOAD(CLKEVT));
@@ -123,24 +124,25 @@ static int clockevent_set_mode(enum clock_event_mode mode,
val = readw(gpt_base + CR(CLKEVT));
val &= ~CTRL_ONE_SHOT;
val |= CTRL_ENABLE | CTRL_INT_ENABLE;
- writew(val, gpt_base + CR(CLKEVT));
break;
case CLOCK_EVT_MODE_ONESHOT:
+ writew(val, gpt_base + CR(CLKEVT));
+
val = readw(gpt_base + CR(CLKEVT));
val |= CTRL_ONE_SHOT;
- writew(val, gpt_base + CR(CLKEVT));
break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
-
break;
default:
return -ENOSYS;
}
+
+ writew(val, gpt_base + CR(CLKEVT));
return 0;
}
diff --git a/arch/arm/mach-w90x900/time.c b/arch/arm/mach-w90x900/time.c
index a097b71c2dc8..560e299e6ada 100644
--- a/arch/arm/mach-w90x900/time.c
+++ b/arch/arm/mach-w90x900/time.c
@@ -52,7 +52,6 @@ static int nuc900_clockevent_setmode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
unsigned int val;
- int ret = 0;
val = __raw_readl(REG_TCSR0);
val &= ~(0x03 << 27);
@@ -76,11 +75,11 @@ static int nuc900_clockevent_setmode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_RESUME:
break;
default:
- ret = -ENOSYS;
+ return -ENOSYS;
}
__raw_writel(val, REG_TCSR0);
- return ret;
+ return 0;
}
static int nuc900_clockevent_setnextevent(unsigned long evt,
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 96596458e28e..c9882ad11201 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -81,7 +81,6 @@ static int iop_set_mode(enum clock_event_mode mode,
struct clock_event_device *unused)
{
u32 tmr = read_tmr0();
- int ret = 0;
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
@@ -97,17 +96,17 @@ static int iop_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_RESUME:
tmr |= IOP_TMR_EN;
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
tmr &= ~IOP_TMR_EN;
break;
+ default:
+ return -ENOSYS;
}
write_tmr0(tmr);
- return ret;
+ return 0;
}
static struct clock_event_device iop_clockevent = {
diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c
index cda982aa4f42..32417f3408b5 100644
--- a/arch/arm/plat-orion/time.c
+++ b/arch/arm/plat-orion/time.c
@@ -110,7 +110,6 @@ static int
orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
{
unsigned long flags;
- int ret = 0;
u32 u;
local_irq_save(flags);
@@ -136,8 +135,6 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
timer_base + TIMER_CTRL_OFF);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
@@ -160,9 +157,12 @@ orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
*/
writel(bridge_timer1_clr_mask, bridge_base + BRIDGE_CAUSE_OFF);
break;
+ default:
+ local_irq_restore(flags);
+ return -ENOSYS;
}
local_irq_restore(flags);
- return ret;
+ return 0;
}
static struct clock_event_device orion_clkevt = {
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c
index db58c38dd1b8..f86642a5247f 100644
--- a/arch/mips/kernel/cevt-ds1287.c
+++ b/arch/mips/kernel/cevt-ds1287.c
@@ -63,7 +63,6 @@ static int ds1287_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
u8 val;
- int ret = 0;
spin_lock(&rtc_lock);
@@ -73,19 +72,20 @@ static int ds1287_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_PERIODIC:
val |= RTC_PIE;
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
val &= ~RTC_PIE;
break;
+ default:
+ spin_unlock(&rtc_lock);
+ return -ENOSYS;
}
CMOS_WRITE(val, RTC_REG_B);
spin_unlock(&rtc_lock);
- return ret;
+ return 0;
}
static void ds1287_event_handler(struct clock_event_device *dev)
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c
index 04513b18c573..0856965c0e05 100644
--- a/arch/mips/kernel/cevt-gt641xx.c
+++ b/arch/mips/kernel/cevt-gt641xx.c
@@ -68,7 +68,6 @@ static int gt641xx_timer0_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
u32 ctrl;
- int ret = 0;
raw_spin_lock(&gt641xx_timer_lock);
@@ -88,13 +87,14 @@ static int gt641xx_timer0_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
break;
default:
- ret = -ENOSYS;
+ raw_spin_unlock(&gt641xx_timer_lock);
+ return -ENOSYS;
}
GT_WRITE(GT_TC_CONTROL_OFS, ctrl);
raw_spin_unlock(&gt641xx_timer_lock);
- return ret;
+ return 0;
}
static void gt641xx_timer0_event_handler(struct clock_event_device *dev)
diff --git a/arch/mips/kernel/cevt-txx9.c b/arch/mips/kernel/cevt-txx9.c
index 57ec9edb1e4c..1c765067dd47 100644
--- a/arch/mips/kernel/cevt-txx9.c
+++ b/arch/mips/kernel/cevt-txx9.c
@@ -83,9 +83,9 @@ static int txx9tmr_set_mode(enum clock_event_mode mode,
container_of(evt, struct txx9_clock_event_device, cd);
struct txx9_tmr_reg __iomem *tmrptr = txx9_cd->tmrptr;
- txx9tmr_stop_and_clear(tmrptr);
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ txx9tmr_stop_and_clear(tmrptr);
__raw_writel(TXx9_TMITMR_TIIE | TXx9_TMITMR_TZCE,
&tmrptr->itmr);
/* start timer */
@@ -97,12 +97,15 @@ static int txx9tmr_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_UNUSED:
+ txx9tmr_stop_and_clear(tmrptr);
__raw_writel(0, &tmrptr->itmr);
break;
case CLOCK_EVT_MODE_ONESHOT:
+ txx9tmr_stop_and_clear(tmrptr);
__raw_writel(TXx9_TMITMR_TIIE, &tmrptr->itmr);
break;
case CLOCK_EVT_MODE_RESUME:
+ txx9tmr_stop_and_clear(tmrptr);
__raw_writel(TIMER_CCD, &tmrptr->ccdr);
__raw_writel(0, &tmrptr->itmr);
break;
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
index b981ada784fc..846f4ab7442a 100644
--- a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
+++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c
@@ -55,8 +55,6 @@ EXPORT_SYMBOL(enable_mfgpt0_counter);
static int init_mfgpt_timer(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- int ret = 0;
-
spin_lock(&mfgpt_lock);
switch (mode) {
@@ -77,10 +75,11 @@ static int init_mfgpt_timer(enum clock_event_mode mode,
/* Nothing to do here */
break;
default:
- ret = -ENOSYS;
+ spin_unlock(&mfgpt_lock);
+ return -ENOSYS;
}
spin_unlock(&mfgpt_lock);
- return ret;
+ return 0;
}
static struct clock_event_device mfgpt_clockevent = {
diff --git a/arch/mips/ralink/cevt-rt3352.c b/arch/mips/ralink/cevt-rt3352.c
index f86c200240ef..1c22617224a6 100644
--- a/arch/mips/ralink/cevt-rt3352.c
+++ b/arch/mips/ralink/cevt-rt3352.c
@@ -113,7 +113,6 @@ static int systick_set_clock_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_RESUME:
- pr_err("%s: Unhandeled mips clock_mode\n", systick.dev.name);
break;
default:
return -ENOSYS;
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 4d4ecb5fde04..78e08345b1eb 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -818,11 +818,7 @@ static int decrementer_set_next_event(unsigned long evt,
static void decrementer_set_mode(enum clock_event_mode mode,
struct clock_event_device *dev)
{
- int ret = 0;
-
switch (mode) {
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
@@ -831,8 +827,10 @@ static void decrementer_set_mode(enum clock_event_mode mode,
break;
case CLOCK_EVT_MODE_ONESHOT:
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static void register_decrementer_clockevent(int cpu)
diff --git a/arch/sparc/kernel/time_32.c b/arch/sparc/kernel/time_32.c
index 0a681177f44f..4861c531aa42 100644
--- a/arch/sparc/kernel/time_32.c
+++ b/arch/sparc/kernel/time_32.c
@@ -110,8 +110,6 @@ irqreturn_t notrace timer_interrupt(int dummy, void *dev_id)
static int timer_ce_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
case CLOCK_EVT_MODE_RESUME:
@@ -123,10 +121,10 @@ static int timer_ce_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_UNUSED:
break;
default:
- ret = -ENOSYS;
+ return -ENOSYS;
}
smp_mb();
- return ret;
+ return 0;
}
static __init void setup_timer_ce(void)
diff --git a/arch/tile/kernel/time.c b/arch/tile/kernel/time.c
index 994eef445c38..b81b7df07b30 100644
--- a/arch/tile/kernel/time.c
+++ b/arch/tile/kernel/time.c
@@ -143,14 +143,13 @@ static int tile_timer_set_next_event(unsigned long ticks,
static int tile_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- arch_local_irq_mask_now(INT_TILE_TIMER);
-
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ arch_local_irq_mask_now(INT_TILE_TIMER);
break;
default:
return -ENOSYS;
diff --git a/drivers/clocksource/bcm_kona_timer.c b/drivers/clocksource/bcm_kona_timer.c
index 771332f67dca..9f9c11bf0362 100644
--- a/drivers/clocksource/bcm_kona_timer.c
+++ b/drivers/clocksource/bcm_kona_timer.c
@@ -131,22 +131,20 @@ static int kona_timer_set_next_event(unsigned long clc,
static int kona_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *unused)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
/* by default mode is one shot don't do any thing */
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
kona_timer_disable_and_clear(timers.tmr_regs);
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static struct clock_event_device kona_clockevent_timer = {
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index 88909148c278..a9c166842c1b 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -80,10 +80,9 @@ static void start_timer(struct cs5535_mfgpt_timer *timer, uint16_t delta)
static int mfgpt_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- disable_timer(cs5535_event_clock);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ disable_timer(cs5535_event_clock);
start_timer(cs5535_event_clock, MFGPT_PERIODIC);
break;
case CLOCK_EVT_MODE_ONESHOT:
@@ -91,6 +90,7 @@ static int mfgpt_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ disable_timer(cs5535_event_clock);
break;
default:
return -ENOSYS;
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c
index 177504b5b567..d65ca62a4fe4 100644
--- a/drivers/clocksource/exynos_mct.c
+++ b/drivers/clocksource/exynos_mct.c
@@ -248,10 +248,10 @@ static int exynos4_comp_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
unsigned long cycles_per_jiffy;
- exynos4_mct_comp0_stop();
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ exynos4_mct_comp0_stop();
cycles_per_jiffy =
(((unsigned long long) NSEC_PER_SEC / HZ * evt->mult) >> evt->shift);
exynos4_mct_comp0_start(mode, cycles_per_jiffy);
@@ -262,6 +262,7 @@ static int exynos4_comp_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ exynos4_mct_comp0_stop();
break;
default:
return -ENOSYS;
@@ -356,10 +357,9 @@ static inline int exynos4_tick_set_mode(enum clock_event_mode mode,
struct mct_clock_event_device *mevt = this_cpu_ptr(&percpu_mct_tick);
unsigned long cycles_per_jiffy;
- exynos4_mct_tick_stop(mevt);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ exynos4_mct_tick_stop(mevt);
cycles_per_jiffy =
(((unsigned long long) NSEC_PER_SEC / HZ * evt->mult) >> evt->shift);
exynos4_mct_tick_start(cycles_per_jiffy, mevt);
@@ -370,6 +370,7 @@ static inline int exynos4_tick_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ exynos4_mct_tick_stop(mevt);
break;
default:
return -ENOSYS;
diff --git a/drivers/clocksource/moxart_timer.c b/drivers/clocksource/moxart_timer.c
index bccce6025722..2db0a8be0d48 100644
--- a/drivers/clocksource/moxart_timer.c
+++ b/drivers/clocksource/moxart_timer.c
@@ -61,8 +61,6 @@ static unsigned int clock_count_per_tick;
static int moxart_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT:
@@ -73,15 +71,15 @@ static int moxart_clkevt_mode(enum clock_event_mode mode,
writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
writel(TIMER1_ENABLE, base + TIMER_CR);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
writel(TIMER1_DISABLE, base + TIMER_CR);
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static int moxart_clkevt_next_event(unsigned long cycles,
diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c
index d7eb0ba91cd6..aed8f53ea872 100644
--- a/drivers/clocksource/mxs_timer.c
+++ b/drivers/clocksource/mxs_timer.c
@@ -175,9 +175,6 @@ static int mxs_set_mode(enum clock_event_mode mode,
clock_event_mode_label[mode]);
#endif /* DEBUG */
- /* Remember timer mode */
- mxs_clockevent_mode = mode;
-
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
timrot_irq_enable();
@@ -189,8 +186,12 @@ static int mxs_set_mode(enum clock_event_mode mode,
/* Left event sources disabled, no more interrupts appear */
break;
default:
+ timrot_irq_enable();
return -ENOSYS;
}
+
+ /* Remember timer mode */
+ mxs_clockevent_mode = mode;
return 0;
}
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index 86a5cb3f4e65..45730f56e924 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -210,21 +210,19 @@ static int samsung_set_next_event(unsigned long cycles,
static int samsung_set_mode(enum clock_event_mode mode,
struct clock_event_device *evt)
{
- samsung_time_stop(pwm.event_id);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ samsung_time_stop(pwm.event_id);
samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
samsung_time_start(pwm.event_id, true);
break;
case CLOCK_EVT_MODE_ONESHOT:
- break;
-
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ samsung_time_stop(pwm.event_id);
break;
default:
return -ENOSYS;
diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c
index 8c0acda26ba6..d88e39bd325c 100644
--- a/drivers/clocksource/sun4i_timer.c
+++ b/drivers/clocksource/sun4i_timer.c
@@ -84,8 +84,6 @@ static void sun4i_clkevt_time_start(u8 timer, bool periodic)
static int sun4i_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
sun4i_clkevt_time_stop(0);
@@ -96,16 +94,16 @@ static int sun4i_clkevt_mode(enum clock_event_mode mode,
sun4i_clkevt_time_stop(0);
sun4i_clkevt_time_start(0, false);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
sun4i_clkevt_time_stop(0);
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static int sun4i_clkevt_next_event(unsigned long evt,
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index b71ec18396ec..5283e4562bf3 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -74,19 +74,18 @@ static int tegra_timer_set_mode(enum clock_event_mode mode,
{
u32 reg;
- timer_writel(0, TIMER3_BASE + TIMER_PTV);
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
+ timer_writel(0, TIMER3_BASE + TIMER_PTV);
reg = 0xC0000000 | ((1000000/HZ)-1);
timer_writel(reg, TIMER3_BASE + TIMER_PTV);
break;
case CLOCK_EVT_MODE_ONESHOT:
- break;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ timer_writel(0, TIMER3_BASE + TIMER_PTV);
break;
default:
return -ENOSYS;
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
index c0683ee323f9..60e585dc18cd 100644
--- a/drivers/clocksource/time-armada-370-xp.c
+++ b/drivers/clocksource/time-armada-370-xp.c
@@ -130,8 +130,6 @@ static int
armada_370_xp_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *dev)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/*
@@ -145,8 +143,6 @@ armada_370_xp_clkevt_mode(enum clock_event_mode mode,
*/
local_timer_ctrl_clrset(0, TIMER0_RELOAD_EN | enable_mask);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
@@ -162,8 +158,10 @@ armada_370_xp_clkevt_mode(enum clock_event_mode mode,
*/
writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static int armada_370_xp_clkevt_irq;
diff --git a/drivers/clocksource/time-orion.c b/drivers/clocksource/time-orion.c
index 978ff5604b2d..3e2aab6f2ffa 100644
--- a/drivers/clocksource/time-orion.c
+++ b/drivers/clocksource/time-orion.c
@@ -76,8 +76,6 @@ static int orion_clkevt_next_event(unsigned long delta,
static int orion_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *dev)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
/* setup and enable periodic timer at 1/HZ intervals */
@@ -85,8 +83,6 @@ static int orion_clkevt_mode(enum clock_event_mode mode,
writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL);
orion_timer_ctrl_clrset(0, TIMER1_RELOAD_EN | TIMER1_EN);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_ONESHOT:
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
@@ -95,8 +91,10 @@ static int orion_clkevt_mode(enum clock_event_mode mode,
/* disable timer */
orion_timer_ctrl_clrset(TIMER1_RELOAD_EN | TIMER1_EN, 0);
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static struct clock_event_device orion_clkevt = {
diff --git a/drivers/clocksource/timer-marco.c b/drivers/clocksource/timer-marco.c
index 8a20acb613da..8717271f0334 100644
--- a/drivers/clocksource/timer-marco.c
+++ b/drivers/clocksource/timer-marco.c
@@ -116,8 +116,6 @@ static int sirfsoc_timer_set_next_event(unsigned long delta,
static int sirfsoc_timer_set_mode(enum clock_event_mode mode,
struct clock_event_device *ce)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_ONESHOT:
/* enable in set_next_event */
@@ -125,13 +123,13 @@ static int sirfsoc_timer_set_mode(enum clock_event_mode mode,
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
case CLOCK_EVT_MODE_RESUME:
+ sirfsoc_timer_count_disable(smp_processor_id());
break;
default:
- ret = -ENOSYS;
+ return -ENOSYS;
}
- sirfsoc_timer_count_disable(smp_processor_id());
- return ret;
+ return 0;
}
static void sirfsoc_clocksource_suspend(struct clocksource *cs)
diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index 30d8ae85404a..7756191a7ba4 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -82,8 +82,6 @@ static void sun5i_clkevt_time_start(u8 timer, bool periodic)
static int sun5i_clkevt_mode(enum clock_event_mode mode,
struct clock_event_device *clk)
{
- int ret = 0;
-
switch (mode) {
case CLOCK_EVT_MODE_PERIODIC:
sun5i_clkevt_time_stop(0);
@@ -94,16 +92,16 @@ static int sun5i_clkevt_mode(enum clock_event_mode mode,
sun5i_clkevt_time_stop(0);
sun5i_clkevt_time_start(0, false);
break;
- default:
- ret = -ENOSYS;
case CLOCK_EVT_MODE_UNUSED:
case CLOCK_EVT_MODE_SHUTDOWN:
case CLOCK_EVT_MODE_RESUME:
case CLOCK_EVT_MODE_ONESHOT_STOPPED:
sun5i_clkevt_time_stop(0);
break;
+ default:
+ return -ENOSYS;
}
- return ret;
+ return 0;
}
static int sun5i_clkevt_next_event(unsigned long evt,