diff options
author | Yuvaraj CD <yuvaraj.cd@gmail.com> | 2012-12-24 17:06:49 +0530 |
---|---|---|
committer | Tushar Behera <tushar.behera@linaro.org> | 2013-05-24 08:36:20 +0530 |
commit | 1b65dda78b1b9380a626da8484694d4a8b689275 (patch) | |
tree | 6d8e292c63cb331b43b1458cace816bb1b0fe9e5 | |
parent | 0859da1729c3ba5744e1f78690a9f2edc71e6f5c (diff) |
USB3.0:dwc3:Enabling DT support for USB3.0 DWC3
For internal use only. Made out of patches from Vivek Gautam
Signed-off-by: Yuvaraj C D <yuvaraj.cd@samsung.com>
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/mach-exynos/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/clock-exynos5.c | 27 | ||||
-rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-exynos/mach-exynos5-dt.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-exynos/setup-usb-phy.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/devs.h | 1 | ||||
-rw-r--r-- | drivers/usb/Kconfig | 1 | ||||
-rw-r--r-- | drivers/usb/dwc3/dwc3-exynos.c | 7 | ||||
-rw-r--r-- | drivers/usb/host/xhci-plat.c | 1 |
10 files changed, 49 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 3acf594ea60b..a723bc363c67 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -81,6 +81,12 @@ interrupts = <0 96 0>; }; + usb@12000000 { + compatible = "samsung,exynos-dwc3"; + reg = <0x12000000 0x10000>; + interrupts = <0 72 0>; + }; + rtc { compatible = "samsung,s3c6410-rtc"; reg = <0x101E0000 0x100>; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 7c1f41714e74..795e157d4c98 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -429,6 +429,7 @@ config MACH_EXYNOS5_DT select ARM_AMBA select USE_OF select EXYNOS4_SETUP_USB_PHY + select USB_ARCH_HAS_XHCI help Machine support for Samsung EXYNOS5 machine with device tree enabled. Select this if a fdt blob is available for the EXYNOS5 SoC based board. diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c index e9d7b80bae49..49a20d2c05d5 100644 --- a/arch/arm/mach-exynos/clock-exynos5.c +++ b/arch/arm/mach-exynos/clock-exynos5.c @@ -747,6 +747,11 @@ static struct clk exynos5_init_clocks_off[] = { .enable = exynos5_clk_ip_fsys_ctrl , .ctrlbit = (1 << 18), }, { + .name = "usbdrd30", + .parent = &exynos5_clk_aclk_200.clk, + .enable = exynos5_clk_ip_fsys_ctrl, + .ctrlbit = (1 << 19), + }, { .name = "usbotg", .enable = exynos5_clk_ip_fsys_ctrl, .ctrlbit = (1 << 7), @@ -1011,6 +1016,16 @@ static struct clksrc_sources exynos5_clkset_group = { .nr_sources = ARRAY_SIZE(exynos5_clkset_group_list), }; +struct clk *exynos5_clkset_usbdrd30_list[] = { + [0] = &exynos5_clk_mout_mpll.clk, + [1] = &exynos5_clk_mout_cpll.clk, +}; + +struct clksrc_sources exynos5_clkset_usbdrd30 = { + .sources = exynos5_clkset_usbdrd30_list, + .nr_sources = ARRAY_SIZE(exynos5_clkset_usbdrd30_list), +}; + /* Possible clock sources for aclk_266_gscl_sub Mux */ static struct clk *clk_src_gscl_266_list[] = { [0] = &clk_ext_xtal_mux, @@ -1305,7 +1320,17 @@ static struct clksrc_clk exynos5_clksrcs[] = { .parent = &exynos5_clk_mout_cpll.clk, }, .reg_div = { .reg = EXYNOS5_CLKDIV_GEN, .shift = 4, .size = 3 }, - }, + }, { + + .clk = { + .name = "sclk_usbdrd30", + .enable = exynos5_clksrc_mask_fsys_ctrl, + .ctrlbit = (1 << 28), + }, + .sources = &exynos5_clkset_usbdrd30, + .reg_src = {.reg = EXYNOS5_CLKSRC_FSYS, .shift = 28, .size = 1}, + .reg_div = {.reg = EXYNOS5_CLKDIV_FSYS0, .shift = 24, .size = 4}, + } }; /* Clock initialization code */ diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 5b2f8ccf1aea..903424dbaf87 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -199,6 +199,9 @@ #define EXYNOS4_PA_EHCI 0x12580000 #define EXYNOS4_PA_OHCI 0x12590000 #define EXYNOS4_PA_HSPHY 0x125B0000 +#define EXYNOS5_PA_DRD 0x12000000 +#define EXYNOS5_PA_EHCI 0x12110000 +#define EXYNOS5_PA_OHCI 0x12120000 #define EXYNOS4_PA_MFC 0x13400000 #define EXYNOS4_PA_UART 0x13800000 @@ -248,7 +251,7 @@ #define S3C_PA_SPI1 EXYNOS4_PA_SPI1 #define S3C_PA_SPI2 EXYNOS4_PA_SPI2 #define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG - +#define S3C_PA_USB_PHY EXYNOS4_PA_HSPHY #define S5P_PA_EHCI EXYNOS4_PA_EHCI #define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 #define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1 diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index e99d3d8f2bcf..eaeede26c1b7 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -104,6 +104,8 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL), OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000, "exynos-tmu", NULL), + OF_DEV_AUXDATA("samsung,exynos-dwc3", EXYNOS5_PA_DRD, + "exynos-dwc3", NULL), {}, }; diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c index 17342908bf5c..3101c1b3a293 100644 --- a/arch/arm/mach-exynos/setup-usb-phy.c +++ b/arch/arm/mach-exynos/setup-usb-phy.c @@ -23,6 +23,8 @@ #define PHY_DISABLE 0 #define EXYNOS5_USB_CFG (S3C_VA_SYS + 0x230) +#define EXYNOS5_USB_CFG (S3C_VA_SYS + 0x230) + enum usb_phy_type { USB_PHY = (0x1 << 0), }; diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h index 87d501ff3328..6bbfe8afb58f 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/plat-samsung/include/plat/devs.h @@ -134,7 +134,6 @@ extern struct platform_device exynos4_device_spdif; extern struct platform_device samsung_asoc_idma; extern struct platform_device samsung_device_keypad; - /* s3c2440 specific devices */ #ifdef CONFIG_CPU_S3C2440 diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 640ae6c6d2d2..f39c215371b7 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -54,6 +54,7 @@ config USB_ARCH_HAS_EHCI # some non-PCI HCDs implement xHCI config USB_ARCH_HAS_XHCI boolean + default y if ARCH_EXYNOS5 default PCI menuconfig USB_SUPPORT diff --git a/drivers/usb/dwc3/dwc3-exynos.c b/drivers/usb/dwc3/dwc3-exynos.c index aae5328ac771..a2d7c62d4e09 100644 --- a/drivers/usb/dwc3/dwc3-exynos.c +++ b/drivers/usb/dwc3/dwc3-exynos.c @@ -103,6 +103,13 @@ static int dwc3_exynos_probe(struct platform_device *pdev) dev_err(&pdev->dev, "not enough memory\n"); goto err0; } + /* + * Right now device-tree probed devices don't get dma_mask set. + * Since shared usb code relies on it, set it here for now. + * Once we move to full device tree support this will vanish off. + */ + if (!pdev->dev.dma_mask) + pdev->dev.dma_mask = &dwc3_exynos_dma_mask; /* * Right now device-tree probed devices don't get dma_mask set. diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index df90fe51b4aa..2d163d821535 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -93,7 +93,6 @@ static int xhci_plat_probe(struct platform_device *pdev) if (usb_disabled()) return -ENODEV; - driver = &xhci_plat_xhci_driver; irq = platform_get_irq(pdev, 0); |