From 664e9e495a3ada96ed2ebab89edb40c4fc132bd7 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 24 Dec 2012 16:01:39 -0200 Subject: ARM: dts: imx23-olinuxino: Fix IOMUX settings On the imx23-olinuxino board GPIO2_1 is connected to the LED and GPIO0_17 is the USB PHY reset. So make the IOMUX assignment properly. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx23-olinuxino.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts index 7c43b8e70b9..e7484e4ea65 100644 --- a/arch/arm/boot/dts/imx23-olinuxino.dts +++ b/arch/arm/boot/dts/imx23-olinuxino.dts @@ -39,17 +39,17 @@ hog_pins_a: hog@0 { reg = <0>; fsl,pinmux-ids = < - 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ + 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ >; fsl,drive-strength = <0>; fsl,voltage = <1>; fsl,pull-up = <0>; }; - led_pin_gpio0_17: led_gpio0_17@0 { + led_pin_gpio2_1: led_gpio2_1@0 { reg = <0>; fsl,pinmux-ids = < - 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ + 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ >; fsl,drive-strength = <0>; fsl,voltage = <1>; @@ -110,7 +110,7 @@ leds { compatible = "gpio-leds"; pinctrl-names = "default"; - pinctrl-0 = <&led_pin_gpio0_17>; + pinctrl-0 = <&led_pin_gpio2_1>; user { label = "green"; -- cgit v1.2.3 From 101250ceaed570110521aedb4d3f9189837b7b93 Mon Sep 17 00:00:00 2001 From: Sean Paul Date: Thu, 27 Dec 2012 10:35:51 -0800 Subject: ARM: EXYNOS: Revise HDMI resource size Reduce the HDMI resource size from 0x100000 to 0x70000 so it doesn't overlap the Displayport resource space. HDMI: (0x14530000 - 0x145A0000) DP: (0x145B0000 - 0x145B1000) Signed-off-by: Sean Paul Signed-off-by: Prathyush K Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 2e3b6efaf1a..3acf594ea60 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -574,7 +574,7 @@ hdmi { compatible = "samsung,exynos5-hdmi"; - reg = <0x14530000 0x100000>; + reg = <0x14530000 0x70000>; interrupts = <0 95 0>; }; -- cgit v1.2.3 From 6ccc432f705f1cbf150355b6936b335c87a9accd Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Mon, 10 Dec 2012 11:48:44 -0700 Subject: ARM: OMAP: 32k counter: resolve sparse warnings Commit 1fe97c8f6a1de67a5f56e029a818903d5bed8017 ("ARM: OMAP: Make OMAP clocksource source selection using kernel param") results in a new warning from sparse: arch/arm/plat-omap/counter_32k.c:86:12: warning: symbol 'omap_init_clocksource_32k' was not declared. Should it be static? This second version fixes this warning by including , at Tony's request. Signed-off-by: Paul Walmsley Cc: Vaibhav Hiremath Cc: Felipe Balbi Cc: Santosh Shilimkar Cc: Kevin Hilman Cc: Tony Lindgren --- arch/arm/plat-omap/counter_32k.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c index f3771cdb983..5b0b86bb34b 100644 --- a/arch/arm/plat-omap/counter_32k.c +++ b/arch/arm/plat-omap/counter_32k.c @@ -22,6 +22,8 @@ #include #include +#include + /* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ #define OMAP2_32KSYNCNT_REV_OFF 0x0 #define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) -- cgit v1.2.3 From 93f377894b61c0378ea92b323451f0891851080b Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Tue, 25 Dec 2012 17:25:08 -0800 Subject: ARM: SAMSUNG: fix the cpu id for EXYNOS5440 The value of CPU ID for EXYNOS5440 should be 0xE5440000. Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index e0072ce8d6e..b69e11dc679 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -43,7 +43,7 @@ extern unsigned long samsung_cpu_id; #define EXYNOS4_CPU_MASK 0xFFFE0000 #define EXYNOS5250_SOC_ID 0x43520000 -#define EXYNOS5440_SOC_ID 0x54400000 +#define EXYNOS5440_SOC_ID 0xE5440000 #define EXYNOS5_SOC_MASK 0xFFFFF000 #define IS_SAMSUNG_CPU(name, id, mask) \ -- cgit v1.2.3 From ca6f1e42d6a085a923b4a0f949710d7e71de394a Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Thu, 6 Dec 2012 16:27:55 +0900 Subject: ARM: dts: use uart port0 for console on exynos5440-ssdk5440 Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index 921c83cf694..81e2c964a90 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts @@ -21,7 +21,7 @@ }; chosen { - bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc"; + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc"; }; spi { -- cgit v1.2.3 From 3c2bbf51ab6407f28e638fd7a657540c748ce381 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 28 Nov 2012 13:25:15 +0900 Subject: ARM: dts: use uart port1 for console on exynos4210-smdkv310 Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-smdkv310.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 9b23a8255e3..f63490707f3 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts @@ -26,7 +26,7 @@ }; chosen { - bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; + bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc"; }; sdhci@12530000 { -- cgit v1.2.3 From b2318482a3a9818af9138a323263a0f761a5e5f8 Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Thu, 27 Dec 2012 09:19:08 -0800 Subject: ARM: EXYNOS: enable PINCTRL for EXYNOS5440 This patch removes following warning in kernel boot log, Because EXYNOS5440 can support only Pinctrl not GPIO. WARNING: at drivers/gpio/gpio-samsung.c:3102 samsung_gpiolib_init+0x68/0x8c() Unknown SoC in gpio-samsung, no GPIOs added Cc: Thomas Abraham Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 91d5b6f1d5a..e103c290bc9 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -74,6 +74,8 @@ config SOC_EXYNOS5440 depends on ARCH_EXYNOS5 select ARM_ARCH_TIMER select AUTO_ZRELADDR + select PINCTRL + select PINCTRL_EXYNOS5440 help Enable EXYNOS5440 SoC support -- cgit v1.2.3 From 9816aa80b09923ac63e9da274083c0ad55468230 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 28 Dec 2012 02:09:07 -0700 Subject: ARM: OMAP AM33xx: hwmod data: resolve sparse warnings Commit 70384a6af0914d5dcec034643941e29d3e3e69f7 ("ARM: OMAP3+: hwmod: Add AM33XX HWMOD data for davinci_mdio module") adds two new sparse warnings: arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2518:30: warning: symbol 'am33xx_mdio_addr_space' was not declared. Should it be static? arch/arm/mach-omap2/omap_hwmod_33xx_data.c:2526:26: warning: symbol 'am33xx_cpgmac0__mdio' was not declared. Should it be static? Fix by marking the two new records as static. Signed-off-by: Paul Walmsley Cc: Mugunthan V N Cc: Vaibhav Hiremath Cc: Peter Korsgaard Cc: Richard Cochran Cc: David S. Miller Acked-by: Mugunthan V N --- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 081c71edddf..02ca493b929 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = { .user = OCP_USER_MPU, }; -struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { +static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { { .pa_start = 0x4A101000, .pa_end = 0x4A101000 + SZ_256 - 1, @@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { { } }; -struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { +static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { .master = &am33xx_cpgmac0_hwmod, .slave = &am33xx_mdio_hwmod, .addr = am33xx_mdio_addr_space, -- cgit v1.2.3 From 9fbe7c24256d7dd8d9d280fc9270af78aea21627 Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 28 Dec 2012 02:09:15 -0700 Subject: ARM: OMAP: SRAM: resolve sparse warnings Commit bb77209432873214a796a70a4539e4ebdf3feb54 ("ARM: OMAP: Move omap2+ specific parts of sram.c to mach-omap2") adds some new sparse warnings: arch/arm/plat-omap/sram.c:43:6: warning: symbol 'omap_sram_push_address' was not declared. Should it be static? arch/arm/plat-omap/sram.c:65:6: warning: symbol 'omap_sram_reset' was not declared. Should it be static? arch/arm/plat-omap/sram.c:73:13: warning: symbol 'omap_map_sram' was not declared. Should it be static? This second version fixes the warnings by including , at Tony's request. Signed-off-by: Paul Walmsley Cc: Tony Lindgren --- arch/arm/plat-omap/sram.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 743fc2836f7..a5bc92d7e47 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -26,6 +26,8 @@ #include +#include + #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) static void __iomem *omap_sram_base; -- cgit v1.2.3 From 62bafd1a8f99196c233b9469384eae6644b1d6c3 Mon Sep 17 00:00:00 2001 From: Ivan Khoronzhuk Date: Fri, 28 Dec 2012 02:09:30 -0700 Subject: ARM: OMAP4: PRM: Correct reset source map In the map for reset sources register we use defines intended for using with PRM_RSTCTRL register. So fix it. Signed-off-by: Ivan Khoronzhuk Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm44xx.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 7498bc77fe8..e335216ac0e 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = { * enumeration) */ static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { - { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, + { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, - { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, + { OMAP4430_GLOBAL_COLD_RST_SHIFT, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, -- cgit v1.2.3 From 5f2596fc720e252f37aa35827f016bae96d6e531 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Fri, 28 Dec 2012 02:09:45 -0700 Subject: ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets RSTTIME is offset 0x8 and RSTST is offset 0x04 for OMAP4430 and OMAP4460. Signed-off-by: Nishanth Menon [ivan.khoronzhuk@ti.com: ported from k3.4] Signed-off-by: Ivan Khoronzhuk Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm44xx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h index 22b0979206c..8ee1fbdec56 100644 --- a/arch/arm/mach-omap2/prm44xx.h +++ b/arch/arm/mach-omap2/prm44xx.h @@ -62,8 +62,8 @@ /* OMAP4 specific register offsets */ #define OMAP4_RM_RSTCTRL 0x0000 -#define OMAP4_RM_RSTTIME 0x0004 -#define OMAP4_RM_RSTST 0x0008 +#define OMAP4_RM_RSTST 0x0004 +#define OMAP4_RM_RSTTIME 0x0008 #define OMAP4_PM_PWSTCTRL 0x0000 #define OMAP4_PM_PWSTST 0x0004 -- cgit v1.2.3 From d7eccab90996cf213e5cd007e1271e2e1ea9ec34 Mon Sep 17 00:00:00 2001 From: Ivan Khoronzhuk Date: Fri, 28 Dec 2012 02:09:51 -0700 Subject: ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources To read reset sources registers we have to use PRM_DEVICE_INST Signed-off-by: Ivan Khoronzhuk Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm44xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index e335216ac0e..c05a343d465 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void) u32 r = 0; u32 v; - v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, + v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, OMAP4_RM_RSTST); p = omap44xx_prm_reset_src_map; -- cgit v1.2.3 From cfef4b2723d525a6588c4c55b42f9b98be27937f Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Fri, 28 Dec 2012 02:10:13 -0700 Subject: ARM: OMAP3: clock data: Add missing enable/disable for EMU clock The ETM/ETB drivers for OMAP3, enable the emu_src_ck clock in order to access the ETM/ETB hardware. The emu_src_ck should enable the EMU clock domain so that the ETM/ETB hardware is accessible. However, currently when enabling the emu_src_ck the EMU clock domain is not being enabled and so the ETM/ETB drivers are failing. Add enable/disable clock functions to enable the EMU clock domain when enabling the emu_src_ck. Signed-off-by: Jon Hunter Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/cclock3xxx_data.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index bdf39481fbd..6ef87580c33 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = { .recalc_rate = &omap2_clksel_recalc, .get_parent = &omap2_clksel_find_parent_index, .set_parent = &omap2_clksel_set_parent, + .enable = &omap2_clkops_enable_clkdm, + .disable = &omap2_clkops_disable_clkdm, }; static struct clk emu_src_ck; -- cgit v1.2.3 From 7e7fff8254e318cede06a1a8c55b0d86dd4d8c5b Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Fri, 28 Dec 2012 02:10:44 -0700 Subject: ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values On OMAP2xxx chips, the register bitfields for the PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are different than those used on OMAP3/4. The order is reversed. So, for example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0 indicates 'OFF'. Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on OMAP3/4, 0x3 indicates 'ON'. To fix this, we treat the OMAP3/4 values as the powerdomain API values, and create new low-level powerdomain functions for the OMAP2xxx chips which translate between the OMAP2xxx values and the OMAP3/4 values. Without this patch, the conversion of the OMAP2xxx PM code to the functional powerstate code results in a non-booting kernel. Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/prm2xxx.c | 88 ++++++++++++++++++++++++++++++++++++-- arch/arm/mach-omap2/prm2xxx_3xxx.c | 22 ---------- arch/arm/mach-omap2/prm3xxx.c | 28 ++++++++++-- 3 files changed, 110 insertions(+), 28 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c index faeab18696d..00cd4fcbda0 100644 --- a/arch/arm/mach-omap2/prm2xxx.c +++ b/arch/arm/mach-omap2/prm2xxx.c @@ -28,6 +28,14 @@ #include "cm2xxx_3xxx.h" #include "prm-regbits-24xx.h" +/* + * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits - + * these are reversed from the bits used on OMAP3+ + */ +#define OMAP24XX_PWRDM_POWER_ON 0x0 +#define OMAP24XX_PWRDM_POWER_RET 0x1 +#define OMAP24XX_PWRDM_POWER_OFF 0x3 + /* * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP * hardware register (which are specific to the OMAP2xxx SoCs) to @@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void) return r; } +/** + * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst + * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert + * + * Return the common power state bits corresponding to the OMAP2xxx + * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error. + */ +static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst) +{ + u8 pwrst; + + switch (omap2xxx_pwrst) { + case OMAP24XX_PWRDM_POWER_OFF: + pwrst = PWRDM_POWER_OFF; + break; + case OMAP24XX_PWRDM_POWER_RET: + pwrst = PWRDM_POWER_RET; + break; + case OMAP24XX_PWRDM_POWER_ON: + pwrst = PWRDM_POWER_ON; + break; + default: + return -EINVAL; + } + + return pwrst; +} + /** * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC * @@ -98,10 +134,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm) return 0; } +static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + u8 omap24xx_pwrst; + + switch (pwrst) { + case PWRDM_POWER_OFF: + omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF; + break; + case PWRDM_POWER_RET: + omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET; + break; + case PWRDM_POWER_ON: + omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON; + break; + default: + return -EINVAL; + } + + omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); + return 0; +} + +static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + u8 omap2xxx_pwrst; + + omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); + + return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst); +} + +static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + u8 omap2xxx_pwrst; + + omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP_POWERSTATEST_MASK); + + return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst); +} + struct pwrdm_ops omap2_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst, .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index 30517f5af70..a3e121f94a8 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c @@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) /* Powerdomain low-level functions */ /* Common functions across OMAP2 and OMAP3 */ -int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) -{ - omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, - (pwrst << OMAP_POWERSTATE_SHIFT), - pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); - return 0; -} - -int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTCTRL, - OMAP_POWERSTATE_MASK); -} - -int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm) -{ - return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, - OMAP2_PM_PWSTST, - OMAP_POWERSTATEST_MASK); -} - int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst) { diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c index db198d05858..4d43474d745 100644 --- a/arch/arm/mach-omap2/prm3xxx.c +++ b/arch/arm/mach-omap2/prm3xxx.c @@ -278,6 +278,28 @@ static u32 omap3xxx_prm_read_reset_sources(void) /* Powerdomain low-level functions */ +static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst) +{ + omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK, + (pwrst << OMAP_POWERSTATE_SHIFT), + pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); + return 0; +} + +static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTCTRL, + OMAP_POWERSTATE_MASK); +} + +static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm) +{ + return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, + OMAP2_PM_PWSTST, + OMAP_POWERSTATEST_MASK); +} + /* Applicable only for OMAP3. Not supported on OMAP2 */ static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) { @@ -356,9 +378,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm) } struct pwrdm_ops omap3_pwrdm_operations = { - .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, - .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, - .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, + .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst, + .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst, + .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst, .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, -- cgit v1.2.3 From 07fd296d3a44f41d8a40b7b3082fa53c2a73862e Mon Sep 17 00:00:00 2001 From: Aaro Koskinen Date: Fri, 21 Dec 2012 22:56:32 +0200 Subject: ARM: OMAP1: fix USB configuration use-after-release All boards, except Amstrad E3, mark USB config with __initdata. As a result, when you compile USB into modules, they will try to refer already released platform data and the behaviour is undefined. For example on Nokia 770, I get the following kernel panic when modprobing ohci-hcd: [ 3.462158] Unable to handle kernel paging request at virtual address e7fddef0 [ 3.477050] pgd = c3434000 [ 3.487365] [e7fddef0] *pgd=00000000 [ 3.498535] Internal error: Oops: 80000005 [#1] ARM [ 3.510955] Modules linked in: ohci_hcd(+) [ 3.522705] CPU: 0 Not tainted (3.7.0-770_tiny+ #5) [ 3.535552] PC is at 0xe7fddef0 [ 3.546508] LR is at ohci_omap_init+0x5c/0x144 [ohci_hcd] [ 3.560272] pc : [] lr : [] psr: a0000013 [ 3.560272] sp : c344bdb0 ip : c344bce0 fp : c344bdcc [ 3.589782] r10: 00000001 r9 : 00000000 r8 : 00000000 [ 3.604553] r7 : 00000026 r6 : 000000de r5 : c0227300 r4 : c342d620 [ 3.621032] r3 : e7fddef0 r2 : c048b880 r1 : 00000000 r0 : 0000000a [ 3.637786] Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user [ 3.655822] Control: 0005317f Table: 13434000 DAC: 00000015 [ 3.672790] Process modprobe (pid: 425, stack limit = 0xc344a1b8) [ 3.690643] Stack: (0xc344bdb0 to 0xc344c000) [ 3.707031] bda0: bf0030e4 c342d620 00000000 c049e62c [ 3.727905] bdc0: c344be04 c344bdd0 c0150ff0 bf0030f4 bf001b88 00000000 c048a4ac c345b020 [ 3.748870] bde0: c342d620 00000000 c048a468 bf003968 00000001 bf006000 c344be34 c344be08 [ 3.769836] be00: bf001bf0 c0150e48 00000000 c344be18 c00b9bfc c048a478 c048a4ac bf0037f8 [ 3.790985] be20: c012ca04 c000e024 c344be44 c344be38 c012d968 bf001a84 c344be64 c344be48 [ 3.812164] be40: c012c8ac c012d95c 00000000 c048a478 c048a4ac bf0037f8 c344be84 c344be68 [ 3.833740] be60: c012ca74 c012c80c 20000013 00000000 c344be88 bf0037f8 c344beac c344be88 [ 3.855468] be80: c012b038 c012ca14 c38093cc c383ee10 bf0037f8 c35be5a0 c049d5e8 00000000 [ 3.877166] bea0: c344bebc c344beb0 c012c40c c012aff4 c344beec c344bec0 c012bfc0 c012c3fc [ 3.898834] bec0: bf00378c 00000000 c344beec bf0037f8 00067f39 00000000 00005c44 c000e024 [ 3.920837] bee0: c344bf14 c344bef0 c012cd54 c012befc c04ce080 00067f39 00000000 00005c44 [ 3.943023] bf00: c000e024 bf006000 c344bf24 c344bf18 c012db14 c012ccc0 c344bf3c c344bf28 [ 3.965423] bf20: bf00604c c012dad8 c344a000 bf003834 c344bf7c c344bf40 c00087ac bf006010 [ 3.987976] bf40: 0000000f bf003834 00067f39 00000000 00005c44 bf003834 00067f39 00000000 [ 4.010711] bf60: 00005c44 c000e024 c344a000 00000000 c344bfa4 c344bf80 c004c35c c0008720 [ 4.033569] bf80: c344bfac c344bf90 01422192 01427ea0 00000000 00000080 00000000 c344bfa8 [ 4.056518] bfa0: c000dec0 c004c2f0 01422192 01427ea0 01427ea0 00005c44 00067f39 00000000 [ 4.079406] bfc0: 01422192 01427ea0 00000000 00000080 b6e11008 014221aa be941fcc b6e1e008 [ 4.102569] bfe0: b6ef6300 be941758 0000e93c b6ef6310 60000010 01427ea0 00000000 00000000 [ 4.125946] Backtrace: [ 4.143463] [] (ohci_omap_init+0x0/0x144 [ohci_hcd]) from [] (usb_add_hcd+0x1b8/0x61c) [ 4.183898] r6:c049e62c r5:00000000 r4:c342d620 r3:bf0030e4 [ 4.205596] [] (usb_add_hcd+0x0/0x61c) from [] (ohci_hcd_omap_drv_probe+0x17c/0x224 [ohci_hcd]) [ 4.248138] [] (ohci_hcd_omap_drv_probe+0x0/0x224 [ohci_hcd]) from [] (platform_drv_probe+0x1c/0x20) [ 4.292144] r8:c000e024 r7:c012ca04 r6:bf0037f8 r5:c048a4ac r4:c048a478 [ 4.316192] [] (platform_drv_probe+0x0/0x20) from [] (driver_probe_device+0xb0/0x208) [ 4.360168] [] (driver_probe_device+0x0/0x208) from [] (__driver_attach+0x70/0x94) [ 4.405548] r6:bf0037f8 r5:c048a4ac r4:c048a478 r3:00000000 [ 4.429809] [] (__driver_attach+0x0/0x94) from [] (bus_for_each_dev+0x54/0x90) [ 4.475708] r6:bf0037f8 r5:c344be88 r4:00000000 r3:20000013 [ 4.500366] [] (bus_for_each_dev+0x0/0x90) from [] (driver_attach+0x20/0x28) [ 4.528442] r7:00000000 r6:c049d5e8 r5:c35be5a0 r4:bf0037f8 [ 4.553466] [] (driver_attach+0x0/0x28) from [] (bus_add_driver+0xd4/0x228) [ 4.581878] [] (bus_add_driver+0x0/0x228) from [] (driver_register+0xa4/0x134) [ 4.629730] r8:c000e024 r7:00005c44 r6:00000000 r5:00067f39 r4:bf0037f8 [ 4.656738] [] (driver_register+0x0/0x134) from [] (platform_driver_register+0x4c/0x60) [ 4.706542] [] (platform_driver_register+0x0/0x60) from [] (ohci_hcd_mod_init+0x4c/0x8c [ohci_hcd]) [ 4.757843] [] (ohci_hcd_mod_init+0x0/0x8c [ohci_hcd]) from [] (do_one_initcall+0x9c/0x174) [ 4.808990] r4:bf003834 r3:c344a000 [ 4.832641] [] (do_one_initcall+0x0/0x174) from [] (sys_init_module+0x7c/0x194) [ 4.881530] [] (sys_init_module+0x0/0x194) from [] (ret_fast_syscall+0x0/0x2c) [ 4.930664] r7:00000080 r6:00000000 r5:01427ea0 r4:01422192 [ 4.956481] Code: bad PC value [ 4.978729] ---[ end trace 58280240f08342c4 ]--- [ 5.002258] Kernel panic - not syncing: Fatal exception Fix this by taking a copy of the data. Also mark Amstrad E3's data with __initdata to save some memory with multi-board kernels. Signed-off-by: Aaro Koskinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-ams-delta.c | 2 +- arch/arm/mach-omap1/usb.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c index a8fce3ccc70..2e98a3ac7c5 100644 --- a/arch/arm/mach-omap1/board-ams-delta.c +++ b/arch/arm/mach-omap1/board-ams-delta.c @@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_usb_config ams_delta_usb_config = { +static struct omap_usb_config ams_delta_usb_config __initdata = { .register_host = 1, .hmc_mode = 16, .pins[0] = 2, diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c index 104fed366b8..1a1db5971cd 100644 --- a/arch/arm/mach-omap1/usb.c +++ b/arch/arm/mach-omap1/usb.c @@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config) static inline void omap_1510_usb_init(struct omap_usb_config *config) {} #endif -void __init omap1_usb_init(struct omap_usb_config *pdata) +void __init omap1_usb_init(struct omap_usb_config *_pdata) { + struct omap_usb_config *pdata; + + pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return; + pdata->usb0_init = omap1_usb0_init; pdata->usb1_init = omap1_usb1_init; pdata->usb2_init = omap1_usb2_init; -- cgit v1.2.3 From 7f252b162841d42d0a629d37450522ae75c46890 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 2 Jan 2013 22:09:17 +0100 Subject: ARM: nomadik: delete dangling include This reference to the old include header for the FSMC NAND MTD driver was somehow left in place, get rid of it. Signed-off-by: Linus Walleij --- arch/arm/mach-nomadik/board-nhk8815.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 98167a4319f..9f19069248d 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include -- cgit v1.2.3 From d9621176872319a568d9892701410bcbfbd5b35c Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Wed, 2 Jan 2013 22:30:56 +0100 Subject: ARM: nomadik: bump the IRQ numbers again Bump the IRQ numbers from offset at 1 (right above NO_IRQ) to 32. This is the painful way to learn that if you're using SPARSE_IRQ and avoid to define .nr_irqs in your machine, the first 16 IRQs will be pre-allocated, and the IRQdomain code (as the VIC core code before it) will then assume that all IRQ descriptors are pre-allocated, and 16 of them are - by somebody else. So mapping the IRQs will fail in irq_create_mapping(). Moving the offset upward rids us of this problem. Cc: Rob Herring Cc: Grant Likely Signed-off-by: Linus Walleij --- arch/arm/mach-nomadik/include/mach/irqs.h | 78 +++++++++++++++---------------- 1 file changed, 39 insertions(+), 39 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h index b549d057154..215f8cdb400 100644 --- a/arch/arm/mach-nomadik/include/mach/irqs.h +++ b/arch/arm/mach-nomadik/include/mach/irqs.h @@ -22,49 +22,49 @@ #include -#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ +#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */ /* * Interrupt numbers generic for all Nomadik Chip cuts */ -#define IRQ_WATCHDOG 1 -#define IRQ_SOFTINT 2 -#define IRQ_CRYPTO 3 -#define IRQ_OWM 4 -#define IRQ_MTU0 5 -#define IRQ_MTU1 6 -#define IRQ_GPIO0 7 -#define IRQ_GPIO1 8 -#define IRQ_GPIO2 9 -#define IRQ_GPIO3 10 -#define IRQ_RTC_RTT 11 -#define IRQ_SSP 12 -#define IRQ_UART0 13 -#define IRQ_DMA1 14 -#define IRQ_CLCD_MDIF 15 -#define IRQ_DMA0 16 -#define IRQ_PWRFAIL 17 -#define IRQ_UART1 18 -#define IRQ_FIRDA 19 -#define IRQ_MSP0 20 -#define IRQ_I2C0 21 -#define IRQ_I2C1 22 -#define IRQ_SDMMC 23 -#define IRQ_USBOTG 24 -#define IRQ_SVA_IT0 25 -#define IRQ_SVA_IT1 26 -#define IRQ_SAA_IT0 27 -#define IRQ_SAA_IT1 28 -#define IRQ_UART2 29 -#define IRQ_MSP2 30 -#define IRQ_L2CC 49 -#define IRQ_HPI 50 -#define IRQ_SKE 51 -#define IRQ_KP 52 -#define IRQ_MEMST 55 -#define IRQ_SGA_IT 59 -#define IRQ_USBM 61 -#define IRQ_MSP1 63 +#define IRQ_WATCHDOG (IRQ_VIC_START+0) +#define IRQ_SOFTINT (IRQ_VIC_START+1) +#define IRQ_CRYPTO (IRQ_VIC_START+2) +#define IRQ_OWM (IRQ_VIC_START+3) +#define IRQ_MTU0 (IRQ_VIC_START+4) +#define IRQ_MTU1 (IRQ_VIC_START+5) +#define IRQ_GPIO0 (IRQ_VIC_START+6) +#define IRQ_GPIO1 (IRQ_VIC_START+7) +#define IRQ_GPIO2 (IRQ_VIC_START+8) +#define IRQ_GPIO3 (IRQ_VIC_START+9) +#define IRQ_RTC_RTT (IRQ_VIC_START+10) +#define IRQ_SSP (IRQ_VIC_START+11) +#define IRQ_UART0 (IRQ_VIC_START+12) +#define IRQ_DMA1 (IRQ_VIC_START+13) +#define IRQ_CLCD_MDIF (IRQ_VIC_START+14) +#define IRQ_DMA0 (IRQ_VIC_START+15) +#define IRQ_PWRFAIL (IRQ_VIC_START+16) +#define IRQ_UART1 (IRQ_VIC_START+17) +#define IRQ_FIRDA (IRQ_VIC_START+18) +#define IRQ_MSP0 (IRQ_VIC_START+19) +#define IRQ_I2C0 (IRQ_VIC_START+20) +#define IRQ_I2C1 (IRQ_VIC_START+21) +#define IRQ_SDMMC (IRQ_VIC_START+22) +#define IRQ_USBOTG (IRQ_VIC_START+23) +#define IRQ_SVA_IT0 (IRQ_VIC_START+24) +#define IRQ_SVA_IT1 (IRQ_VIC_START+25) +#define IRQ_SAA_IT0 (IRQ_VIC_START+26) +#define IRQ_SAA_IT1 (IRQ_VIC_START+27) +#define IRQ_UART2 (IRQ_VIC_START+28) +#define IRQ_MSP2 (IRQ_VIC_START+29) +#define IRQ_L2CC (IRQ_VIC_START+30) +#define IRQ_HPI (IRQ_VIC_START+31) +#define IRQ_SKE (IRQ_VIC_START+32) +#define IRQ_KP (IRQ_VIC_START+33) +#define IRQ_MEMST (IRQ_VIC_START+34) +#define IRQ_SGA_IT (IRQ_VIC_START+35) +#define IRQ_USBM (IRQ_VIC_START+36) +#define IRQ_MSP1 (IRQ_VIC_START+37) #define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) -- cgit v1.2.3 From 4aaa01959959ea38a77ab91da8736e9cb8108157 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 3 Jan 2013 14:47:22 -0200 Subject: ARM: dts: imx31-bug: Fix manufacturer compatible string In the compatible field we should point the manufacturer of the board, which in this case is Buglabs. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx31-bug.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts index 24731cb78e8..7f67402328d 100644 --- a/arch/arm/boot/dts/imx31-bug.dts +++ b/arch/arm/boot/dts/imx31-bug.dts @@ -14,7 +14,7 @@ / { model = "Buglabs i.MX31 Bug 1.x"; - compatible = "fsl,imx31-bug", "fsl,imx31"; + compatible = "buglabs,imx31-bug", "fsl,imx31"; memory { reg = <0x80000000 0x8000000>; /* 128M */ -- cgit v1.2.3 From 61bcbc2af8be4cafb5723d4bd306053b70f52a7a Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Sat, 5 Jan 2013 08:32:55 -0800 Subject: ARM: EXYNOS: skip the clock initialization for exynos5440 Since exynos5440 can support only common clk stuff, so this patch skips legacy exynos5 clock initialization. Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index d6d0dc65108..1a89824a5f7 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal) { printk(KERN_DEBUG "%s: initializing clocks\n", __func__); + /* EXYNOS5440 can support only common clock framework */ + + if (soc_is_exynos5440()) + return; + +#ifdef CONFIG_SOC_EXYNOS5250 s3c24xx_register_baseclocks(xtal); s5p_register_clocks(xtal); exynos5_register_clocks(); exynos5_setup_clocks(); +#endif } #define COMBINER_ENABLE_SET 0x0 -- cgit v1.2.3 From b24212fbfba25102cab7b4b1fd2919a58e02ae31 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Tue, 4 Dec 2012 18:04:59 +0100 Subject: arm: mvebu: Use dw-apb-uart instead of ns16650 as UART driver The UART controller used in the Armada 370 and Armada XP SoCs is the Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The improper use of the ns16550 can lead to a kernel oops during boot if a character is sent to the UART before the initialization of the driver. The DW APB has an extra interrupt that gets raised when writing to the LCR when busy. This explains why we need to use dw-apb-uart driver to handle this. Signed-off-by: Gregory CLEMENT Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-370-xp.dtsi | 6 ++++-- arch/arm/boot/dts/armada-xp.dtsi | 6 ++++-- arch/arm/configs/mvebu_defconfig | 4 +--- 3 files changed, 9 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index cf6c48a09ea..4c0abe85405 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -50,17 +50,19 @@ ranges; serial@d0012000 { - compatible = "ns16550"; + compatible = "snps,dw-apb-uart"; reg = <0xd0012000 0x100>; reg-shift = <2>; interrupts = <41>; + reg-io-width = <4>; status = "disabled"; }; serial@d0012100 { - compatible = "ns16550"; + compatible = "snps,dw-apb-uart"; reg = <0xd0012100 0x100>; reg-shift = <2>; interrupts = <42>; + reg-io-width = <4>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 367aa3f9491..8a85ffe77f0 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -42,17 +42,19 @@ soc { serial@d0012200 { - compatible = "ns16550"; + compatible = "snps,dw-apb-uart"; reg = <0xd0012200 0x100>; reg-shift = <2>; interrupts = <43>; + reg-io-width = <4>; status = "disabled"; }; serial@d0012300 { - compatible = "ns16550"; + compatible = "snps,dw-apb-uart"; reg = <0xd0012300 0x100>; reg-shift = <2>; interrupts = <44>; + reg-io-width = <4>; status = "disabled"; }; diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig index a702fb345c0..b5bc96cb65a 100644 --- a/arch/arm/configs/mvebu_defconfig +++ b/arch/arm/configs/mvebu_defconfig @@ -33,9 +33,7 @@ CONFIG_MVNETA=y CONFIG_MARVELL_PHY=y CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_I2C=y -CONFIG_I2C_MV64XXX=y +CONFIG_SERIAL_8250_DW=y CONFIG_GPIOLIB=y CONFIG_GPIO_SYSFS=y # CONFIG_USB_SUPPORT is not set -- cgit v1.2.3 From 53dfa8e4aa740cc7a19a39d6d4542f856c6b49ae Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 6 Jan 2013 11:10:34 +0100 Subject: ARM: Kirkwood: Fix missing clk for USB device. Without the clock being held by a driver, it gets turned off at a bad time causing the SoC to lockup. This is often during reboot. Signed-off-by: Andrew Lunn Tested-by: Stefan Peter Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 7735cee4a9c..110d6cbb795 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -144,6 +144,7 @@ compatible = "marvell,orion-ehci"; reg = <0x50000 0x1000>; interrupts = <19>; + clocks = <&gate_clk 3>; status = "okay"; }; -- cgit v1.2.3 From 107c21c3461d402ac0d2cdc1929e686612890727 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Sun, 6 Jan 2013 11:10:36 +0100 Subject: ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers Clock Management of kirkwood has moved to DT clock providers. However, TWSI1 has not yet been done. This switches TWSI1 of 88f6282 to DT clock providers. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood-6282.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index 9ae2004d567..4ccea2130a6 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -39,6 +39,7 @@ #size-cells = <0>; interrupts = <32>; clock-frequency = <100000>; + clocks = <&gate_clk 7>; status = "disabled"; }; }; -- cgit v1.2.3 From d2268be3dc0ef59f9d572f082c08e698e4617bc4 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 6 Jan 2013 11:10:37 +0100 Subject: ARM: Kirkwood: Fix missing sdio clock We moved to declaring clk gates in DT. However, device which do not yet have a DT binding need to have a clkdev alias. This was missing for SDIO. Signed-off-by: Andrew Lunn Tested-by: Stefan Peter Signed-off-by: Jason Cooper --- arch/arm/mach-kirkwood/board-dt.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c index ff4150a2ad0..de4fd2bb1e2 100644 --- a/arch/arm/mach-kirkwood/board-dt.c +++ b/arch/arm/mach-kirkwood/board-dt.c @@ -67,6 +67,10 @@ static void __init kirkwood_legacy_clk_init(void) orion_clkdev_add(NULL, "mv643xx_eth_port.1", of_clk_get_from_provider(&clkspec)); + clkspec.args[0] = CGC_BIT_SDIO; + orion_clkdev_add(NULL, "mvsdio", + of_clk_get_from_provider(&clkspec)); + } static void __init kirkwood_of_clk_init(void) -- cgit v1.2.3 From 8758c885c43859266e45db588b1a5992c049c595 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 6 Jan 2013 11:10:38 +0100 Subject: ARM: Kirkwood: Use fixed-regulator instead of board gpio call With the change to a DT based pinctrl/gpio driver, using gpio API calls in board-*.c files no longer works, a dereferenced NULL pointer exception occurs instead. By converting the GPIO code into a fixed-regulator which gets probed later once pinctrl/gpio is available, we avoid the exception. Signed-off-by: Andrew Lunn Tested-by: Stefan Peter Signed-off-by: Jason Cooper --- arch/arm/boot/dts/kirkwood-topkick.dts | 17 +++++++++++++++++ arch/arm/mach-kirkwood/board-usi_topkick.c | 4 ---- 2 files changed, 17 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts index c0de5a7f660..cd15452a52a 100644 --- a/arch/arm/boot/dts/kirkwood-topkick.dts +++ b/arch/arm/boot/dts/kirkwood-topkick.dts @@ -82,4 +82,21 @@ gpios = <&gpio1 16 1>; }; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + sata0_power: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "SATA0 Power"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio1 4 0>; + }; + }; }; diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c index 15e69fcde9f..23d2dd1b1b1 100644 --- a/arch/arm/mach-kirkwood/board-usi_topkick.c +++ b/arch/arm/mach-kirkwood/board-usi_topkick.c @@ -64,8 +64,6 @@ static unsigned int topkick_mpp_config[] __initdata = { 0 }; -#define TOPKICK_SATA0_PWR_ENABLE 36 - void __init usi_topkick_init(void) { /* @@ -73,8 +71,6 @@ void __init usi_topkick_init(void) */ kirkwood_mpp_conf(topkick_mpp_config); - /* SATA0 power enable */ - gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1); kirkwood_ge00_init(&topkick_ge00_data); kirkwood_sdio_init(&topkick_mvsdio_data); -- cgit v1.2.3 From 44cfae9ac608fbad98d0e139bc81fe0abd21e3c3 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Sun, 6 Jan 2013 11:10:40 +0100 Subject: arm: mvebu: Armada XP MV78230 has two cores, not one Contrary to our understanding at the time armada-xp-mv78230.dtsi was written, the MV78230 variant of the Armada XP SoC has two cores and not one. This patch updates the .dtsi file to take into account this reality. Signed-off-by: Thomas Petazzoni Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index c45c7b4dc35..8f90fac1d99 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -34,6 +34,13 @@ reg = <0>; clocks = <&cpuclk 0>; }; + + cpu@1 { + device_type = "cpu"; + compatible = "marvell,sheeva-v7"; + reg = <1>; + clocks = <&cpuclk 1>; + }; } soc { -- cgit v1.2.3 From 77916519cba3425c7e3a6d17393d123f9b76e54f Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Sun, 6 Jan 2013 11:10:41 +0100 Subject: arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces We originally thought that the MV78230 variant of the Armada XP had four Ethernet interfaces, like the other variants MV78260 and MV78460. In fact, this is not true, and the MV78230 has only three Ethernet interfaces. So, the definitions of the Ethernet interfaces is now done as follows: * armada-370-xp.dtsi: definitions of the first two interfaces, that are common to Armada 370 and Armada XP * armada-xp.dtsi: definition of the third interface, common to all Armada XP variants. * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of the fourth interface. Signed-off-by: Thomas Petazzoni Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++++ arch/arm/boot/dts/armada-xp-mv78460.dtsi | 8 ++++++++ arch/arm/boot/dts/armada-xp.dtsi | 8 -------- 3 files changed, 16 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi index a2aee570737..1c1937dbce7 100644 --- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi @@ -85,5 +85,13 @@ #interrupts-cells = <2>; interrupts = <24>; }; + + ethernet@d0034000 { + compatible = "marvell,armada-370-neta"; + reg = <0xd0034000 0x2500>; + interrupts = <14>; + clocks = <&gateclk 1>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi index da03a129243..4905cf3a5ef 100644 --- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi @@ -100,5 +100,13 @@ #interrupts-cells = <2>; interrupts = <24>; }; + + ethernet@d0034000 { + compatible = "marvell,armada-370-neta"; + reg = <0xd0034000 0x2500>; + interrupts = <14>; + clocks = <&gateclk 1>; + status = "disabled"; + }; }; }; diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 8a85ffe77f0..2e37ef101c9 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -95,14 +95,6 @@ status = "disabled"; }; - ethernet@d0034000 { - compatible = "marvell,armada-370-neta"; - reg = <0xd0034000 0x2500>; - interrupts = <14>; - clocks = <&gateclk 1>; - status = "disabled"; - }; - xor@d0060900 { compatible = "marvell,orion-xor"; reg = <0xd0060900 0x100 -- cgit v1.2.3 From 41be8dc1a44ee2a0a52bdf2b77273624c40782b6 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sun, 6 Jan 2013 11:10:42 +0100 Subject: arm: mvebu: Add missing ; for cpu node. The Armada XP MV78230 DT include file is missing a ; at the end of the cpu node. Reported-by: Thomas Petazzoni Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper --- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi index 8f90fac1d99..271855a6e22 100644 --- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi +++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi @@ -41,7 +41,7 @@ reg = <1>; clocks = <&cpuclk 1>; }; - } + }; soc { pinctrl { -- cgit v1.2.3 From db7d77e6a7a60dbbac34fe59bc38bc8e7e5e1380 Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Mon, 26 Nov 2012 20:16:38 +0100 Subject: ARM: Dove: Add pinctrl clock to DT During merge of the mvebu patches a clock gate for pinctrl was lost. This patch just readds the clock gate. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Jason Cooper --- arch/arm/boot/dts/dove.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index f3f7e9d8adc..42eac1ff3cc 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -117,6 +117,7 @@ pinctrl: pinctrl@d0200 { compatible = "marvell,dove-pinctrl"; reg = <0xd0200 0x10>; + clocks = <&gate_clk 22>; }; spi0: spi@10600 { -- cgit v1.2.3 From 6adba67eb0c4731ed0346731d024b2102f5b4d9d Mon Sep 17 00:00:00 2001 From: Pantelis Antoniou Date: Fri, 4 Jan 2013 00:32:22 +0200 Subject: ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array The IRQ array must be terminated by -1 and not by -1+OMAP_INTC_START This led to having a resource list of 100s of IRQs. Looks like this was caused by commit a2cfc509 (ARM: OMAP3+: hwmod: Add AM33XX HWMOD data) that probably had some search and replace updates done for the patch for sparse irq support. Signed-off-by: Pantelis Antoniou Acked-by: Paul Walmsley [tony@atomide.com: updated wit information about the breaking commit] Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 02ca493b929..646c14d9fdb 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = { { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, }, { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, }, { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, }, - { .irq = -1 + OMAP_INTC_START, }, + { .irq = -1, }, }; static struct omap_hwmod am33xx_usbss_hwmod = { -- cgit v1.2.3 From e37f0d5b32c2a66677d0f2a21431a87e7e9ce22d Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 7 Jan 2013 15:27:00 +0100 Subject: ARM: mx5: Fix MX53 flexcan2 clock The second FlexCAN port uses different clock than the first one, configure correct clock to prevent hanging of the system during bringing up of the port. Signed-off-by: Marek Vasut Cc: Fabio Estevam Acked-by: Sascha Hauer Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx53.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 552aed4ff98..edc3f1eb669 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -492,7 +492,7 @@ compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; reg = <0x53fcc000 0x4000>; interrupts = <83>; - clocks = <&clks 158>, <&clks 157>; + clocks = <&clks 87>, <&clks 86>; clock-names = "ipg", "per"; status = "disabled"; }; -- cgit v1.2.3 From 36ff67bc948292065b0f20928d7e96f261b6ddc1 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:02 -0600 Subject: ARM: dts: add device_type prop to cpu nodes on Calxeda platforms While device_type is considered deprecated, it is still needed for tools like lshw to identify cpu nodes. Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/boot/dts/ecx-2000.dts | 4 ++++ arch/arm/boot/dts/highbank.dts | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts index 46477ac1de9..139b40cc3a2 100644 --- a/arch/arm/boot/dts/ecx-2000.dts +++ b/arch/arm/boot/dts/ecx-2000.dts @@ -32,6 +32,7 @@ cpu@0 { compatible = "arm,cortex-a15"; + device_type = "cpu"; reg = <0>; clocks = <&a9pll>; clock-names = "cpu"; @@ -39,6 +40,7 @@ cpu@1 { compatible = "arm,cortex-a15"; + device_type = "cpu"; reg = <1>; clocks = <&a9pll>; clock-names = "cpu"; @@ -46,6 +48,7 @@ cpu@2 { compatible = "arm,cortex-a15"; + device_type = "cpu"; reg = <2>; clocks = <&a9pll>; clock-names = "cpu"; @@ -53,6 +56,7 @@ cpu@3 { compatible = "arm,cortex-a15"; + device_type = "cpu"; reg = <3>; clocks = <&a9pll>; clock-names = "cpu"; diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index a9ae5d32e80..81e0bfa6c17 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -32,6 +32,7 @@ cpu@0 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <0>; next-level-cache = <&L2>; clocks = <&a9pll>; @@ -40,6 +41,7 @@ cpu@1 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <1>; next-level-cache = <&L2>; clocks = <&a9pll>; @@ -48,6 +50,7 @@ cpu@2 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <2>; next-level-cache = <&L2>; clocks = <&a9pll>; @@ -56,6 +59,7 @@ cpu@3 { compatible = "arm,cortex-a9"; + device_type = "cpu"; reg = <3>; next-level-cache = <&L2>; clocks = <&a9pll>; -- cgit v1.2.3 From 3943deeddac65ab1d19fcc839ab58ef13a653532 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:03 -0600 Subject: ARM: dts: fix highbank cpu mpidr values With the addition of commit a0ae0240 (ARM: kernel: add device tree init map function), the cpu reg values must match the cpu mpidr register or we'll get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg value needs to be 0x90n to quiet the warnings. Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/boot/dts/highbank.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts index 81e0bfa6c17..5927a8df562 100644 --- a/arch/arm/boot/dts/highbank.dts +++ b/arch/arm/boot/dts/highbank.dts @@ -30,37 +30,37 @@ #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu@900 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <0>; + reg = <0x900>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; }; - cpu@1 { + cpu@901 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <1>; + reg = <0x901>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; }; - cpu@2 { + cpu@902 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <2>; + reg = <0x902>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; }; - cpu@3 { + cpu@903 { compatible = "arm,cortex-a9"; device_type = "cpu"; - reg = <3>; + reg = <0x903>; next-level-cache = <&L2>; clocks = <&a9pll>; clock-names = "cpu"; -- cgit v1.2.3 From c05ee88f6f20746aff938a85ef49e777ef4c6513 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:04 -0600 Subject: ARM: highbank: fix typos with hignbank in power request functions s/hignbank/highbank/ Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/mach-highbank/highbank.c | 2 +- arch/arm/mach-highbank/pm.c | 2 +- arch/arm/mach-highbank/sysregs.h | 8 ++++---- arch/arm/mach-highbank/system.c | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c index dc248167d20..981dc1e1da5 100644 --- a/arch/arm/mach-highbank/highbank.c +++ b/arch/arm/mach-highbank/highbank.c @@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = { static void highbank_power_off(void) { - hignbank_set_pwr_shutdown(); + highbank_set_pwr_shutdown(); while (1) cpu_do_idle(); diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c index 74aa135966f..0f4ffd6d47c 100644 --- a/arch/arm/mach-highbank/pm.c +++ b/arch/arm/mach-highbank/pm.c @@ -32,7 +32,7 @@ static int highbank_suspend_finish(unsigned long val) static int highbank_pm_enter(suspend_state_t state) { - hignbank_set_pwr_suspend(); + highbank_set_pwr_suspend(); highbank_set_cpu_jump(0, cpu_resume); cpu_suspend(0, highbank_suspend_finish); diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index e13e8ea7c6c..707cfd3d80e 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h @@ -44,25 +44,25 @@ static inline void highbank_set_core_pwr(void) writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); } -static inline void hignbank_set_pwr_suspend(void) +static inline void highbank_set_pwr_suspend(void) { writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); highbank_set_core_pwr(); } -static inline void hignbank_set_pwr_shutdown(void) +static inline void highbank_set_pwr_shutdown(void) { writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); highbank_set_core_pwr(); } -static inline void hignbank_set_pwr_soft_reset(void) +static inline void highbank_set_pwr_soft_reset(void) { writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); highbank_set_core_pwr(); } -static inline void hignbank_set_pwr_hard_reset(void) +static inline void highbank_set_pwr_hard_reset(void) { writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); highbank_set_core_pwr(); diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c index aed96ad9bd4..37d8384dcf1 100644 --- a/arch/arm/mach-highbank/system.c +++ b/arch/arm/mach-highbank/system.c @@ -22,9 +22,9 @@ void highbank_restart(char mode, const char *cmd) { if (mode == 'h') - hignbank_set_pwr_hard_reset(); + highbank_set_pwr_hard_reset(); else - hignbank_set_pwr_soft_reset(); + highbank_set_pwr_soft_reset(); while (1) cpu_do_idle(); -- cgit v1.2.3 From 0b3455a71e38b9c8cf4c2e791c909618c0a72078 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:05 -0600 Subject: ARM: highbank: fix secondary boot and hotplug With commit 384a290 (ARM: gic: use a private mapping for CPU target interfaces), wake-up IPIs now go to all cores as the gic cpu interface numbering may not follow core numbering. This broke secondary boot on highbank since the boot address was already set for all secondary cores, this caused all cores to boot before the kernel was ready. Fix this by moving the setting of the jump address to highbank_boot_secondary instead of highbank_smp_prepare_cpus and highbank_cpu_die. Also, clear the address when we boot. This prevents cores from booting before they are actually triggered and is also necessary to get suspend/resume to work. Signed-off-by: Rob Herring Cc: Nicolas Pitre Signed-off-by: Olof Johansson --- arch/arm/mach-highbank/hotplug.c | 2 +- arch/arm/mach-highbank/platsmp.c | 12 +----------- 2 files changed, 2 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c index 7b60faccd55..f30c5284339 100644 --- a/arch/arm/mach-highbank/hotplug.c +++ b/arch/arm/mach-highbank/hotplug.c @@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu) { flush_cache_all(); - highbank_set_cpu_jump(cpu, secondary_startup); + highbank_set_cpu_jump(cpu, phys_to_virt(0)); highbank_set_core_pwr(); cpu_do_idle(); diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c index 1129957f6c1..4ecc864ac8b 100644 --- a/arch/arm/mach-highbank/platsmp.c +++ b/arch/arm/mach-highbank/platsmp.c @@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu) static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) { + highbank_set_cpu_jump(cpu, secondary_startup); gic_raise_softirq(cpumask_of(cpu), 0); return 0; } @@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void) static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) { - int i; - if (scu_base_addr) scu_enable(scu_base_addr); - - /* - * Write the address of secondary startup into the jump table - * The cores are in wfi and wait until they receive a soft interrupt - * and a non-zero value to jump to. Then the secondary CPU branches - * to this address. - */ - for (i = 1; i < max_cpus; i++) - highbank_set_cpu_jump(i, secondary_startup); } struct smp_operations highbank_smp_ops __initdata = { -- cgit v1.2.3 From 9852910a0b0aa5548f990b51ad335921e0a710bf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:06 -0600 Subject: ARM: highbank: add a power request clear When we fail to power down, we need to clear out the power request. Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/mach-highbank/sysregs.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h index 707cfd3d80e..70af9d13fce 100644 --- a/arch/arm/mach-highbank/sysregs.h +++ b/arch/arm/mach-highbank/sysregs.h @@ -44,6 +44,15 @@ static inline void highbank_set_core_pwr(void) writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); } +static inline void highbank_clear_core_pwr(void) +{ + int cpu = cpu_logical_map(smp_processor_id()); + if (scu_base_addr) + scu_power_mode(scu_base_addr, SCU_PM_NORMAL); + else + writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu)); +} + static inline void highbank_set_pwr_suspend(void) { writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); @@ -68,4 +77,10 @@ static inline void highbank_set_pwr_hard_reset(void) highbank_set_core_pwr(); } +static inline void highbank_clear_pwr_request(void) +{ + writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ); + highbank_clear_core_pwr(); +} + #endif -- cgit v1.2.3 From 1ddda1cd235e05961bada337f87494272701c189 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 30 Dec 2012 10:15:07 -0600 Subject: ARM: highbank: save and restore L2 cache and GIC on suspend This fixes suspend to RAM adding necessary save and restore of L2 and GIC. Signed-off-by: Rob Herring Signed-off-by: Olof Johansson --- arch/arm/mach-highbank/pm.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c index 0f4ffd6d47c..04eddb4f438 100644 --- a/arch/arm/mach-highbank/pm.c +++ b/arch/arm/mach-highbank/pm.c @@ -14,10 +14,12 @@ * this program. If not, see . */ +#include #include #include #include +#include #include #include @@ -26,16 +28,31 @@ static int highbank_suspend_finish(unsigned long val) { + outer_flush_all(); + outer_disable(); + + highbank_set_pwr_suspend(); + cpu_do_idle(); + + highbank_clear_pwr_request(); return 0; } static int highbank_pm_enter(suspend_state_t state) { - highbank_set_pwr_suspend(); + cpu_pm_enter(); + cpu_cluster_pm_enter(); + highbank_set_cpu_jump(0, cpu_resume); cpu_suspend(0, highbank_suspend_finish); + cpu_cluster_pm_exit(); + cpu_pm_exit(); + + highbank_smc1(0x102, 0x1); + if (scu_base_addr) + scu_enable(scu_base_addr); return 0; } -- cgit v1.2.3 From 0e3a4a2eb67acdd710a833b767c20e9189cc3458 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Sat, 5 Jan 2013 08:33:30 -0800 Subject: ARM: clps711x: Fix bad merge of clockevents setup I mismerged a previous branch from Alexander, and accidentally left in ARCH_USES_GETTIMEOFFSET. Remove it. Signed-off-by: Olof Johansson Cc: Alexander Shiyan --- arch/arm/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f95ba14ae3d..ab864d9545d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -371,7 +371,6 @@ config ARCH_CNS3XXX config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" select ARCH_REQUIRE_GPIOLIB - select ARCH_USES_GETTIMEOFFSET select AUTO_ZRELADDR select CLKDEV_LOOKUP select COMMON_CLK -- cgit v1.2.3