From 8f29084a4f020ddc2d15a0f374f08f80aa8b39a0 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 20 May 2011 00:39:21 -0500 Subject: powerpc/fsl_pci: Fix device tree fixups for newer platforms We assumed that only a small set of compatiable strings would be needed to find the PCIe device tree nodes to be fixed up. However on newer platforms the simple rules no longer work. We need to allow specifying the PCIe compatiable string for each individual SoC. We introduce CONFIG_SYS_FSL_PCIE_COMPAT for this purpose and set it if the default isn't sufficient. Signed-off-by: Kumar Gala --- README | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'README') diff --git a/README b/README index ed73981b9..8bb9c8d6b 100644 --- a/README +++ b/README @@ -363,6 +363,11 @@ The following options need to be configured: system clock. On most PQ3 devices this is 8, on newer QorIQ devices it can be 16 or 32. The ratio varies from SoC to Soc. + CONFIG_SYS_FSL_PCIE_COMPAT + + Defines the string to utilize when trying to match PCIe device + tree nodes for the given platform. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO -- cgit v1.2.3