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AgeCommit message (Expand)Author
2021-02-08Further tighten AArch32 push/pop selection.dev/push-popJacob Bramley
2021-02-03Use IsPowerOf2.Jacob Bramley
2021-02-03Optimize GetFirstAvailableRegister() using CountTrailingZeros().Peter Collingbourne
2021-02-03Fix invalid encoding for single register push/pop.Peter Collingbourne
2021-02-03Fix clang build.dev/fix-clangPeter Collingbourne
2020-12-31Fix encoding for integer PAC instructions with zero contextmasterPierre Langlois
2020-12-02Skip top 64-bit write in movi if identical.Pierre Langlois
2020-11-24Fix ldapr testMartyn Capewell
2020-11-20Add missing aliases for mov instruction with immediatemateusz.kalinowski
2020-11-12[sve] Fix while simulation corner caseMartyn Capewell
2020-11-10Remove "dummy" from test and toolsMartyn Capewell
2020-11-10Remove use of "dummy"Martyn Capewell
2020-11-05Make the stack size configurable.Jacob Bramley
2020-11-05Fix FPRoundInt's handling of INT64_MAX.Jacob Bramley
2020-10-30Don't simulate invalid logical immediate instructionsMartyn Capewell
2020-10-20Fix undefined behaviour in HalveMartyn Capewell
2020-10-15Simplify the command-line disassembly example UI.Jacob Bramley
2020-10-14Add a command-line disassembly example.Jacob Bramley
2020-10-07Add email address for bug reportingMartyn Capewell
2020-09-23Define values for unallocated prefetch modesMartyn Capewell
2020-09-10Fix lint.py error regex.Jacob Bramley
2020-08-14Optimise single handler tables in the decoder.Martyn Capewell
2020-08-13[sve] Disallow dup with shift on byte-sized lanesMartyn Capewell
2020-08-06Fix infinite loops in some native tests.Jacob Bramley
2020-08-03Remove undefined behaviour in add/sub immediateMartyn Capewell
2020-07-29Revert optimisation for add/sub immediatesMartyn Capewell
2020-07-24Fix initialisation order for ID register fields.Jacob Bramley
2020-07-23Fix add/sub immediate for min-int caseMartyn Capewell
2020-07-16Add missing aliases for SVE 0.0 moves.Jacob Bramley
2020-07-16Fix and enable CanTakeSVEMovprfx.Jacob Bramley
2020-07-16Support more than 64 CPU features.Jacob Bramley
2020-07-16Fix CPUFeature iterator behaviour.Jacob Bramley
2020-07-16Add an example that dumps CPU feature information.Jacob Bramley
2020-07-16Add support for AT_HWCAP2.Jacob Bramley
2020-07-16Add CPUFeatures up to Armv8.6.Jacob Bramley
2020-07-13Emit pairs of add/sub for larger immediatesMartyn Capewell
2020-07-13Use segments in SVE indexed fmul simulationMartyn Capewell
2020-07-06Fix numerous issues related to CAS* instructions.Jacob Bramley
2020-07-06Make assembler more strict about SVE prefetch argumentsMartyn Capewell
2020-07-03Use PgLow8 rather than Pg<12, 10>.Jacob Bramley
2020-07-03Always assert that 'pg' does not have a lane size.Jacob Bramley
2020-07-02Disallow x31/xzr for SVE prefetch scalar offset registerMartyn Capewell
2020-07-02Fix simulation of FCMNE.Jacob Bramley
2020-07-02Require an immediate (0.0) for compare-with-zero instructions.Jacob Bramley
2020-07-02Prefer to use 'rd' as a scratch.Jacob Bramley
2020-07-02Fix CPURegister::GetArchitecturalName().Jacob Bramley
2020-07-02Fix simulation of FTSMUL.Jacob Bramley
2020-07-02Fix the `sve_fmla_fmls` test.Jacob Bramley
2020-07-01Fix simulation of BRKNS.Jacob Bramley
2020-07-01Make the 'sve_punpk' test VL-agnostic.Jacob Bramley
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