From 64fd43214fce0a5e0918eb620b9848df1f715fca Mon Sep 17 00:00:00 2001 From: Ryan Harkin Date: Wed, 12 Dec 2012 14:54:48 +0000 Subject: Samsung/Origen: Move BSP to SamsungPlatformPkgOrigen dir The Origen BSP clashes with the Arndale BSP. Samsung have a plan to deliver a single BSP directory that supports both Origen and Arndale, but for now, I need to move one. As Arndale is the "supported" one from Samsung, it get's priority. Signed-off-by: Ryan Harkin --- SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec | 55 - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dsc | 120 -- SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.c | 175 -- SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf | 46 - .../ExynosPkg/GraphicsConsoleDxe/ComponentName.c | 182 -- .../ExynosPkg/GraphicsConsoleDxe/ExynosGop.c | 575 ------ .../ExynosPkg/GraphicsConsoleDxe/ExynosGop.h | 274 --- .../ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c | 2011 -------------------- .../ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h | 615 ------ .../GraphicsConsoleDxe/GraphicsConsoleDxe.inf | 73 - .../ExynosPkg/GraphicsConsoleDxe/LaffStd.c | 276 --- .../ExynosPkg/Include/Library/ExynosLib.h | 24 - .../ExynosPkg/Include/Library/ExynosTimerLib.h | 65 - .../ExynosPkg/Include/Platform/ArmPlatform.h | 693 ------- .../ExynosPkg/Include/Protocol/ExynosGpio.h | 199 -- .../ExynosPkg/Library/ExynosLib/ExynosLib.c | 36 - .../ExynosPkg/Library/ExynosLib/ExynosLib.inf | 40 - .../ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c | 118 -- .../Library/GdbSerialLib/GdbSerialLib.inf | 40 - .../Library/ResetSystemLib/ResetSystemLib.c | 167 -- .../Library/ResetSystemLib/ResetSystemLib.inf | 44 - .../Library/SerialPortLib/SerialPortLib.c | 204 -- .../Library/SerialPortLib/SerialPortLib.inf | 38 - .../ExynosPkg/Library/TimerLib/TimerLib.c | 234 --- .../ExynosPkg/Library/TimerLib/TimerLib.inf | 41 - SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.c | 1327 ------------- SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.h | 293 --- SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf | 49 - SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.c | 432 ----- SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf | 54 - .../OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc | 479 ----- .../OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf | 354 ---- SamsungPlatformPkg/README | 67 - SamsungPlatformPkg/SamsungPlatformPkg.dec | 40 - .../SmdkBoardPkg/AcpiTables/AcpiTables.inf | 37 - .../SmdkBoardPkg/AcpiTables/Dsdt.asl | 446 ----- .../SmdkBoardPkg/AcpiTables/Facp.aslc | 79 - .../SmdkBoardPkg/AcpiTables/Facs.aslc | 81 - .../SmdkBoardPkg/AcpiTables/Madt.aslc | 158 -- .../SmdkBoardPkg/AcpiTables/Platform.h | 66 - .../Debugger_scripts/EBLoadSecSyms.inc | 15 - .../SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc | 463 ----- .../Debugger_scripts/rvi_boot_from_ram.inc | 20 - .../Debugger_scripts/rvi_convert_symbols.sh | 22 - .../SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc | 67 - .../Debugger_scripts/rvi_load_symbols.inc | 21 - .../Debugger_scripts/rvi_symbols_macros.inc | 193 -- .../Debugger_scripts/rvi_unload_symbols.inc | 118 -- SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.c | 414 ---- SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf | 53 - .../DebugAgentTimerLib/DebugAgentTimerLib.c | 78 - .../DebugAgentTimerLib/DebugAgentTimerLib.inf | 37 - .../SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c | 210 -- .../Library/SmdkBoardLib/SmdkBoardHelper.S | 635 ------ .../Library/SmdkBoardLib/SmdkBoardHelper.asm | 609 ------ .../Library/SmdkBoardLib/SmdkBoardLib.inf | 49 - .../Library/SmdkBoardLib/SmdkBoardMem.c | 210 -- .../Library/SmdkBoardLib/SmdkBoardSec.c | 57 - .../Library/SmdkBoardLib/SmdkBoardSecLib.inf | 50 - .../SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc | 475 ----- .../SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf | 316 --- SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec | 43 - SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dec | 55 + SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dsc | 120 ++ SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.c | 175 ++ SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.inf | 46 + .../ExynosPkg/GraphicsConsoleDxe/ComponentName.c | 182 ++ .../ExynosPkg/GraphicsConsoleDxe/ExynosGop.c | 575 ++++++ .../ExynosPkg/GraphicsConsoleDxe/ExynosGop.h | 274 +++ .../ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c | 2011 ++++++++++++++++++++ .../ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h | 615 ++++++ .../GraphicsConsoleDxe/GraphicsConsoleDxe.inf | 73 + .../ExynosPkg/GraphicsConsoleDxe/LaffStd.c | 276 +++ .../ExynosPkg/Include/Library/ExynosLib.h | 24 + .../ExynosPkg/Include/Library/ExynosTimerLib.h | 65 + .../ExynosPkg/Include/Platform/ArmPlatform.h | 693 +++++++ .../ExynosPkg/Include/Protocol/ExynosGpio.h | 199 ++ .../ExynosPkg/Library/ExynosLib/ExynosLib.c | 36 + .../ExynosPkg/Library/ExynosLib/ExynosLib.inf | 40 + .../ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c | 118 ++ .../Library/GdbSerialLib/GdbSerialLib.inf | 40 + .../Library/ResetSystemLib/ResetSystemLib.c | 167 ++ .../Library/ResetSystemLib/ResetSystemLib.inf | 44 + .../Library/SerialPortLib/SerialPortLib.c | 204 ++ .../Library/SerialPortLib/SerialPortLib.inf | 38 + .../ExynosPkg/Library/TimerLib/TimerLib.c | 234 +++ .../ExynosPkg/Library/TimerLib/TimerLib.inf | 41 + .../ExynosPkg/SDHCDxe/SDHCDxe.c | 1327 +++++++++++++ .../ExynosPkg/SDHCDxe/SDHCDxe.h | 293 +++ .../ExynosPkg/SDHCDxe/SDHCDxe.inf | 49 + .../ExynosPkg/TimerDxe/TimerDxe.c | 432 +++++ .../ExynosPkg/TimerDxe/TimerDxe.inf | 54 + .../OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc | 479 +++++ .../OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf | 354 ++++ SamsungPlatformPkgOrigen/README | 67 + SamsungPlatformPkgOrigen/SamsungPlatformPkg.dec | 40 + .../SmdkBoardPkg/AcpiTables/AcpiTables.inf | 37 + .../SmdkBoardPkg/AcpiTables/Dsdt.asl | 446 +++++ .../SmdkBoardPkg/AcpiTables/Facp.aslc | 79 + .../SmdkBoardPkg/AcpiTables/Facs.aslc | 81 + .../SmdkBoardPkg/AcpiTables/Madt.aslc | 158 ++ .../SmdkBoardPkg/AcpiTables/Platform.h | 66 + .../Debugger_scripts/EBLoadSecSyms.inc | 15 + .../SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc | 463 +++++ .../Debugger_scripts/rvi_boot_from_ram.inc | 20 + .../Debugger_scripts/rvi_convert_symbols.sh | 22 + .../SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc | 67 + .../Debugger_scripts/rvi_load_symbols.inc | 21 + .../Debugger_scripts/rvi_symbols_macros.inc | 193 ++ .../Debugger_scripts/rvi_unload_symbols.inc | 118 ++ .../SmdkBoardPkg/FvbDxe/FvbDxe.c | 414 ++++ .../SmdkBoardPkg/FvbDxe/FvbDxe.inf | 53 + .../DebugAgentTimerLib/DebugAgentTimerLib.c | 78 + .../DebugAgentTimerLib/DebugAgentTimerLib.inf | 37 + .../SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c | 210 ++ .../Library/SmdkBoardLib/SmdkBoardHelper.S | 635 ++++++ .../Library/SmdkBoardLib/SmdkBoardHelper.asm | 609 ++++++ .../Library/SmdkBoardLib/SmdkBoardLib.inf | 49 + .../Library/SmdkBoardLib/SmdkBoardMem.c | 210 ++ .../Library/SmdkBoardLib/SmdkBoardSec.c | 57 + .../Library/SmdkBoardLib/SmdkBoardSecLib.inf | 50 + .../SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc | 475 +++++ .../SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf | 316 +++ .../SmdkBoardPkg/SmdkBoardPkg.dec | 43 + 124 files changed, 14462 insertions(+), 14462 deletions(-) delete mode 100644 SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec delete mode 100644 SamsungPlatformPkg/ExynosPkg/ExynosPkg.dsc delete mode 100644 SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.c delete mode 100644 SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ComponentName.c delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf delete mode 100755 SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/LaffStd.c delete mode 100644 SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosLib.h delete mode 100644 SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h delete mode 100644 SamsungPlatformPkg/ExynosPkg/Include/Platform/ArmPlatform.h delete mode 100644 SamsungPlatformPkg/ExynosPkg/Include/Protocol/ExynosGpio.h delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.c delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.c delete mode 100644 SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf delete mode 100755 SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c delete mode 100755 SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf delete mode 100755 SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.c delete mode 100755 SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.h delete mode 100755 SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf delete mode 100755 SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.c delete mode 100755 SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf delete mode 100644 SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc delete mode 100644 SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf delete mode 100644 SamsungPlatformPkg/README delete mode 100644 SamsungPlatformPkg/SamsungPlatformPkg.dec delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/AcpiTables.inf delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Dsdt.asl delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facp.aslc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facs.aslc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Madt.aslc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Platform.h delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.c delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf delete mode 100644 SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dec create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dsc create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.c create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.inf create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ComponentName.c create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/LaffStd.c create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosLib.h create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosTimerLib.h create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Include/Platform/ArmPlatform.h create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Include/Protocol/ExynosGpio.h create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.c create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.inf create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.c create mode 100644 SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.c create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.inf create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.c create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.h create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.inf create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.c create mode 100755 SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.inf create mode 100644 SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc create mode 100644 SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf create mode 100644 SamsungPlatformPkgOrigen/README create mode 100644 SamsungPlatformPkgOrigen/SamsungPlatformPkg.dec create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/AcpiTables.inf create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Dsdt.asl create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facp.aslc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facs.aslc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Madt.aslc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Platform.h create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_boot_from_ram.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.c create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.inf create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf create mode 100644 SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg.dec diff --git a/SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec b/SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec deleted file mode 100644 index dee89469c..000000000 --- a/SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec +++ /dev/null @@ -1,55 +0,0 @@ -#/** @file -# Arm RealView EB package. -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# -# This program and the accompanying materials are licensed and made available under -# the terms and conditions of the BSD License which accompanies this distribution. -# The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - DEC_SPECIFICATION = 0x00010005 - PACKAGE_NAME = ExynosPkg - PACKAGE_GUID = ec1a4982-4a00-47e7-8df5-69c8ce895427 - PACKAGE_VERSION = 0.1 - -################################################################################ -# -# Include Section - list of Include Paths that are provided by this package. -# Comments are used for Keywords and Module Types. -# -# Supported Module Types: -# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION -# -################################################################################ -[Includes.common] - Include # Root include for the package - -[Guids.common] - gExynosPkgTokenSpaceGuid = { 0x70b6655a, 0x7a03, 0x11e0, { 0xbe, 0x19, 0x00, 0x26, 0xb9, 0x73, 0x3e, 0x2c} } - -[PcdsFeatureFlag.common] - -[PcdsFixedAtBuild.common] - gExynosPkgTokenSpaceGuid.PcdPeiServicePtrAddr|0|UINT32|0x00000003 - gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0|UINT32|0x00000004 - gExynosPkgTokenSpaceGuid.PcdCmuBase|0|UINT32|0x00000005 - gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0|UINT32|0x00000006 - gExynosPkgTokenSpaceGuid.PcdPmuBase|0|UINT32|0x00000007 - gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0|UINT32|0x00000008 - gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0|UINT32|0x00000009 - gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0|UINT32|0x0000000a - gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0|UINT32|0x0000000b - gExynosPkgTokenSpaceGuid.PcdSysBase|0|UINT32|0x0000000c - gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0|UINT32|0x0000000d - gExynosPkgTokenSpaceGuid.PcdGICBase|0|UINT32|0x0000000e - gExynosPkgTokenSpaceGuid.PcdTZPCBase|0|UINT32|0x0000000f - -# Samsung specific GUID = be26dd4f-9d02-413c-aa4f-dcd4aa334122 -[Protocols.common] diff --git a/SamsungPlatformPkg/ExynosPkg/ExynosPkg.dsc b/SamsungPlatformPkg/ExynosPkg/ExynosPkg.dsc deleted file mode 100644 index ef0a689b7..000000000 --- a/SamsungPlatformPkg/ExynosPkg/ExynosPkg.dsc +++ /dev/null @@ -1,120 +0,0 @@ -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -################################################################################ -# -# Defines Section - statements that will be processed to create a Makefile. -# -################################################################################ -[Defines] - PLATFORM_NAME = ExynosPkg - PLATFORM_GUID = 216e3ea0-f2b3-4d6f-a286-4d71431185c6 - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010005 - OUTPUT_DIRECTORY = Build/ExynosPkg - SUPPORTED_ARCHITECTURES = ARM - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - DEFINE TARGET_HACK = DEBUG - -[LibraryClasses.common] - BaseLib|MdePkg/Library/BaseLib/BaseLib.inf - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf - - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - - PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf - IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - - UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf - - UefiLib|MdePkg/Library/UefiLib/UefiLib.inf - UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf - UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf - - DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf - TimerLib|SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf - UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf - - UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf - HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf - -[LibraryClasses.common.DXE_DRIVER] - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf - ExynosLib|SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf - -[LibraryClasses.ARM] - # - # It is not possible to prevent the ARM compiler for generic intrinsic functions. - # This library provides the instrinsic functions generate by a given compiler. - # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. - # - NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf - -[BuildOptions] - RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb --fpu=softvfp - RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 - RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb - GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a - GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 - XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 - XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 - XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - -################################################################################ -# -# Pcd Section - list of all EDK II PCD Entries defined by this Platform -# -################################################################################ - -[PcdsFeatureFlag.common] - -[PcdsFixedAtBuild.common] - - gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000 - gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0x13810000 - gExynosPkgTokenSpaceGuid.PcdCmuBase|0x10030000 - gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0x139d0000 - gExynosPkgTokenSpaceGuid.PcdPmuBase|0x10020000 - gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0x11400000 - gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0x11000000 - gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0x12530000 - gExynosPkgTokenSpaceGuid.PcdSysBase|0x10010000 - gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0x11C00000 - gExynosPkgTokenSpaceGuid.PcdGICBase|0x10500000 - gExynosPkgTokenSpaceGuid.PcdTZPCBase|0x10100000 - -################################################################################ -# -# Components Section - list of all EDK II Modules needed by this Platform -# -################################################################################ -[Components.common] - SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf - SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf - SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf - SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf - - SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf - SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf - SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf diff --git a/SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.c b/SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.c deleted file mode 100644 index 68234c444..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.c +++ /dev/null @@ -1,175 +0,0 @@ -/** @file - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -#include -#include -#include -#include -#include -#include - - - -EFI_STATUS -Get ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - OUT UINTN *Value - ) -{ - UINTN Port; - UINTN Pin; - UINT32 DataInRegister; - - if (Value == NULL) - { - return EFI_UNSUPPORTED; - } - - Port = GPIO_PORT(Gpio); - Pin = GPIO_PIN(Gpio); - - DataInRegister = GpioBase(Port) + GPIO_DATAIN; - - if (MmioRead32 (DataInRegister) & GPIO_DATAIN_MASK(Pin)) { - *Value = 1; - } else { - *Value = 0; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -Set ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - IN EXYNOS_GPIO_MODE Mode - ) -{ - UINTN Port; - UINTN Pin; - UINT32 OutputRegister; - - Port = GPIO_PORT(Gpio); - Pin = GPIO_PIN(Gpio); - OutputRegister = GpioBase(Port) + GPIO_CON; - switch (Mode) - { - case GPIO_MODE_INPUT: - break; - case GPIO_MODE_OUTPUT_0: - MmioAndThenOr32(OutputRegister, ~GPIO_SFN_MASK(Pin), GPIO_OP_EN(Pin)); - MmioAndThenOr32((GpioBase(Port) + GPIO_DATAIN), ~GPIO_DATAIN_MASK(Pin), GPIO_DATA_LOW(Pin)); - break; - case GPIO_MODE_OUTPUT_1: - MmioAndThenOr32(OutputRegister, ~GPIO_SFN_MASK(Pin), GPIO_OP_EN(Pin)); - MmioAndThenOr32((GpioBase(Port) + GPIO_DATAIN), ~GPIO_DATAIN_MASK(Pin), GPIO_DATA_HIGH(Pin)); - break; - case GPIO_MODE_SPECIAL_FUNCTION_2: - MmioAndThenOr32(OutputRegister, ~GPIO_SFN_MASK(Pin), GPIO_SFN_EN(Pin)); - break; - default: - return EFI_UNSUPPORTED; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -GetMode ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - OUT EXYNOS_GPIO_MODE *Mode - ) -{ - return EFI_UNSUPPORTED; -} - -EFI_STATUS -SetPull ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - IN EXYNOS_GPIO_PULL Direction - ) -{ - UINTN Port; - UINTN Pin; - UINT32 OutputRegister; - - Port = GPIO_PORT(Gpio); - Pin = GPIO_PIN(Gpio); - OutputRegister = GpioBase(Port) + GPIO_PUD; - switch (Direction) - { - case GPIO_PULL_NONE: - MmioAndThenOr32(OutputRegister, ~GPIO_PUD_MASK(Pin), GPIO_PUD_DIS(Pin)); - break; - case GPIO_PULL_UP: - MmioAndThenOr32(OutputRegister, ~GPIO_PUD_MASK(Pin), GPIO_PUP_EN(Pin)); - break; - case GPIO_PULL_DOWN: - MmioAndThenOr32(OutputRegister, ~GPIO_PUD_MASK(Pin), GPIO_PDN_EN(Pin)); - break; - default: - return EFI_UNSUPPORTED; - } - - return EFI_SUCCESS; -} - - - -EFI_STATUS -SetStrength ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - IN EXYNOS_GPIO_STRN Strength - ) -{ - UINTN Port; - UINTN Pin; - UINT32 OutputRegister; - - Port = GPIO_PORT(Gpio); - Pin = GPIO_PIN(Gpio); - OutputRegister = GpioBase(Port) + GPIO_DRV; - MmioAndThenOr32(OutputRegister, ~GPIO_DRV_MASK(Pin), GPIO_DRV_SET(Strength,Pin)); - - return EFI_SUCCESS; -} - - - -EXYNOS_GPIO Gpio = { - Get, - Set, - GetMode, - SetPull, - SetStrength -}; - -EFI_STATUS -GpioInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - Status = gBS->InstallMultipleProtocolInterfaces(&ImageHandle, &gSamsungPlatformGpioProtocolGuid, &Gpio, NULL); - return Status; -} diff --git a/SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf b/SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf deleted file mode 100644 index f1c4e8080..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf +++ /dev/null @@ -1,46 +0,0 @@ -#/** @file -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = Gpio - FILE_GUID = E7D9CAE1-6930-46E3-BDF9-0027446E7DF2 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = GpioInitialize - - -[Sources.common] - Gpio.c - -[Packages] - MdePkg/MdePkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - SamsungPlatformPkg/SamsungPlatformPkg.dec - -[LibraryClasses] - IoLib - UefiDriverEntryPoint - ExynosLib - DebugLib - -[Guids] - -[Protocols] - gSamsungPlatformGpioProtocolGuid - -[Pcd] - -[depex] - TRUE diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ComponentName.c b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ComponentName.c deleted file mode 100755 index 1918cf862..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ComponentName.c +++ /dev/null @@ -1,182 +0,0 @@ -/** @file - UEFI Component Name(2) protocol implementation for GraphicsConsole driver. - -Copyright (c) 2006, Intel Corporation. All rights reserved.
-This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "GraphicsConsole.h" - -// -// EFI Component Name Protocol -// -GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gGraphicsConsoleComponentName = { - GraphicsConsoleComponentNameGetDriverName, - GraphicsConsoleComponentNameGetControllerName, - "eng" -}; - -// -// EFI Component Name 2 Protocol -// -GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gGraphicsConsoleComponentName2 = { - (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) GraphicsConsoleComponentNameGetDriverName, - (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) GraphicsConsoleComponentNameGetControllerName, - "en" -}; - - -GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mGraphicsConsoleDriverNameTable[] = { - { - "eng;en", - (CHAR16 *)L"UGA Console Driver" - }, - { - NULL, - NULL - } -}; - -/** - Retrieves a Unicode string that is the user readable name of the driver. - - This function retrieves the user readable name of a driver in the form of a - Unicode string. If the driver specified by This has a user readable name in - the language specified by Language, then a pointer to the driver name is - returned in DriverName, and EFI_SUCCESS is returned. If the driver specified - by This does not support the language specified by Language, - then EFI_UNSUPPORTED is returned. - - @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or - EFI_COMPONENT_NAME_PROTOCOL instance. - - @param Language[in] A pointer to a Null-terminated ASCII string - array indicating the language. This is the - language of the driver name that the caller is - requesting, and it must match one of the - languages specified in SupportedLanguages. The - number of languages supported by a driver is up - to the driver writer. Language is specified - in RFC 4646 or ISO 639-2 language code format. - - @param DriverName[out] A pointer to the Unicode string to return. - This Unicode string is the name of the - driver specified by This in the language - specified by Language. - - @retval EFI_SUCCESS The Unicode string for the Driver specified by - This and the language specified by Language was - returned in DriverName. - - @retval EFI_INVALID_PARAMETER Language is NULL. - - @retval EFI_INVALID_PARAMETER DriverName is NULL. - - @retval EFI_UNSUPPORTED The driver specified by This does not support - the language specified by Language. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleComponentNameGetDriverName ( - IN EFI_COMPONENT_NAME_PROTOCOL *This, - IN CHAR8 *Language, - OUT CHAR16 **DriverName - ) -{ - return LookupUnicodeString2 ( - Language, - This->SupportedLanguages, - mGraphicsConsoleDriverNameTable, - DriverName, - (BOOLEAN)(This == &gGraphicsConsoleComponentName) - ); -} - -/** - Retrieves a Unicode string that is the user readable name of the controller - that is being managed by a driver. - - This function retrieves the user readable name of the controller specified by - ControllerHandle and ChildHandle in the form of a Unicode string. If the - driver specified by This has a user readable name in the language specified by - Language, then a pointer to the controller name is returned in ControllerName, - and EFI_SUCCESS is returned. If the driver specified by This is not currently - managing the controller specified by ControllerHandle and ChildHandle, - then EFI_UNSUPPORTED is returned. If the driver specified by This does not - support the language specified by Language, then EFI_UNSUPPORTED is returned. - - @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or - EFI_COMPONENT_NAME_PROTOCOL instance. - - @param ControllerHandle[in] The handle of a controller that the driver - specified by This is managing. This handle - specifies the controller whose name is to be - returned. - - @param ChildHandle[in] The handle of the child controller to retrieve - the name of. This is an optional parameter that - may be NULL. It will be NULL for device - drivers. It will also be NULL for a bus drivers - that wish to retrieve the name of the bus - controller. It will not be NULL for a bus - driver that wishes to retrieve the name of a - child controller. - - @param Language[in] A pointer to a Null-terminated ASCII string - array indicating the language. This is the - language of the driver name that the caller is - requesting, and it must match one of the - languages specified in SupportedLanguages. The - number of languages supported by a driver is up - to the driver writer. Language is specified in - RFC 4646 or ISO 639-2 language code format. - - @param ControllerName[out] A pointer to the Unicode string to return. - This Unicode string is the name of the - controller specified by ControllerHandle and - ChildHandle in the language specified by - Language from the point of view of the driver - specified by This. - - @retval EFI_SUCCESS The Unicode string for the user readable name in - the language specified by Language for the - driver specified by This was returned in - DriverName. - - @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. - - @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid - EFI_HANDLE. - - @retval EFI_INVALID_PARAMETER Language is NULL. - - @retval EFI_INVALID_PARAMETER ControllerName is NULL. - - @retval EFI_UNSUPPORTED The driver specified by This is not currently - managing the controller specified by - ControllerHandle and ChildHandle. - - @retval EFI_UNSUPPORTED The driver specified by This does not support - the language specified by Language. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleComponentNameGetControllerName ( - IN EFI_COMPONENT_NAME_PROTOCOL *This, - IN EFI_HANDLE ControllerHandle, - IN EFI_HANDLE ChildHandle OPTIONAL, - IN CHAR8 *Language, - OUT CHAR16 **ControllerName - ) -{ - return EFI_UNSUPPORTED; -} diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c deleted file mode 100755 index 72e9f8ac3..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c +++ /dev/null @@ -1,575 +0,0 @@ -/** @file - Template for Timer Architecture Protocol driver of the ARM flavor - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "ExynosGop.h" -#include "GraphicsConsole.h" - - -//#define LCD_AMS369FG06 -#define LCD_WA101S - -#ifdef LCD_AMS369FG06 -#define LCD_WIDTH 480 -#define LCD_HEIGHT 800 -#define VCLK 24360000 -#endif - -#ifdef LCD_WA101S -#define LCD_WIDTH 1366 -#define LCD_HEIGHT 768 -#define VCLK 72332000 -#endif - -#define SRC_CLK 133333333 -#define FB_ADDR 0x4E000000 - -/** - This function configures the Power Domain of the LCD 0 Module to Normal Mode. -**/ -VOID ConfigureLcdPower(VOID) -{ - UINT32 PrevGateState; - - /* Enable LCD0 power domain */ - PrevGateState = MmioRead32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET)); - - MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET), \ - ~CLK_PPMULCD0_MASK,CLK_PPMULCD0_MASK); - MmioWrite32((PcdGet32(PcdPmuBase) + PMU_LCD0_CONF_OFFSET), \ - LCD0_PWR_NRML_MODE); - while( (MmioRead32((PcdGet32(PcdPmuBase) + PMU_LCD0_STAT_OFFSET)) \ - & LCD0_PWR_NRML_MODE) != LCD0_PWR_NRML_MODE); - - MmioWrite32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET), PrevGateState); -} - -/** - This function configures Clock Source,Clock gating,Clock Divider and Mask values for the - FIMD0 in the LCD0 Module - -**/ -VOID ConfigureLcd0Clk(VOID) -{ - MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET), \ - ~CLKGATE_FIMD0_MASK,CLKGATE_FIMD0_MASK); - /* MPLL is the clock source of FIMD0 IP */ - MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKSRC_LCD0_OFFSET), \ - ~CLKSRC_FIMD0_MASK, CLKSRC_FIMD0_SEL(FIMD0_SCLKMPLL)); - - /* Considering MPLL=800000000(800 MHz), SCLK_FIMD0=133333333(133.33 MHz) => DIV => (800/133.33) => 6 - The DIV value to be programmed should be (6 -1) = 5 */ - MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKDIV_LCD0_OFFSET), \ - ~CLKDIV_FIMD0_MASK, CLKDIV_FIMD0_SEL(FIMD0_CLK_DIV)); - - MmioOr32((PcdGet32(PcdCmuBase) + CLKSRC_MASK_LCD0_OFFSET), FIMD0_UNMASK); -} - -/** - This function does the necessary GPIO configuration for the Initialization of the LCD - -**/ -#ifdef LCD_WA101S -VOID ConfigureLcdGpio(VOID) -{ - EFI_STATUS Status; - EXYNOS_GPIO *Gpio; - - Status = gBS->LocateProtocol(&gSamsungPlatformGpioProtocolGuid, NULL, (VOID **)&Gpio); - ASSERT_EFI_ERROR(Status); - -/******************************************************************************** - GPIO Control - Pull Up/Down - Driving strenght Setting of GPIO Port F0 for LCD -********************************************************************************/ - Gpio->Set(Gpio,LCD_HSYNC,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VSYNC,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VDEN,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VCLK,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_0,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_1,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_2,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_3,GPIO_MODE_SPECIAL_FUNCTION_2); - - Gpio->SetPull(Gpio,LCD_HSYNC,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VSYNC,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VDEN,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VCLK,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_0,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_1,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_2,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_3,GPIO_PULL_NONE); - - - Gpio->SetStrength(Gpio,LCD_HSYNC,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VSYNC,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VDEN,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VCLK,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_0,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_1,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_2,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_3,GPIO_DRV_4X); - -/******************************************************************************** - GPIO Control - Pull Up/Down - Driving strenght Setting of GPIO Port F1 for LCD -********************************************************************************/ - Gpio->Set(Gpio,LCD_VD_4,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_5,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_6,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_7,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_8,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_9,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_10,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_11,GPIO_MODE_SPECIAL_FUNCTION_2); - - Gpio->SetPull(Gpio,LCD_VD_4,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_5,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_6,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_7,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_8,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_9,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_10,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_11,GPIO_PULL_NONE); - - - Gpio->SetStrength(Gpio,LCD_VD_4,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_5,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_6,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_7,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_8,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_9,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_10,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_11,GPIO_DRV_4X); - -/******************************************************************************** - GPIO Control - Pull Up/Down - Driving strenght Setting of GPIO Port F2 for LCD -********************************************************************************/ - Gpio->Set(Gpio,LCD_VD_12,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_13,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_14,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_15,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_16,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_17,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_18,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_19,GPIO_MODE_SPECIAL_FUNCTION_2); - - Gpio->SetPull(Gpio,LCD_VD_12,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_13,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_14,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_15,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_16,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_17,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_18,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_19,GPIO_PULL_NONE); - - - Gpio->SetStrength(Gpio,LCD_VD_12,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_13,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_14,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_15,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_16,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_17,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_18,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_19,GPIO_DRV_4X); - -/******************************************************************************** - GPIO Control - Pull Up/Down - Driving strenght Setting of GPIO Port F3 for LCD -********************************************************************************/ - Gpio->Set(Gpio,LCD_VD_20,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_21,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_22,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,LCD_VD_23,GPIO_MODE_SPECIAL_FUNCTION_2); - - Gpio->SetPull(Gpio,LCD_VD_20,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_21,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_22,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,LCD_VD_23,GPIO_PULL_NONE); - - - Gpio->SetStrength(Gpio,LCD_VD_20,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_21,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_22,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,LCD_VD_23,GPIO_DRV_4X); - - /* Set FIMD0 bypass */ - MmioOr32((PcdGet32(PcdSysBase) + SYS_DISPLAY_CONTROL_OFFSET), FIMDBYPASS_LBLK0); - -} - -/** - This function configures POrt D0 Pin1 as the Output Pin to control the Enable/Disable of - LCD BackLight - -**/ -VOID EnableBackLight(VOID) -{ - EFI_STATUS Status; - EXYNOS_GPIO *Gpio; - - Status = gBS->LocateProtocol(&gSamsungPlatformGpioProtocolGuid, NULL, (VOID **)&Gpio); - ASSERT_EFI_ERROR(Status); - - Gpio->Set(Gpio,LCD_BACKLIGHT,GPIO_MODE_OUTPUT_1); -} - -VOID lcd_on(VOID) -{ -} -#endif - - -VOID LCD_Initialize(VOID) -{ - UINTN div; - UINT32 Fimd0BaseAddr; - gBS->SetMem((VOID *)FB_ADDR, (LCD_WIDTH*LCD_HEIGHT*4), 0x0); - - Fimd0BaseAddr = PcdGet32(PcdFIMD0Base); - ConfigureLcdPower(); - ConfigureLcdGpio(); - ConfigureLcd0Clk(); - - /* Configure FIMD */ - MmioAndThenOr32(Fimd0BaseAddr + VIDCON0_OFFSET, ~S5P_VIDCON0_VIDOUT_MASK, S5P_VIDCON0_VIDOUT_RGB); - - MmioAndThenOr32(Fimd0BaseAddr + VIDCON2_OFFSET, ~(S5P_VIDCON2_WB_MASK | S5P_VIDCON2_TVFORMATSEL_MASK | \ - S5P_VIDCON2_TVFORMATSEL_YUV_MASK), S5P_VIDCON2_WB_DISABLE); - - MmioAndThenOr32(Fimd0BaseAddr + VIDCON0_OFFSET, ~S5P_VIDCON0_PNRMODE_MASK, S5P_VIDCON0_PNRMODE_RGB_P); - -#ifdef LCD_WA101S - MmioOr32(Fimd0BaseAddr + VIDCON1_OFFSET, (S5P_VIDCON1_IVCLK_RISING_EDGE | S5P_VIDCON1_IHSYNC_INVERT | \ - S5P_VIDCON1_IVSYNC_INVERT | S5P_VIDCON1_IVDEN_NORMAL)); - - MmioOr32(Fimd0BaseAddr + VIDTCON0_OFFSET, (S5P_VIDTCON0_VBPDE(-1) | S5P_VIDTCON0_VBPD(13) | \ - S5P_VIDTCON0_VFPD(2) | S5P_VIDTCON0_VSPW(4))); - - MmioOr32(Fimd0BaseAddr + VIDTCON1_OFFSET, (S5P_VIDTCON1_VFPDE(-1) | S5P_VIDTCON1_HBPD(79) | \ - S5P_VIDTCON1_HFPD(47) | S5P_VIDTCON1_HSPW(31))); - -#endif - - MmioOr32(Fimd0BaseAddr + VIDTCON2_OFFSET, (S5P_VIDTCON2_HOZVAL(LCD_WIDTH - 1) | S5P_VIDTCON2_LINEVAL(LCD_HEIGHT - 1))); - - MmioAndThenOr32(Fimd0BaseAddr + WINCON_OFFSET(0), ~(S5P_WINCON_BITSWP_ENABLE | S5P_WINCON_BYTESWP_ENABLE | \ - S5P_WINCON_HAWSWP_ENABLE | S5P_WINCON_WSWP_ENABLE | S5P_WINCON_BURSTLEN_MASK | \ - S5P_WINCON_BPPMODE_MASK | S5P_WINCON_INRGB_MASK | S5P_WINCON_DATAPATH_MASK), \ - (S5P_WINCON_WSWP_ENABLE | S5P_WINCON_BURSTLEN_16WORD | \ - S5P_WINCON_BPPMODE_24BPP_888)); - - MmioOr32(Fimd0BaseAddr + WINSHMAP_OFFSET, S5P_WINSHMAP_PROTECT(0)); - MmioWrite32(Fimd0BaseAddr + VIDOSD_A_OFFSET(0), (S5P_VIDOSD_LEFT_X(0) | S5P_VIDOSD_TOP_Y(0))); - MmioWrite32(Fimd0BaseAddr + VIDOSD_B_OFFSET(0), (S5P_VIDOSD_RIGHT_X(LCD_WIDTH - 1) | \ - S5P_VIDOSD_BOTTOM_Y(LCD_HEIGHT - 1))); - MmioAnd32(Fimd0BaseAddr + WINSHMAP_OFFSET, ~(S5P_WINSHMAP_PROTECT(0))); - - MmioWrite32(Fimd0BaseAddr + VIDOSD_C_OFFSET(0), S5P_VIDOSD_SIZE(LCD_WIDTH * LCD_HEIGHT)); - - MmioOr32(Fimd0BaseAddr + WINSHMAP_OFFSET, S5P_WINSHMAP_PROTECT(0)); - MmioWrite32(Fimd0BaseAddr + VIDADDR_START0_OFFSET(0), FB_ADDR); - MmioWrite32(Fimd0BaseAddr + VIDADDR_END0_OFFSET(0), (FB_ADDR + (LCD_WIDTH * LCD_HEIGHT * 4))); - MmioAnd32(Fimd0BaseAddr + WINSHMAP_OFFSET, ~(S5P_WINSHMAP_PROTECT(0))); - - MmioWrite32(Fimd0BaseAddr + VIDADDR_SIZE_OFFSET(0), (S5P_VIDADDR_PAGEWIDTH(LCD_WIDTH * 4) | S5P_VIDADDR_OFFSIZE(0))); - - div = SRC_CLK / VCLK; - if(SRC_CLK % VCLK) - div++; - - MmioAndThenOr32(Fimd0BaseAddr + VIDCON0_OFFSET, ~(S5P_VIDCON0_CLKVALUP_MASK | S5P_VIDCON0_VCLKEN_MASK), \ - (S5P_VIDCON0_CLKVALUP_ALWAYS | S5P_VIDCON0_VCLKEN_NORMAL | \ - S5P_VIDCON0_CLKVAL_F(div - 1))); - - MmioOr32(Fimd0BaseAddr + WINCON_OFFSET(0), S5P_WINCON_ENWIN_ENABLE); - MmioOr32(Fimd0BaseAddr + WINSHMAP_OFFSET, S5P_WINSHMAP_CH_ENABLE(0)); - - MmioOr32(Fimd0BaseAddr + VIDCON0_OFFSET, (S5P_VIDCON0_ENVID_ENABLE | S5P_VIDCON0_ENVID_F_ENABLE)); - - EnableBackLight(); - - lcd_on(); -} - -EFI_STATUS -EFIAPI -DisplayQueryMode( - IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, - IN UINT32 ModeNumber, - OUT UINTN *SizeOfInfo, - OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info - ); - -EFI_STATUS -EFIAPI -DisplaySetMode( - IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, - IN UINT32 ModeNumber - ); - -EFI_STATUS -EFIAPI -DisplayBlt( - IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, - IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL - IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation, - IN UINTN SourceX, - IN UINTN SourceY, - IN UINTN DestinationX, - IN UINTN DestinationY, - IN UINTN Width, - IN UINTN Height, - IN UINTN Delta OPTIONAL - ); - -EFI_GRAPHICS_OUTPUT_PROTOCOL gDisplay = { - DisplayQueryMode, - DisplaySetMode, - DisplayBlt, - NULL -}; - - -EFI_STATUS -EFIAPI -DisplayQueryMode( - IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, - IN UINT32 ModeNumber, - OUT UINTN *SizeOfInfo, - OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info - ) -{ - EFI_STATUS Status; - - Status = gBS->AllocatePool( - EfiBootServicesData, - sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION), - (VOID **)Info - ); - ASSERT_EFI_ERROR(Status); - - *SizeOfInfo = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION); - - (*Info)->Version = This->Mode->Info->Version; - (*Info)->HorizontalResolution = This->Mode->Info->HorizontalResolution; - (*Info)->VerticalResolution = This->Mode->Info->VerticalResolution; - (*Info)->PixelFormat = This->Mode->Info->PixelFormat; - (*Info)->PixelsPerScanLine = This->Mode->Info->PixelsPerScanLine; - - return EFI_SUCCESS; -} - -EFI_STATUS -EFIAPI -DisplaySetMode( - IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, - IN UINT32 ModeNumber - ) -{ - return EFI_SUCCESS; -} - -EFI_STATUS -EFIAPI -DisplayBlt( - IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, - IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL - IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation, - IN UINTN SourceX, - IN UINTN SourceY, - IN UINTN DestinationX, - IN UINTN DestinationY, - IN UINTN Width, - IN UINTN Height, - IN UINTN Delta OPTIONAL - ) -{ - UINT8 *VidBuf, *BltBuf, *VidBuf1; - UINTN i, j; - - switch(BltOperation) { - case EfiBltVideoFill: - BltBuf = (UINT8 *)BltBuffer; - - for(i=0;iMode->FrameBufferBase + \ - (DestinationY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ - DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - - for(j=0;jCopyMem((VOID *)VidBuf, (VOID *)BltBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - } - } - break; - - case EfiBltVideoToBltBuffer: - if(Delta == 0) - Delta = Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - - for(i=0;iMode->FrameBufferBase + \ - (SourceY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ - SourceX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - BltBuf = (UINT8 *)((UINT32)BltBuffer + (DestinationY + i)*Delta + DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - - for(j=0;jCopyMem((VOID *)BltBuf, (VOID *)VidBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - BltBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - } - } - break; - - case EfiBltBufferToVideo: - if(Delta == 0) - Delta = Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - - for(i=0;iMode->FrameBufferBase + \ - (DestinationY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ - DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - BltBuf = (UINT8 *)((UINT32)BltBuffer + (SourceY + i)*Delta + SourceX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - - for(j=0;jCopyMem((VOID *)VidBuf, (VOID *)BltBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - BltBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - } - } - break; - - case EfiBltVideoToVideo: - for(i=0;iMode->FrameBufferBase + \ - (SourceY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ - SourceX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - - VidBuf1 = (UINT8 *)((UINT32)This->Mode->FrameBufferBase + \ - (DestinationY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ - DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - - for(j=0;jCopyMem((VOID *)VidBuf1, (VOID *)VidBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - VidBuf1 += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - } - } - break; - - default: - ASSERT_EFI_ERROR(Status); - } - - return EFI_SUCCESS; -} - - - - -/** - Initialize the state information for the GOP Architectural Protocol - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -ExynosGopConstructor ( - IN GRAPHICS_CONSOLE_DEV *Private - ) -{ - EFI_STATUS Status; - - Status = EFI_SUCCESS; - /* Initialize Display */ - LCD_Initialize(); - if(Private->GraphicsOutput->Mode == NULL){ - Status = gBS->AllocatePool( - EfiBootServicesData, - sizeof(EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE), - (VOID **)&Private->GraphicsOutput->Mode - ); - ASSERT_EFI_ERROR(Status); - ZeroMem(Private->GraphicsOutput->Mode,sizeof(EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE)); - } - if(Private->GraphicsOutput->Mode->Info==NULL){ - Status = gBS->AllocatePool( - EfiBootServicesData, - sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION), - (VOID **)&Private->GraphicsOutput->Mode->Info - ); - ASSERT_EFI_ERROR(Status); - ZeroMem(Private->GraphicsOutput->Mode->Info,sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION)); - } - /* Fill out mode information */ - Private->GraphicsOutput->Mode->MaxMode = 1; - Private->GraphicsOutput->Mode->Mode = 0; - Private->GraphicsOutput->Mode->Info->Version = 0; - Private->GraphicsOutput->Mode->Info->HorizontalResolution = LCD_WIDTH; - Private->GraphicsOutput->Mode->Info->VerticalResolution = LCD_HEIGHT; - Private->GraphicsOutput->Mode->Info->PixelFormat = PixelBlueGreenRedReserved8BitPerColor; - Private->GraphicsOutput->Mode->Info->PixelsPerScanLine = LCD_WIDTH; - Private->GraphicsOutput->Mode->SizeOfInfo = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION); - Private->GraphicsOutput->Mode->FrameBufferBase = FB_ADDR; - Private->GraphicsOutput->Mode->FrameBufferSize = (LCD_WIDTH * LCD_HEIGHT * 4); - return Status; -} - -EFI_STATUS -ExynosGopDestructor ( - GRAPHICS_CONSOLE_DEV *Private - ) -{ - // - // Free graphics output protocol occupied resource - // - if(Private != NULL){ - if(Private->GraphicsOutput != NULL){ - if (Private->GraphicsOutput->Mode != NULL) { - if (Private->GraphicsOutput->Mode->Info != NULL) { - gBS->FreePool (Private->GraphicsOutput->Mode->Info); - Private->GraphicsOutput->Mode->Info =NULL; - } - gBS->FreePool (Private->GraphicsOutput->Mode); - Private->GraphicsOutput->Mode=NULL; - } - } - } - return EFI_SUCCESS; -} diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h deleted file mode 100755 index ebf30644a..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h +++ /dev/null @@ -1,274 +0,0 @@ -/** @file -* -* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - - -#ifndef _ExynosGop_H__ -#define _ExynosGop_H__ - -/* - * Bit Definitions -*/ - -/* VIDCON0 */ -#define S5P_VIDCON0_DSI_DISABLE (0 << 30) -#define S5P_VIDCON0_DSI_ENABLE (1 << 30) -#define S5P_VIDCON0_SCAN_PROGRESSIVE (0 << 29) -#define S5P_VIDCON0_SCAN_INTERLACE (1 << 29) -#define S5P_VIDCON0_SCAN_MASK (1 << 29) -#define S5P_VIDCON0_VIDOUT_RGB (0 << 26) -#define S5P_VIDCON0_VIDOUT_ITU (1 << 26) -#define S5P_VIDCON0_VIDOUT_I80LDI0 (2 << 26) -#define S5P_VIDCON0_VIDOUT_I80LDI1 (3 << 26) -#define S5P_VIDCON0_VIDOUT_WB_RGB (4 << 26) -#define S5P_VIDCON0_VIDOUT_WB_I80LDI0 (6 << 26) -#define S5P_VIDCON0_VIDOUT_WB_I80LDI1 (7 << 26) -#define S5P_VIDCON0_VIDOUT_MASK (7 << 26) -#define S5P_VIDCON0_PNRMODE_RGB_P (0 << 17) -#define S5P_VIDCON0_PNRMODE_BGR_P (1 << 17) -#define S5P_VIDCON0_PNRMODE_RGB_S (2 << 17) -#define S5P_VIDCON0_PNRMODE_BGR_S (3 << 17) -#define S5P_VIDCON0_PNRMODE_MASK (3 << 17) -#define S5P_VIDCON0_PNRMODE_SHIFT (17) -#define S5P_VIDCON0_CLKVALUP_ALWAYS (0 << 16) -#define S5P_VIDCON0_CLKVALUP_START_FRAME (1 << 16) -#define S5P_VIDCON0_CLKVALUP_MASK (1 << 16) -#define S5P_VIDCON0_CLKVAL_F(x) (((x) & 0xff) << 6) -#define S5P_VIDCON0_VCLKEN_NORMAL (0 << 5) -#define S5P_VIDCON0_VCLKEN_FREERUN (1 << 5) -#define S5P_VIDCON0_VCLKEN_MASK (1 << 5) -#define S5P_VIDCON0_CLKDIR_DIRECTED (0 << 4) -#define S5P_VIDCON0_CLKDIR_DIVIDED (1 << 4) -#define S5P_VIDCON0_CLKDIR_MASK (1 << 4) -#define S5P_VIDCON0_CLKSEL_HCLK (0 << 2) -#define S5P_VIDCON0_CLKSEL_SCLK (1 << 2) -#define S5P_VIDCON0_CLKSEL_MASK (1 << 2) -#define S5P_VIDCON0_ENVID_ENABLE (1 << 1) -#define S5P_VIDCON0_ENVID_DISABLE (0 << 1) -#define S5P_VIDCON0_ENVID_F_ENABLE (1 << 0) -#define S5P_VIDCON0_ENVID_F_DISABLE (0 << 0) - -/* VIDCON1 */ -#define S5P_VIDCON1_IVCLK_FALLING_EDGE (0 << 7) -#define S5P_VIDCON1_IVCLK_RISING_EDGE (1 << 7) -#define S5P_VIDCON1_IHSYNC_NORMAL (0 << 6) -#define S5P_VIDCON1_IHSYNC_INVERT (1 << 6) -#define S5P_VIDCON1_IVSYNC_NORMAL (0 << 5) -#define S5P_VIDCON1_IVSYNC_INVERT (1 << 5) -#define S5P_VIDCON1_IVDEN_NORMAL (0 << 4) -#define S5P_VIDCON1_IVDEN_INVERT (1 << 4) - -/* VIDCON2 */ -#define S5P_VIDCON2_EN601_DISABLE (0 << 23) -#define S5P_VIDCON2_EN601_ENABLE (1 << 23) -#define S5P_VIDCON2_EN601_MASK (1 << 23) -#define S5P_VIDCON2_WB_DISABLE (0 << 15) -#define S5P_VIDCON2_WB_ENABLE (1 << 15) -#define S5P_VIDCON2_WB_MASK (1 << 15) -#define S5P_VIDCON2_TVFORMATSEL_HW (0 << 14) -#define S5P_VIDCON2_TVFORMATSEL_SW (1 << 14) -#define S5P_VIDCON2_TVFORMATSEL_MASK (1 << 14) -#define S5P_VIDCON2_TVFORMATSEL_YUV422 (1 << 12) -#define S5P_VIDCON2_TVFORMATSEL_YUV444 (2 << 12) -#define S5P_VIDCON2_TVFORMATSEL_YUV_MASK (3 << 12) -#define S5P_VIDCON2_ORGYUV_YCBCR (0 << 8) -#define S5P_VIDCON2_ORGYUV_CBCRY (1 << 8) -#define S5P_VIDCON2_ORGYUV_MASK (1 << 8) -#define S5P_VIDCON2_YUVORD_CBCR (0 << 7) -#define S5P_VIDCON2_YUVORD_CRCB (1 << 7) -#define S5P_VIDCON2_YUVORD_MASK (1 << 7) - -/* PRTCON */ -#define S5P_PRTCON_UPDATABLE (0 << 11) -#define S5P_PRTCON_PROTECT (1 << 11) - -/* VIDTCON0 */ -#define S5P_VIDTCON0_VBPDE(x) (((x) & 0xff) << 24) -#define S5P_VIDTCON0_VBPD(x) (((x) & 0xff) << 16) -#define S5P_VIDTCON0_VFPD(x) (((x) & 0xff) << 8) -#define S5P_VIDTCON0_VSPW(x) (((x) & 0xff) << 0) - -/* VIDTCON1 */ -#define S5P_VIDTCON1_VFPDE(x) (((x) & 0xff) << 24) -#define S5P_VIDTCON1_HBPD(x) (((x) & 0xff) << 16) -#define S5P_VIDTCON1_HFPD(x) (((x) & 0xff) << 8) -#define S5P_VIDTCON1_HSPW(x) (((x) & 0xff) << 0) - -/* VIDTCON2 */ -#define S5P_VIDTCON2_LINEVAL(x) (((x) & 0x7ff) << 11) -#define S5P_VIDTCON2_HOZVAL(x) (((x) & 0x7ff) << 0) - -/* Window 0~4 Control - WINCONx */ -#define S5P_WINCON_DATAPATH_DMA (0 << 22) -#define S5P_WINCON_DATAPATH_LOCAL (1 << 22) -#define S5P_WINCON_DATAPATH_MASK (1 << 22) -#define S5P_WINCON_BUFSEL_0 (0 << 20) -#define S5P_WINCON_BUFSEL_1 (1 << 20) -#define S5P_WINCON_BUFSEL_MASK (1 << 20) -#define S5P_WINCON_BUFSEL_SHIFT (20) -#define S5P_WINCON_BUFAUTO_DISABLE (0 << 19) -#define S5P_WINCON_BUFAUTO_ENABLE (1 << 19) -#define S5P_WINCON_BUFAUTO_MASK (1 << 19) -#define S5P_WINCON_BITSWP_DISABLE (0 << 18) -#define S5P_WINCON_BITSWP_ENABLE (1 << 18) -#define S5P_WINCON_BITSWP_SHIFT (18) -#define S5P_WINCON_BYTESWP_DISABLE (0 << 17) -#define S5P_WINCON_BYTESWP_ENABLE (1 << 17) -#define S5P_WINCON_BYTESWP_SHIFT (17) -#define S5P_WINCON_HAWSWP_DISABLE (0 << 16) -#define S5P_WINCON_HAWSWP_ENABLE (1 << 16) -#define S5P_WINCON_HAWSWP_SHIFT (16) -#define S5P_WINCON_WSWP_DISABLE (0 << 15) -#define S5P_WINCON_WSWP_ENABLE (1 << 15) -#define S5P_WINCON_WSWP_SHIFT (15) -#define S5P_WINCON_INRGB_RGB (0 << 13) -#define S5P_WINCON_INRGB_YUV (1 << 13) -#define S5P_WINCON_INRGB_MASK (1 << 13) -#define S5P_WINCON_BURSTLEN_16WORD (0 << 9) -#define S5P_WINCON_BURSTLEN_8WORD (1 << 9) -#define S5P_WINCON_BURSTLEN_4WORD (2 << 9) -#define S5P_WINCON_BURSTLEN_MASK (3 << 9) -#define S5P_WINCON_ALPHA_MULTI_DISABLE (0 << 7) -#define S5P_WINCON_ALPHA_MULTI_ENABLE (1 << 7) -#define S5P_WINCON_BLD_PLANE (0 << 6) -#define S5P_WINCON_BLD_PIXEL (1 << 6) -#define S5P_WINCON_BLD_MASK (1 << 6) -#define S5P_WINCON_BPPMODE_1BPP (0 << 2) -#define S5P_WINCON_BPPMODE_2BPP (1 << 2) -#define S5P_WINCON_BPPMODE_4BPP (2 << 2) -#define S5P_WINCON_BPPMODE_8BPP_PAL (3 << 2) -#define S5P_WINCON_BPPMODE_8BPP (4 << 2) -#define S5P_WINCON_BPPMODE_16BPP_565 (5 << 2) -#define S5P_WINCON_BPPMODE_16BPP_A555 (6 << 2) -#define S5P_WINCON_BPPMODE_18BPP_666 (8 << 2) -#define S5P_WINCON_BPPMODE_18BPP_A665 (9 << 2) -#define S5P_WINCON_BPPMODE_24BPP_888 (0xb << 2) -#define S5P_WINCON_BPPMODE_24BPP_A887 (0xc << 2) -#define S5P_WINCON_BPPMODE_32BPP (0xd << 2) -#define S5P_WINCON_BPPMODE_16BPP_A444 (0xe << 2) -#define S5P_WINCON_BPPMODE_15BPP_555 (0xf << 2) -#define S5P_WINCON_BPPMODE_MASK (0xf << 2) -#define S5P_WINCON_BPPMODE_SHIFT (2) -#define S5P_WINCON_ALPHA0_SEL (0 << 1) -#define S5P_WINCON_ALPHA1_SEL (1 << 1) -#define S5P_WINCON_ALPHA_SEL_MASK (1 << 1) -#define S5P_WINCON_ENWIN_DISABLE (0 << 0) -#define S5P_WINCON_ENWIN_ENABLE (1 << 0) - -/* WINCON1 special */ -#define S5P_WINCON1_VP_DISABLE (0 << 24) -#define S5P_WINCON1_VP_ENABLE (1 << 24) -#define S5P_WINCON1_LOCALSEL_FIMC1 (0 << 23) -#define S5P_WINCON1_LOCALSEL_VP (1 << 23) -#define S5P_WINCON1_LOCALSEL_MASK (1 << 23) - -/* WINSHMAP */ -#define S5P_WINSHMAP_PROTECT(x) (((x) & 0x1f) << 10) -#define S5P_WINSHMAP_CH_ENABLE(x) (1 << (x)) -#define S5P_WINSHMAP_CH_DISABLE(x) (1 << (x)) -#define S5P_WINSHMAP_LOCAL_ENABLE(x) (0x20 << (x)) -#define S5P_WINSHMAP_LOCAL_DISABLE(x) (0x20 << (x)) - - -/* VIDOSDxA, VIDOSDxB */ -#define S5P_VIDOSD_LEFT_X(x) (((x) & 0x7ff) << 11) -#define S5P_VIDOSD_TOP_Y(x) (((x) & 0x7ff) << 0) -#define S5P_VIDOSD_RIGHT_X(x) (((x) & 0x7ff) << 11) -#define S5P_VIDOSD_BOTTOM_Y(x) (((x) & 0x7ff) << 0) - -/* VIDOSD0C, VIDOSDxD */ -#define S5P_VIDOSD_SIZE(x) (((x) & 0xffffff) << 0) - -/* VIDOSDxC (1~4) */ -#define S5P_VIDOSD_ALPHA0_R(x) (((x) & 0xf) << 20) -#define S5P_VIDOSD_ALPHA0_G(x) (((x) & 0xf) << 16) -#define S5P_VIDOSD_ALPHA0_B(x) (((x) & 0xf) << 12) -#define S5P_VIDOSD_ALPHA1_R(x) (((x) & 0xf) << 8) -#define S5P_VIDOSD_ALPHA1_G(x) (((x) & 0xf) << 4) -#define S5P_VIDOSD_ALPHA1_B(x) (((x) & 0xf) << 0) -#define S5P_VIDOSD_ALPHA0_SHIFT (12) -#define S5P_VIDOSD_ALPHA1_SHIFT (0) - -/* Start Address */ -#define S5P_VIDADDR_START_VBANK(x) (((x) & 0xff) << 24) -#define S5P_VIDADDR_START_VBASEU(x) (((x) & 0xffffff) << 0) - -/* End Address */ -#define S5P_VIDADDR_END_VBASEL(x) (((x) & 0xffffff) << 0) - -/* Buffer Size */ -#define S5P_VIDADDR_OFFSIZE(x) (((x) & 0x1fff) << 13) -#define S5P_VIDADDR_PAGEWIDTH(x) (((x) & 0x1fff) << 0) - -/* WIN Color Map */ -#define S5P_WINMAP_COLOR(x) ((x) & 0xffffff) - -/* VIDINTCON0 */ -#define S5P_VIDINTCON0_SYSMAINCON_DISABLE (0 << 19) -#define S5P_VIDINTCON0_SYSMAINCON_ENABLE (1 << 19) -#define S5P_VIDINTCON0_SYSSUBCON_DISABLE (0 << 18) -#define S5P_VIDINTCON0_SYSSUBCON_ENABLE (1 << 18) -#define S5P_VIDINTCON0_SYSIFDONE_DISABLE (0 << 17) -#define S5P_VIDINTCON0_SYSIFDONE_ENABLE (1 << 17) -#define S5P_VIDINTCON0_FRAMESEL0_BACK (0 << 15) -#define S5P_VIDINTCON0_FRAMESEL0_VSYNC (1 << 15) -#define S5P_VIDINTCON0_FRAMESEL0_ACTIVE (2 << 15) -#define S5P_VIDINTCON0_FRAMESEL0_FRONT (3 << 15) -#define S5P_VIDINTCON0_FRAMESEL0_MASK (3 << 15) -#define S5P_VIDINTCON0_FRAMESEL1_NONE (0 << 13) -#define S5P_VIDINTCON0_FRAMESEL1_BACK (1 << 13) -#define S5P_VIDINTCON0_FRAMESEL1_VSYNC (2 << 13) -#define S5P_VIDINTCON0_FRAMESEL1_FRONT (3 << 13) -#define S5P_VIDINTCON0_INTFRMEN_DISABLE (0 << 12) -#define S5P_VIDINTCON0_INTFRMEN_ENABLE (1 << 12) -#define S5P_VIDINTCON0_FIFOSEL_WIN4 (1 << 11) -#define S5P_VIDINTCON0_FIFOSEL_WIN3 (1 << 10) -#define S5P_VIDINTCON0_FIFOSEL_WIN2 (1 << 9) -#define S5P_VIDINTCON0_FIFOSEL_WIN1 (1 << 6) -#define S5P_VIDINTCON0_FIFOSEL_WIN0 (1 << 5) -#define S5P_VIDINTCON0_FIFOSEL_ALL (0x73 << 5) -#define S5P_VIDINTCON0_FIFOSEL_MASK (0x73 << 5) -#define S5P_VIDINTCON0_FIFOLEVEL_25 (0 << 2) -#define S5P_VIDINTCON0_FIFOLEVEL_50 (1 << 2) -#define S5P_VIDINTCON0_FIFOLEVEL_75 (2 << 2) -#define S5P_VIDINTCON0_FIFOLEVEL_EMPTY (3 << 2) -#define S5P_VIDINTCON0_FIFOLEVEL_FULL (4 << 2) -#define S5P_VIDINTCON0_FIFOLEVEL_MASK (7 << 2) -#define S5P_VIDINTCON0_INTFIFO_DISABLE (0 << 1) -#define S5P_VIDINTCON0_INTFIFO_ENABLE (1 << 1) -#define S5P_VIDINTCON0_INT_DISABLE (0 << 0) -#define S5P_VIDINTCON0_INT_ENABLE (1 << 0) -#define S5P_VIDINTCON0_INT_MASK (1 << 0) - -/* VIDINTCON1 */ -#define S5P_VIDINTCON1_INTVPPEND (1 << 5) -#define S5P_VIDINTCON1_INTI80PEND (1 << 2) -#define S5P_VIDINTCON1_INTFRMPEND (1 << 1) -#define S5P_VIDINTCON1_INTFIFOPEND (1 << 0) - -/* WINMAP */ -#define S5P_WINMAP_ENABLE (1 << 24) - -/* WxKEYCON0 (1~4) */ -#define S5P_KEYCON0_KEYBLEN_DISABLE (0 << 26) -#define S5P_KEYCON0_KEYBLEN_ENABLE (1 << 26) -#define S5P_KEYCON0_KEY_DISABLE (0 << 25) -#define S5P_KEYCON0_KEY_ENABLE (1 << 25) -#define S5P_KEYCON0_DIRCON_MATCH_FG (0 << 24) -#define S5P_KEYCON0_DIRCON_MATCH_BG (1 << 24) -#define S5P_KEYCON0_COMPKEY(x) (((x) & 0xffffff) << 0) - -/* WxKEYCON1 (1~4) */ -#define S5P_KEYCON1_COLVAL(x) (((x) & 0xffffff) << 0) - -#endif // _ExynosGop_H__ diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c deleted file mode 100755 index 2c6129ae6..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c +++ /dev/null @@ -1,2011 +0,0 @@ -/** @file - This is the main routine for initializing the Graphics Console support routines. - -Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
-This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "GraphicsConsole.h" - -//#define BIG_FONT - -#ifdef BIG_FONT - -#ifdef EFI_GLYPH_WIDTH - -#undef EFI_GLYPH_WIDTH -#define EFI_GLYPH_WIDTH 12 - -#endif // EFI_GLYPH_WIDTH - -#ifdef EFI_GLYPH_HEIGHT - -#undef EFI_GLYPH_HEIGHT -#define EFI_GLYPH_HEIGHT 28 - -#endif // EFI_GLYPH_HEIGHT - -#endif // BIG_FONT - -// -// Graphics Console Device Private Data template -// -GRAPHICS_CONSOLE_DEV mGraphicsConsoleDevTemplate = { - GRAPHICS_CONSOLE_DEV_SIGNATURE, - (EFI_GRAPHICS_OUTPUT_PROTOCOL *) NULL, - (EFI_UGA_DRAW_PROTOCOL *) NULL, - { - GraphicsConsoleConOutReset, - GraphicsConsoleConOutOutputString, - GraphicsConsoleConOutTestString, - GraphicsConsoleConOutQueryMode, - GraphicsConsoleConOutSetMode, - GraphicsConsoleConOutSetAttribute, - GraphicsConsoleConOutClearScreen, - GraphicsConsoleConOutSetCursorPosition, - GraphicsConsoleConOutEnableCursor, - (EFI_SIMPLE_TEXT_OUTPUT_MODE *) NULL - }, - { - 0, - 0, - EFI_TEXT_ATTR(EFI_LIGHTGRAY, EFI_BLACK), - 0, - 0, - TRUE - }, - { - { 80, 25, 0, 0, 0, 0 }, // Mode 0 - { 80, 50, 0, 0, 0, 0 }, // Mode 1 - { 100,31, 0, 0, 0, 0 }, // Mode 2 - { 0, 0, 0, 0, 0, 0 } // Mode 3 - }, - (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) NULL -}; - -EFI_HII_DATABASE_PROTOCOL *mHiiDatabase; -EFI_HII_FONT_PROTOCOL *mHiiFont; -EFI_HII_HANDLE mHiiHandle; -EFI_EVENT mHiiRegistration; - -EFI_GUID mFontPackageListGuid = {0xf5f219d3, 0x7006, 0x4648, {0xac, 0x8d, 0xd6, 0x1d, 0xfb, 0x7b, 0xc6, 0xad}}; - -CHAR16 mCrLfString[3] = { CHAR_CARRIAGE_RETURN, CHAR_LINEFEED, CHAR_NULL }; - -EFI_GRAPHICS_OUTPUT_BLT_PIXEL mGraphicsEfiColors[16] = { - // - // B G R reserved - // - {0x00, 0x00, 0x00, 0x00}, // BLACK - {0x98, 0x00, 0x00, 0x00}, // LIGHTBLUE - {0x00, 0x98, 0x00, 0x00}, // LIGHGREEN - {0x98, 0x98, 0x00, 0x00}, // LIGHCYAN - {0x00, 0x00, 0x98, 0x00}, // LIGHRED - {0x98, 0x00, 0x98, 0x00}, // MAGENTA - {0x00, 0x98, 0x98, 0x00}, // BROWN - {0x98, 0x98, 0x98, 0x00}, // LIGHTGRAY - {0x30, 0x30, 0x30, 0x00}, // DARKGRAY - BRIGHT BLACK - {0xff, 0x00, 0x00, 0x00}, // BLUE - {0x00, 0xff, 0x00, 0x00}, // LIME - {0xff, 0xff, 0x00, 0x00}, // CYAN - {0x00, 0x00, 0xff, 0x00}, // RED - {0xff, 0x00, 0xff, 0x00}, // FUCHSIA - {0x00, 0xff, 0xff, 0x00}, // YELLOW - {0xff, 0xff, 0xff, 0x00} // WHITE -}; - -EFI_NARROW_GLYPH mCursorGlyph = { - 0x0000, - 0x00, - { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF } -}; - -CHAR16 SpaceStr[] = { NARROW_CHAR, ' ', 0 }; - -EFI_DRIVER_BINDING_PROTOCOL gGraphicsConsoleDriverBinding = { - GraphicsConsoleControllerDriverSupported, - GraphicsConsoleControllerDriverStart, - GraphicsConsoleControllerDriverStop, - 0xa, - NULL, - NULL -}; - -/** - Test to see if Graphics Console could be supported on the Controller. - - Graphics Console could be supported if Graphics Output Protocol or UGA Draw - Protocol exists on the Controller. (UGA Draw Protocol could be skipped - if PcdUgaConsumeSupport is set to FALSE.) - - @param This Protocol instance pointer. - @param Controller Handle of device to test. - @param RemainingDevicePath Optional parameter use to pick a specific child - device to start. - - @retval EFI_SUCCESS This driver supports this device. - @retval other This driver does not support this device. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleControllerDriverSupported ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath - ) -{ - EFI_STATUS Status; - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - - GraphicsOutput = NULL; - UgaDraw = NULL; - // - // Open the IO Abstraction(s) needed to perform the supported test - // - Status = gBS->OpenProtocol ( - Controller, - &gEfiGraphicsOutputProtocolGuid, - (VOID **) &GraphicsOutput, - This->DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_BY_DRIVER - ); - - if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) { - // - // Open Graphics Output Protocol failed, try to open UGA Draw Protocol - // - Status = gBS->OpenProtocol ( - Controller, - &gEfiUgaDrawProtocolGuid, - (VOID **) &UgaDraw, - This->DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_BY_DRIVER - ); - } - if (EFI_ERROR (Status)) { - return Status; - } - -#if 0 - // - // We need to ensure that we do not layer on top of a virtual handle. - // We need to ensure that the handles produced by the conspliter do not - // get used. - // - Status = gBS->OpenProtocol ( - Controller, - &gEfiDevicePathProtocolGuid, - (VOID **) &DevicePath, - This->DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_BY_DRIVER - ); - if (!EFI_ERROR (Status)) { - gBS->CloseProtocol ( - Controller, - &gEfiDevicePathProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } else { - goto Error; - } -#endif - - // - // Does Hii Exist? If not, we aren't ready to run - // - Status = EfiLocateHiiProtocol (); - - // - // Close the I/O Abstraction(s) used to perform the supported test - // -//Error: - if (GraphicsOutput != NULL) { - gBS->CloseProtocol ( - Controller, - &gEfiGraphicsOutputProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - gBS->CloseProtocol ( - Controller, - &gEfiUgaDrawProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } - return Status; -} - - -/** - Start this driver on Controller by opening Graphics Output protocol or - UGA Draw protocol, and installing Simple Text Out protocol on Controller. - (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) - - @param This Protocol instance pointer. - @param Controller Handle of device to bind driver to - @param RemainingDevicePath Optional parameter use to pick a specific child - device to start. - - @retval EFI_SUCCESS This driver is added to Controller. - @retval other This driver does not support this device. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleControllerDriverStart ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath - ) -{ - EFI_STATUS Status; - GRAPHICS_CONSOLE_DEV *Private; - UINT32 HorizontalResolution; - UINT32 VerticalResolution; - UINT32 ColorDepth; - UINT32 RefreshRate; - UINTN MaxMode; - UINTN Columns; - UINTN Rows; - UINT32 ModeNumber; - EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *Mode; - ModeNumber = 0; - - // - // Initialize the Graphics Console device instance - // - Private = AllocateCopyPool ( - sizeof (GRAPHICS_CONSOLE_DEV), - &mGraphicsConsoleDevTemplate - ); - if (Private == NULL) { - return EFI_OUT_OF_RESOURCES; - } - Private->SimpleTextOutput.Mode = &(Private->SimpleTextOutputMode); - - Status = gBS->OpenProtocol ( - Controller, - &gEfiGraphicsOutputProtocolGuid, - (VOID **) &Private->GraphicsOutput, - This->DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_BY_DRIVER - ); - - Status = ExynosGopConstructor(Private); - if (EFI_ERROR (Status)) { - goto Error; - } - - if (EFI_ERROR(Status) && FeaturePcdGet (PcdUgaConsumeSupport)) { - Status = gBS->OpenProtocol ( - Controller, - &gEfiUgaDrawProtocolGuid, - (VOID **) &Private->UgaDraw, - This->DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_BY_DRIVER - ); - } - - if (EFI_ERROR (Status)) { - goto Error; - } - - // - // If the current mode information can not be retrieved, then attempt to set the default mode - // of 800x600, 32 bit color, 60 Hz refresh. - // - HorizontalResolution = 800; - VerticalResolution = 600; - - if (Private->GraphicsOutput != NULL) { - // - // The console is build on top of Graphics Output Protocol, find the mode number - // for the user-defined mode; if there are multiple video devices, - // graphic console driver will set all the video devices to the same mode. - // - Status = CheckModeSupported ( - Private->GraphicsOutput, - CURRENT_HORIZONTAL_RESOLUTION, - CURRENT_VERTICAL_RESOLUTION, - &ModeNumber - ); - if (!EFI_ERROR(Status)) { - // - // Update default mode to current mode - // - HorizontalResolution = CURRENT_HORIZONTAL_RESOLUTION; - VerticalResolution = CURRENT_VERTICAL_RESOLUTION; - } else { - // - // if not supporting current mode, try 800x600 which is required by UEFI/EFI spec - // - Status = CheckModeSupported ( - Private->GraphicsOutput, - 800, - 600, - &ModeNumber - ); - } - - Mode = Private->GraphicsOutput->Mode; - - if (EFI_ERROR (Status) || (Mode->MaxMode != 0)) { - // - // Set default mode failed or device don't support default mode, then get the current mode information - // - HorizontalResolution = Mode->Info->HorizontalResolution; - VerticalResolution = Mode->Info->VerticalResolution; - ModeNumber = Mode->Mode; - } - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - // - // At first try to set user-defined resolution - // - ColorDepth = 32; - RefreshRate = 60; - Status = Private->UgaDraw->SetMode ( - Private->UgaDraw, - CURRENT_HORIZONTAL_RESOLUTION, - CURRENT_VERTICAL_RESOLUTION, - ColorDepth, - RefreshRate - ); - if (!EFI_ERROR (Status)) { - HorizontalResolution = CURRENT_HORIZONTAL_RESOLUTION; - VerticalResolution = CURRENT_VERTICAL_RESOLUTION; - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - // - // Try to set 800*600 which is required by UEFI/EFI spec - // - Status = Private->UgaDraw->SetMode ( - Private->UgaDraw, - HorizontalResolution, - VerticalResolution, - ColorDepth, - RefreshRate - ); - if (EFI_ERROR (Status)) { - Status = Private->UgaDraw->GetMode ( - Private->UgaDraw, - &HorizontalResolution, - &VerticalResolution, - &ColorDepth, - &RefreshRate - ); - if (EFI_ERROR (Status)) { - goto Error; - } - } - } else { - Status = EFI_UNSUPPORTED; - goto Error; - } - } - - // - // Compute the maximum number of text Rows and Columns that this current graphics mode can support - // - Columns = HorizontalResolution / EFI_GLYPH_WIDTH; - Rows = VerticalResolution / EFI_GLYPH_HEIGHT; - - // - // See if the mode is too small to support the required 80x25 text mode - // - if (Columns < 80 || Rows < 25) { - goto Error; - } - // - // Add Mode #0 that must be 80x25 - // - MaxMode = 0; - Private->ModeData[MaxMode].GopWidth = HorizontalResolution; - Private->ModeData[MaxMode].GopHeight = VerticalResolution; - Private->ModeData[MaxMode].GopModeNumber = ModeNumber; - Private->ModeData[MaxMode].DeltaX = (HorizontalResolution - (80 * EFI_GLYPH_WIDTH)) >> 1; - Private->ModeData[MaxMode].DeltaY = (VerticalResolution - (25 * EFI_GLYPH_HEIGHT)) >> 1; - MaxMode++; - - // - // If it is possible to support Mode #1 - 80x50, than add it as an active mode - // - if (Rows >= 50) { - Private->ModeData[MaxMode].GopWidth = HorizontalResolution; - Private->ModeData[MaxMode].GopHeight = VerticalResolution; - Private->ModeData[MaxMode].GopModeNumber = ModeNumber; - Private->ModeData[MaxMode].DeltaX = (HorizontalResolution - (80 * EFI_GLYPH_WIDTH)) >> 1; - Private->ModeData[MaxMode].DeltaY = (VerticalResolution - (50 * EFI_GLYPH_HEIGHT)) >> 1; - MaxMode++; - } - - // - // If it is not to support Mode #1 - 80x50, then skip it - // - if (MaxMode < 2) { - Private->ModeData[MaxMode].Columns = 0; - Private->ModeData[MaxMode].Rows = 0; - Private->ModeData[MaxMode].GopWidth = HorizontalResolution; - Private->ModeData[MaxMode].GopHeight = VerticalResolution; - Private->ModeData[MaxMode].GopModeNumber = ModeNumber; - Private->ModeData[MaxMode].DeltaX = 0; - Private->ModeData[MaxMode].DeltaY = 0; - MaxMode++; - } - - // - // Add Mode #2 that must be 100x31 (graphic mode >= 800x600) - // - if (Columns >= 100 && Rows >= 31) { - Private->ModeData[MaxMode].GopWidth = HorizontalResolution; - Private->ModeData[MaxMode].GopHeight = VerticalResolution; - Private->ModeData[MaxMode].GopModeNumber = ModeNumber; - Private->ModeData[MaxMode].DeltaX = (HorizontalResolution - (100 * EFI_GLYPH_WIDTH)) >> 1; - Private->ModeData[MaxMode].DeltaY = (VerticalResolution - (31 * EFI_GLYPH_HEIGHT)) >> 1; - MaxMode++; - } - - // - // Add Mode #3 that uses the entire display for user-defined mode - // - if (HorizontalResolution > 800 && VerticalResolution > 600) { - Private->ModeData[MaxMode].Columns = HorizontalResolution/EFI_GLYPH_WIDTH; - Private->ModeData[MaxMode].Rows = VerticalResolution/EFI_GLYPH_HEIGHT; - Private->ModeData[MaxMode].GopWidth = HorizontalResolution; - Private->ModeData[MaxMode].GopHeight = VerticalResolution; - Private->ModeData[MaxMode].GopModeNumber = ModeNumber; - Private->ModeData[MaxMode].DeltaX = (HorizontalResolution % EFI_GLYPH_WIDTH) >> 1; - Private->ModeData[MaxMode].DeltaY = (VerticalResolution % EFI_GLYPH_HEIGHT) >> 1; - MaxMode++; - } - - // - // Update the maximum number of modes - // - Private->SimpleTextOutputMode.MaxMode = (INT32) MaxMode; - - // - // Determine the number of text modes that this protocol can support - // - Status = GraphicsConsoleConOutSetMode (&Private->SimpleTextOutput, 0); - if (EFI_ERROR (Status)) { - goto Error; - } - - DEBUG_CODE_BEGIN (); - GraphicsConsoleConOutOutputString (&Private->SimpleTextOutput, (CHAR16 *)L"Graphics Console Started\n\r"); - DEBUG_CODE_END (); - - // - // Install protocol interfaces for the Graphics Console device. - // - Status = gBS->InstallMultipleProtocolInterfaces ( - &Controller, - &gEfiSimpleTextOutProtocolGuid, - &Private->SimpleTextOutput, - NULL - ); - - if(!EFI_ERROR (Status)) { - gST->ConOut = &Private->SimpleTextOutput; - } - -Error: - if (EFI_ERROR (Status)) { - // - // Close the GOP and UGA Draw Protocol - // - if (Private->GraphicsOutput != NULL) { - gBS->CloseProtocol ( - Controller, - &gEfiGraphicsOutputProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - gBS->CloseProtocol ( - Controller, - &gEfiUgaDrawProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } - - if (Private->LineBuffer != NULL) { - FreePool (Private->LineBuffer); - } - - // - // Free private data - // - FreePool (Private); - } - - return Status; -} - -/** - Stop this driver on Controller by removing Simple Text Out protocol - and closing the Graphics Output Protocol or UGA Draw protocol on Controller. - (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) - - - @param This Protocol instance pointer. - @param Controller Handle of device to stop driver on - @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of - children is zero stop the entire bus driver. - @param ChildHandleBuffer List of Child Handles to Stop. - - @retval EFI_SUCCESS This driver is removed Controller. - @retval EFI_NOT_STARTED Simple Text Out protocol could not be found the - Controller. - @retval other This driver was not removed from this device. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleControllerDriverStop ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN UINTN NumberOfChildren, - IN EFI_HANDLE *ChildHandleBuffer - ) -{ - EFI_STATUS Status; - EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *SimpleTextOutput; - GRAPHICS_CONSOLE_DEV *Private=NULL; - - Status = gBS->OpenProtocol ( - Controller, - &gEfiSimpleTextOutProtocolGuid, - (VOID **) &SimpleTextOutput, - This->DriverBindingHandle, - Controller, - EFI_OPEN_PROTOCOL_GET_PROTOCOL - ); - if (EFI_ERROR (Status)) { - return EFI_NOT_STARTED; - } - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (SimpleTextOutput); - Status = gBS->UninstallProtocolInterface ( - Controller, - &gEfiSimpleTextOutProtocolGuid, - &Private->SimpleTextOutput - ); - - if (!EFI_ERROR (Status)) { - // - // Close the GOP or UGA IO Protocol - // - Status = ExynosGopDestructor(Private); - if (EFI_ERROR (Status)) { - ASSERT(Status); - } - if (Private->GraphicsOutput != NULL) { - gBS->CloseProtocol ( - Controller, - &gEfiGraphicsOutputProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - gBS->CloseProtocol ( - Controller, - &gEfiUgaDrawProtocolGuid, - This->DriverBindingHandle, - Controller - ); - } - - if (Private->LineBuffer != NULL) { - FreePool (Private->LineBuffer); - } - // - // Free our instance data - // - FreePool (Private); - } - - return Status; -} - -/** - Check if the current specific mode supported the user defined resolution - for the Graphics Console device based on Graphics Output Protocol. - - If yes, set the graphic devcice's current mode to this specific mode. - - @param GraphicsOutput Graphics Output Protocol instance pointer. - @param HorizontalResolution User defined horizontal resolution - @param VerticalResolution User defined vertical resolution. - @param CurrentModeNumber Current specific mode to be check. - - @retval EFI_SUCCESS The mode is supported. - @retval EFI_UNSUPPORTED The specific mode is out of range of graphics - device supported. - @retval other The specific mode does not support user defined - resolution or failed to set the current mode to the - specific mode on graphics device. - -**/ -EFI_STATUS -CheckModeSupported ( - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput, - IN UINT32 HorizontalResolution, - IN UINT32 VerticalResolution, - OUT UINT32 *CurrentModeNumber - ) -{ - UINT32 ModeNumber; - EFI_STATUS Status; - UINTN SizeOfInfo; - EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info; - UINT32 MaxMode; - - Status = EFI_SUCCESS; - MaxMode = GraphicsOutput->Mode->MaxMode; - - for (ModeNumber = 0; ModeNumber < MaxMode; ModeNumber++) { - Status = GraphicsOutput->QueryMode ( - GraphicsOutput, - ModeNumber, - &SizeOfInfo, - &Info - ); - if (!EFI_ERROR (Status)) { - if ((Info->HorizontalResolution == HorizontalResolution) && - (Info->VerticalResolution == VerticalResolution)) { - if ((GraphicsOutput->Mode->Info->HorizontalResolution == HorizontalResolution) && - (GraphicsOutput->Mode->Info->VerticalResolution == VerticalResolution)) { - // - // If video device has been set to this mode, we do not need to SetMode again - // - break; - } else { - Status = GraphicsOutput->SetMode (GraphicsOutput, ModeNumber); - if (!EFI_ERROR (Status)) { - FreePool (Info); - break; - } - } - } - FreePool (Info); - } - } - - if (ModeNumber == GraphicsOutput->Mode->MaxMode) { - Status = EFI_UNSUPPORTED; - } - - *CurrentModeNumber = ModeNumber; - return Status; -} - - -/** - Locate HII Database protocol and HII Font protocol. - - @retval EFI_SUCCESS HII Database protocol and HII Font protocol - are located successfully. - @return other Failed to locate HII Database protocol or - HII Font protocol. - -**/ -EFI_STATUS -EfiLocateHiiProtocol ( - VOID - ) -{ - EFI_HANDLE Handle; - UINTN Size; - EFI_STATUS Status; - - // - // There should only be one - so buffer size is this - // - Size = sizeof (EFI_HANDLE); - - Status = gBS->LocateHandle ( - ByProtocol, - &gEfiHiiDatabaseProtocolGuid, - NULL, - &Size, - (VOID **) &Handle - ); - - if (EFI_ERROR (Status)) { - return Status; - } - - Status = gBS->HandleProtocol ( - Handle, - &gEfiHiiDatabaseProtocolGuid, - (VOID **) &mHiiDatabase - ); - - if (EFI_ERROR (Status)) { - return Status; - } - - Status = gBS->HandleProtocol ( - Handle, - &gEfiHiiFontProtocolGuid, - (VOID **) &mHiiFont - ); - return Status; -} - -// -// Body of the STO functions -// - -/** - Reset the text output device hardware and optionally run diagnostics. - - Implements SIMPLE_TEXT_OUTPUT.Reset(). - If ExtendeVerification is TRUE, then perform dependent Graphics Console - device reset, and set display mode to mode 0. - If ExtendedVerification is FALSE, only set display mode to mode 0. - - @param This Protocol instance pointer. - @param ExtendedVerification Indicates that the driver may perform a more - exhaustive verification operation of the device - during reset. - - @retval EFI_SUCCESS The text output device was reset. - @retval EFI_DEVICE_ERROR The text output device is not functioning correctly and - could not be reset. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutReset ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN BOOLEAN ExtendedVerification - ) -{ - This->SetAttribute (This, EFI_TEXT_ATTR (This->Mode->Attribute & 0x0F, EFI_BACKGROUND_BLACK)); - return This->SetMode (This, 0); -} - - -/** - Write a Unicode string to the output device. - - Implements SIMPLE_TEXT_OUTPUT.OutputString(). - The Unicode string will be converted to Glyphs and will be - sent to the Graphics Console. - - @param This Protocol instance pointer. - @param WString The NULL-terminated Unicode string to be displayed - on the output device(s). All output devices must - also support the Unicode drawing defined in this file. - - @retval EFI_SUCCESS The string was output to the device. - @retval EFI_DEVICE_ERROR The device reported an error while attempting to output - the text. - @retval EFI_UNSUPPORTED The output device's mode is not currently in a - defined text mode. - @retval EFI_WARN_UNKNOWN_GLYPH This warning code indicates that some of the - characters in the Unicode string could not be - rendered and were skipped. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutOutputString ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN CHAR16 *WString - ) -{ - GRAPHICS_CONSOLE_DEV *Private; - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - INTN Mode; - UINTN MaxColumn; - UINTN MaxRow; - UINTN Width; - UINTN Height; - UINTN Delta; - EFI_STATUS Status; - BOOLEAN Warning; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background; - UINTN DeltaX; - UINTN DeltaY; - UINTN Count; - UINTN Index; - INT32 OriginAttribute; - EFI_TPL OldTpl; - - Status = EFI_SUCCESS; - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - // - // Current mode - // - Mode = This->Mode->Mode; - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - GraphicsOutput = Private->GraphicsOutput; - UgaDraw = Private->UgaDraw; - - MaxColumn = Private->ModeData[Mode].Columns; - MaxRow = Private->ModeData[Mode].Rows; - DeltaX = (UINTN) Private->ModeData[Mode].DeltaX; - DeltaY = (UINTN) Private->ModeData[Mode].DeltaY; - Width = MaxColumn * EFI_GLYPH_WIDTH; - Height = (MaxRow - 1) * EFI_GLYPH_HEIGHT; - Delta = Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL); - - // - // The Attributes won't change when during the time OutputString is called - // - GetTextColors (This, &Foreground, &Background); - - EraseCursor (This); - - Warning = FALSE; - - // - // Backup attribute - // - OriginAttribute = This->Mode->Attribute; - - while (*WString != L'\0') { - - if (*WString == CHAR_BACKSPACE) { - // - // If the cursor is at the left edge of the display, then move the cursor - // one row up. - // - if (This->Mode->CursorColumn == 0 && This->Mode->CursorRow > 0) { - This->Mode->CursorRow--; - This->Mode->CursorColumn = (INT32) (MaxColumn - 1); - This->OutputString (This, SpaceStr); - EraseCursor (This); - This->Mode->CursorRow--; - This->Mode->CursorColumn = (INT32) (MaxColumn - 1); - } else if (This->Mode->CursorColumn > 0) { - // - // If the cursor is not at the left edge of the display, then move the cursor - // left one column. - // - This->Mode->CursorColumn--; - This->OutputString (This, SpaceStr); - EraseCursor (This); - This->Mode->CursorColumn--; - } - - WString++; - - } else if (*WString == CHAR_LINEFEED) { - // - // If the cursor is at the bottom of the display, then scroll the display one - // row, and do not update the cursor position. Otherwise, move the cursor - // down one row. - // - if (This->Mode->CursorRow == (INT32) (MaxRow - 1)) { - if (GraphicsOutput != NULL) { - // - // Scroll Screen Up One Row - // - GraphicsOutput->Blt ( - GraphicsOutput, - NULL, - EfiBltVideoToVideo, - DeltaX, - DeltaY + EFI_GLYPH_HEIGHT, - DeltaX, - DeltaY, - Width, - Height, - Delta - ); - - // - // Print Blank Line at last line - // - GraphicsOutput->Blt ( - GraphicsOutput, - &Background, - EfiBltVideoFill, - 0, - 0, - DeltaX, - DeltaY + Height, - Width, - EFI_GLYPH_HEIGHT, - Delta - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - // - // Scroll Screen Up One Row - // - UgaDraw->Blt ( - UgaDraw, - NULL, - EfiUgaVideoToVideo, - DeltaX, - DeltaY + EFI_GLYPH_HEIGHT, - DeltaX, - DeltaY, - Width, - Height, - Delta - ); - - // - // Print Blank Line at last line - // - UgaDraw->Blt ( - UgaDraw, - (EFI_UGA_PIXEL *) (UINTN) &Background, - EfiUgaVideoFill, - 0, - 0, - DeltaX, - DeltaY + Height, - Width, - EFI_GLYPH_HEIGHT, - Delta - ); - } - } else { - This->Mode->CursorRow++; - } - - WString++; - - } else if (*WString == CHAR_CARRIAGE_RETURN) { - // - // Move the cursor to the beginning of the current row. - // - This->Mode->CursorColumn = 0; - WString++; - - } else if (*WString == WIDE_CHAR) { - - This->Mode->Attribute |= EFI_WIDE_ATTRIBUTE; - WString++; - - } else if (*WString == NARROW_CHAR) { - - This->Mode->Attribute &= (~ (UINT32) EFI_WIDE_ATTRIBUTE); - WString++; - - } else { - // - // Print the character at the current cursor position and move the cursor - // right one column. If this moves the cursor past the right edge of the - // display, then the line should wrap to the beginning of the next line. This - // is equivalent to inserting a CR and an LF. Note that if the cursor is at the - // bottom of the display, and the line wraps, then the display will be scrolled - // one line. - // If wide char is going to be displayed, need to display one character at a time - // Or, need to know the display length of a certain string. - // - // Index is used to determine how many character width units (wide = 2, narrow = 1) - // Count is used to determine how many characters are used regardless of their attributes - // - for (Count = 0, Index = 0; (This->Mode->CursorColumn + Index) < MaxColumn; Count++, Index++) { - if (WString[Count] == CHAR_NULL || - WString[Count] == CHAR_BACKSPACE || - WString[Count] == CHAR_LINEFEED || - WString[Count] == CHAR_CARRIAGE_RETURN || - WString[Count] == WIDE_CHAR || - WString[Count] == NARROW_CHAR) { - break; - } - // - // Is the wide attribute on? - // - if ((This->Mode->Attribute & EFI_WIDE_ATTRIBUTE) != 0) { - // - // If wide, add one more width unit than normal since we are going to increment at the end of the for loop - // - Index++; - // - // This is the end-case where if we are at column 79 and about to print a wide character - // We should prevent this from happening because we will wrap inappropriately. We should - // not print this character until the next line. - // - if ((This->Mode->CursorColumn + Index + 1) > MaxColumn) { - Index++; - break; - } - } - } - - Status = DrawUnicodeWeightAtCursorN (This, WString, Count); - if (EFI_ERROR (Status)) { - Warning = TRUE; - } - // - // At the end of line, output carriage return and line feed - // - WString += Count; - This->Mode->CursorColumn += (INT32) Index; - if (This->Mode->CursorColumn > (INT32) MaxColumn) { - This->Mode->CursorColumn -= 2; - This->OutputString (This, SpaceStr); - } - - if (This->Mode->CursorColumn >= (INT32) MaxColumn) { - EraseCursor (This); - This->OutputString (This, mCrLfString); - EraseCursor (This); - } - } - } - - This->Mode->Attribute = OriginAttribute; - - EraseCursor (This); - - if (Warning) { - Status = EFI_WARN_UNKNOWN_GLYPH; - } - - gBS->RestoreTPL (OldTpl); - return Status; - -} - -/** - Verifies that all characters in a Unicode string can be output to the - target device. - - Implements SIMPLE_TEXT_OUTPUT.TestString(). - If one of the characters in the *Wstring is neither valid valid Unicode - drawing characters, not ASCII code, then this function will return - EFI_UNSUPPORTED - - @param This Protocol instance pointer. - @param WString The NULL-terminated Unicode string to be examined for the output - device(s). - - @retval EFI_SUCCESS The device(s) are capable of rendering the output string. - @retval EFI_UNSUPPORTED Some of the characters in the Unicode string cannot be - rendered by one or more of the output devices mapped - by the EFI handle. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutTestString ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN CHAR16 *WString - ) -{ - EFI_STATUS Status; - UINT16 Count; - - EFI_IMAGE_OUTPUT *Blt; - - Blt = NULL; - Count = 0; - - while (WString[Count] != 0) { - Status = mHiiFont->GetGlyph ( - mHiiFont, - WString[Count], - NULL, - &Blt, - NULL - ); - if (Blt != NULL) { - FreePool (Blt); - Blt = NULL; - } - Count++; - - if (EFI_ERROR (Status)) { - return EFI_UNSUPPORTED; - } - } - - return EFI_SUCCESS; -} - - -/** - Returns information for an available text mode that the output device(s) - supports - - Implements SIMPLE_TEXT_OUTPUT.QueryMode(). - It returnes information for an available text mode that the Graphics Console supports. - In this driver,we only support text mode 80x25, which is defined as mode 0. - - @param This Protocol instance pointer. - @param ModeNumber The mode number to return information on. - @param Columns The returned columns of the requested mode. - @param Rows The returned rows of the requested mode. - - @retval EFI_SUCCESS The requested mode information is returned. - @retval EFI_UNSUPPORTED The mode number is not valid. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutQueryMode ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN ModeNumber, - OUT UINTN *Columns, - OUT UINTN *Rows - ) -{ - GRAPHICS_CONSOLE_DEV *Private; - EFI_STATUS Status; - EFI_TPL OldTpl; - - if (ModeNumber >= (UINTN) This->Mode->MaxMode) { - return EFI_UNSUPPORTED; - } - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - Status = EFI_SUCCESS; - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - - *Columns = Private->ModeData[ModeNumber].Columns; - *Rows = Private->ModeData[ModeNumber].Rows; - - if (*Columns <= 0 && *Rows <= 0) { - Status = EFI_UNSUPPORTED; - goto Done; - - } - -Done: - gBS->RestoreTPL (OldTpl); - return Status; -} - - -/** - Sets the output device(s) to a specified mode. - - Implements SIMPLE_TEXT_OUTPUT.SetMode(). - Set the Graphics Console to a specified mode. In this driver, we only support mode 0. - - @param This Protocol instance pointer. - @param ModeNumber The text mode to set. - - @retval EFI_SUCCESS The requested text mode is set. - @retval EFI_DEVICE_ERROR The requested text mode cannot be set because of - Graphics Console device error. - @retval EFI_UNSUPPORTED The text mode number is not valid. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutSetMode ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN ModeNumber - ) -{ - EFI_STATUS Status; - GRAPHICS_CONSOLE_DEV *Private; - GRAPHICS_CONSOLE_MODE_DATA *ModeData; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL *NewLineBuffer; - UINT32 HorizontalResolution; - UINT32 VerticalResolution; - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - UINT32 ColorDepth; - UINT32 RefreshRate; - EFI_TPL OldTpl; - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - GraphicsOutput = Private->GraphicsOutput; - UgaDraw = Private->UgaDraw; - ModeData = &(Private->ModeData[ModeNumber]); - - // - // Make sure the requested mode number is supported - // - if (ModeNumber >= (UINTN) This->Mode->MaxMode) { - Status = EFI_UNSUPPORTED; - goto Done; - } - - if (ModeData->Columns <= 0 && ModeData->Rows <= 0) { - Status = EFI_UNSUPPORTED; - goto Done; - } - // - // Attempt to allocate a line buffer for the requested mode number - // - NewLineBuffer = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) * ModeData->Columns * EFI_GLYPH_WIDTH * EFI_GLYPH_HEIGHT); - - if (NewLineBuffer == NULL) { - // - // The new line buffer could not be allocated, so return an error. - // No changes to the state of the current console have been made, so the current console is still valid - // - Status = EFI_OUT_OF_RESOURCES; - goto Done; - } - // - // If the mode has been set at least one other time, then LineBuffer will not be NULL - // - if (Private->LineBuffer != NULL) { - // - // Clear the current text window on the current graphics console - // - This->ClearScreen (This); - - // - // If the new mode is the same as the old mode, then just return EFI_SUCCESS - // - if ((INT32) ModeNumber == This->Mode->Mode) { - FreePool (NewLineBuffer); - Status = EFI_SUCCESS; - goto Done; - } - // - // Otherwise, the size of the text console and/or the GOP/UGA mode will be changed, - // so erase the cursor, and free the LineBuffer for the current mode - // - EraseCursor (This); - - FreePool (Private->LineBuffer); - } - // - // Assign the current line buffer to the newly allocated line buffer - // - Private->LineBuffer = NewLineBuffer; - - if (GraphicsOutput != NULL) { - if (ModeData->GopModeNumber != GraphicsOutput->Mode->Mode) { - // - // Either no graphics mode is currently set, or it is set to the wrong resolution, so set the new graphics mode - // - Status = GraphicsOutput->SetMode (GraphicsOutput, ModeData->GopModeNumber); - if (EFI_ERROR (Status)) { - // - // The mode set operation failed - // - goto Done; - } - } else { - // - // The current graphics mode is correct, so simply clear the entire display - // - Status = GraphicsOutput->Blt ( - GraphicsOutput, - &mGraphicsEfiColors[0], - EfiBltVideoFill, - 0, - 0, - 0, - 0, - ModeData->GopWidth, - ModeData->GopHeight, - 0 - ); - } - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - // - // Get the current UGA Draw mode information - // - Status = UgaDraw->GetMode ( - UgaDraw, - &HorizontalResolution, - &VerticalResolution, - &ColorDepth, - &RefreshRate - ); - if (EFI_ERROR (Status) || HorizontalResolution != ModeData->GopWidth || VerticalResolution != ModeData->GopHeight) { - // - // Either no graphics mode is currently set, or it is set to the wrong resolution, so set the new graphics mode - // - Status = UgaDraw->SetMode ( - UgaDraw, - ModeData->GopWidth, - ModeData->GopHeight, - 32, - 60 - ); - if (EFI_ERROR (Status)) { - // - // The mode set operation failed - // - goto Done; - } - } else { - // - // The current graphics mode is correct, so simply clear the entire display - // - Status = UgaDraw->Blt ( - UgaDraw, - (EFI_UGA_PIXEL *) (UINTN) &mGraphicsEfiColors[0], - EfiUgaVideoFill, - 0, - 0, - 0, - 0, - ModeData->GopWidth, - ModeData->GopHeight, - 0 - ); - } - } - - // - // The new mode is valid, so commit the mode change - // - This->Mode->Mode = (INT32) ModeNumber; - - // - // Move the text cursor to the upper left hand corner of the display and enable it - // - This->SetCursorPosition (This, 0, 0); - - Status = EFI_SUCCESS; - -Done: - gBS->RestoreTPL (OldTpl); - return Status; -} - - -/** - Sets the background and foreground colors for the OutputString () and - ClearScreen () functions. - - Implements SIMPLE_TEXT_OUTPUT.SetAttribute(). - - @param This Protocol instance pointer. - @param Attribute The attribute to set. Bits 0..3 are the foreground - color, and bits 4..6 are the background color. - All other bits are undefined and must be zero. - - @retval EFI_SUCCESS The requested attribute is set. - @retval EFI_DEVICE_ERROR The requested attribute cannot be set due to Graphics Console port error. - @retval EFI_UNSUPPORTED The attribute requested is not defined. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutSetAttribute ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN Attribute - ) -{ - EFI_TPL OldTpl; - - if ((Attribute | 0xFF) != 0xFF) { - return EFI_UNSUPPORTED; - } - - if ((INT32) Attribute == This->Mode->Attribute) { - return EFI_SUCCESS; - } - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - - EraseCursor (This); - - This->Mode->Attribute = (INT32) Attribute; - - EraseCursor (This); - - gBS->RestoreTPL (OldTpl); - - return EFI_SUCCESS; -} - - -/** - Clears the output device(s) display to the currently selected background - color. - - Implements SIMPLE_TEXT_OUTPUT.ClearScreen(). - - @param This Protocol instance pointer. - - @retval EFI_SUCCESS The operation completed successfully. - @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. - @retval EFI_UNSUPPORTED The output device is not in a valid text mode. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutClearScreen ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This - ) -{ - EFI_STATUS Status; - GRAPHICS_CONSOLE_DEV *Private; - GRAPHICS_CONSOLE_MODE_DATA *ModeData; - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background; - EFI_TPL OldTpl; - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - GraphicsOutput = Private->GraphicsOutput; - UgaDraw = Private->UgaDraw; - ModeData = &(Private->ModeData[This->Mode->Mode]); - - GetTextColors (This, &Foreground, &Background); - if (GraphicsOutput != NULL) { - Status = GraphicsOutput->Blt ( - GraphicsOutput, - &Background, - EfiBltVideoFill, - 0, - 0, - 0, - 0, - ModeData->GopWidth, - ModeData->GopHeight, - 0 - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - Status = UgaDraw->Blt ( - UgaDraw, - (EFI_UGA_PIXEL *) (UINTN) &Background, - EfiUgaVideoFill, - 0, - 0, - 0, - 0, - ModeData->GopWidth, - ModeData->GopHeight, - 0 - ); - } else { - Status = EFI_UNSUPPORTED; - } - - This->Mode->CursorColumn = 0; - This->Mode->CursorRow = 0; - - EraseCursor (This); - - gBS->RestoreTPL (OldTpl); - - return Status; -} - - -/** - Sets the current coordinates of the cursor position. - - Implements SIMPLE_TEXT_OUTPUT.SetCursorPosition(). - - @param This Protocol instance pointer. - @param Column The position to set the cursor to. Must be greater than or - equal to zero and less than the number of columns and rows - by QueryMode (). - @param Row The position to set the cursor to. Must be greater than or - equal to zero and less than the number of columns and rows - by QueryMode (). - - @retval EFI_SUCCESS The operation completed successfully. - @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. - @retval EFI_UNSUPPORTED The output device is not in a valid text mode, or the - cursor position is invalid for the current mode. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutSetCursorPosition ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN Column, - IN UINTN Row - ) -{ - GRAPHICS_CONSOLE_DEV *Private; - GRAPHICS_CONSOLE_MODE_DATA *ModeData; - EFI_STATUS Status; - EFI_TPL OldTpl; - - Status = EFI_SUCCESS; - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - ModeData = &(Private->ModeData[This->Mode->Mode]); - - if ((Column >= ModeData->Columns) || (Row >= ModeData->Rows)) { - Status = EFI_UNSUPPORTED; - goto Done; - } - - if ((This->Mode->CursorColumn == (INT32) Column) && (This->Mode->CursorRow == (INT32) Row)) { - Status = EFI_SUCCESS; - goto Done; - } - - EraseCursor (This); - - This->Mode->CursorColumn = (INT32) Column; - This->Mode->CursorRow = (INT32) Row; - - EraseCursor (This); - -Done: - gBS->RestoreTPL (OldTpl); - - return Status; -} - - -/** - Makes the cursor visible or invisible. - - Implements SIMPLE_TEXT_OUTPUT.EnableCursor(). - - @param This Protocol instance pointer. - @param Visible If TRUE, the cursor is set to be visible, If FALSE, - the cursor is set to be invisible. - - @retval EFI_SUCCESS The operation completed successfully. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutEnableCursor ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN BOOLEAN Visible - ) -{ - EFI_TPL OldTpl; - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - - EraseCursor (This); - - This->Mode->CursorVisible = Visible; - - EraseCursor (This); - - gBS->RestoreTPL (OldTpl); - return EFI_SUCCESS; -} - -/** - Gets Graphics Console devcie's foreground color and background color. - - @param This Protocol instance pointer. - @param Foreground Returned text foreground color. - @param Background Returned text background color. - - @retval EFI_SUCCESS It returned always. - -**/ -EFI_STATUS -GetTextColors ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Foreground, - OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Background - ) -{ - INTN Attribute; - - Attribute = This->Mode->Attribute & 0x7F; - - *Foreground = mGraphicsEfiColors[Attribute & 0x0f]; - *Background = mGraphicsEfiColors[Attribute >> 4]; - - return EFI_SUCCESS; -} - -/** - Draw Unicode string on the Graphics Console device's screen. - - @param This Protocol instance pointer. - @param UnicodeWeight One Unicode string to be displayed. - @param Count The count of Unicode string. - - @retval EFI_OUT_OF_RESOURCES If no memory resource to use. - @retval EFI_UNSUPPORTED If no Graphics Output protocol and UGA Draw - protocol exist. - @retval EFI_SUCCESS Drawing Unicode string implemented successfully. - -**/ -EFI_STATUS -DrawUnicodeWeightAtCursorN ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN CHAR16 *UnicodeWeight, - IN UINTN Count - ) -{ - EFI_STATUS Status; - GRAPHICS_CONSOLE_DEV *Private; - EFI_IMAGE_OUTPUT *Blt; - EFI_STRING String; - EFI_FONT_DISPLAY_INFO *FontInfo; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - EFI_HII_ROW_INFO *RowInfoArray; - UINTN RowInfoArraySize; - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - Blt = (EFI_IMAGE_OUTPUT *) AllocateZeroPool (sizeof (EFI_IMAGE_OUTPUT)); - if (Blt == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - Blt->Width = (UINT16) (Private->ModeData[This->Mode->Mode].GopWidth); - Blt->Height = (UINT16) (Private->ModeData[This->Mode->Mode].GopHeight); - - String = AllocateCopyPool ((Count + 1) * sizeof (CHAR16), UnicodeWeight); - if (String == NULL) { - FreePool (Blt); - return EFI_OUT_OF_RESOURCES; - } - // - // Set the end character - // - *(String + Count) = L'\0'; - - FontInfo = (EFI_FONT_DISPLAY_INFO *) AllocateZeroPool (sizeof (EFI_FONT_DISPLAY_INFO)); - if (FontInfo == NULL) { - FreePool (Blt); - FreePool (String); - return EFI_OUT_OF_RESOURCES; - } - // - // Get current foreground and background colors. - // - GetTextColors (This, &FontInfo->ForegroundColor, &FontInfo->BackgroundColor); - - if (Private->GraphicsOutput != NULL) { - // - // If Graphics Output protocol exists, using HII Font protocol to draw. - // - Blt->Image.Screen = Private->GraphicsOutput; - - Status = mHiiFont->StringToImage ( - mHiiFont, - EFI_HII_IGNORE_IF_NO_GLYPH | EFI_HII_DIRECT_TO_SCREEN | EFI_HII_IGNORE_LINE_BREAK, - String, - FontInfo, - &Blt, - This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, - This->Mode->CursorRow * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, - NULL, - NULL, - NULL - ); - - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - // - // If Graphics Output protocol cannot be found and PcdUgaConsumeSupport enabled, - // using UGA Draw protocol to draw. - // - ASSERT (Private->UgaDraw!= NULL); - - UgaDraw = Private->UgaDraw; - - Blt->Image.Bitmap = AllocateZeroPool (Blt->Width * Blt->Height * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); - if (Blt->Image.Bitmap == NULL) { - FreePool (Blt); - FreePool (String); - return EFI_OUT_OF_RESOURCES; - } - - RowInfoArray = NULL; - // - // StringToImage only support blt'ing image to device using GOP protocol. If GOP is not supported in this platform, - // we ask StringToImage to print the string to blt buffer, then blt to device using UgaDraw. - // - Status = mHiiFont->StringToImage ( - mHiiFont, - EFI_HII_IGNORE_IF_NO_GLYPH | EFI_HII_IGNORE_LINE_BREAK, - String, - FontInfo, - &Blt, - This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, - This->Mode->CursorRow * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, - &RowInfoArray, - &RowInfoArraySize, - NULL - ); - - if (!EFI_ERROR (Status)) { - // - // Line breaks are handled by caller of DrawUnicodeWeightAtCursorN, so the updated parameter RowInfoArraySize by StringToImage will - // always be 1 or 0 (if there is no valid Unicode Char can be printed). ASSERT here to make sure. - // - ASSERT (RowInfoArraySize <= 1); - - Status = UgaDraw->Blt ( - UgaDraw, - (EFI_UGA_PIXEL *) Blt->Image.Bitmap, - EfiUgaBltBufferToVideo, - This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, - (This->Mode->CursorRow) * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, - This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, - (This->Mode->CursorRow) * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, - RowInfoArray[0].LineWidth, - RowInfoArray[0].LineHeight, - Blt->Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) - ); - } - - FreePool (RowInfoArray); - FreePool (Blt->Image.Bitmap); - } else { - Status = EFI_UNSUPPORTED; - } - - if (Blt != NULL) { - FreePool (Blt); - } - if (String != NULL) { - FreePool (String); - } - if (FontInfo != NULL) { - FreePool (FontInfo); - } - return Status; -} - -/** - Erase the cursor on the screen. - - @param This Protocol instance pointer. - - @retval EFI_SUCCESS The cursor is erased successfully. - -**/ -EFI_STATUS -EraseCursor ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This - ) -{ - GRAPHICS_CONSOLE_DEV *Private; - EFI_SIMPLE_TEXT_OUTPUT_MODE *CurrentMode; - INTN GlyphX; - INTN GlyphY; - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Foreground; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Background; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION BltChar[EFI_GLYPH_HEIGHT][EFI_GLYPH_WIDTH]; - UINTN PosX; - UINTN PosY; - - CurrentMode = This->Mode; - - if (!CurrentMode->CursorVisible) { - return EFI_SUCCESS; - } - - Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); - GraphicsOutput = Private->GraphicsOutput; - UgaDraw = Private->UgaDraw; - - // - // In this driver, only narrow character was supported. - // - // - // Blt a character to the screen - // - GlyphX = (CurrentMode->CursorColumn * EFI_GLYPH_WIDTH) + Private->ModeData[CurrentMode->Mode].DeltaX; - GlyphY = (CurrentMode->CursorRow * EFI_GLYPH_HEIGHT) + Private->ModeData[CurrentMode->Mode].DeltaY; - if (GraphicsOutput != NULL) { - GraphicsOutput->Blt ( - GraphicsOutput, - (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) BltChar, - EfiBltVideoToBltBuffer, - GlyphX, - GlyphY, - 0, - 0, - EFI_GLYPH_WIDTH, - EFI_GLYPH_HEIGHT, - EFI_GLYPH_WIDTH * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - UgaDraw->Blt ( - UgaDraw, - (EFI_UGA_PIXEL *) (UINTN) BltChar, - EfiUgaVideoToBltBuffer, - GlyphX, - GlyphY, - 0, - 0, - EFI_GLYPH_WIDTH, - EFI_GLYPH_HEIGHT, - EFI_GLYPH_WIDTH * sizeof (EFI_UGA_PIXEL) - ); - } - - GetTextColors (This, &Foreground.Pixel, &Background.Pixel); - - // - // Convert Monochrome bitmap of the Glyph to BltBuffer structure - // - for (PosY = 0; PosY < EFI_GLYPH_HEIGHT; PosY++) { - for (PosX = 0; PosX < EFI_GLYPH_WIDTH; PosX++) { - if ((mCursorGlyph.GlyphCol1[PosY] & (BIT0 << PosX)) != 0) { - BltChar[PosY][EFI_GLYPH_WIDTH - PosX - 1].Raw ^= Foreground.Raw; - } - } - } - - if (GraphicsOutput != NULL) { - GraphicsOutput->Blt ( - GraphicsOutput, - (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) BltChar, - EfiBltBufferToVideo, - 0, - 0, - GlyphX, - GlyphY, - EFI_GLYPH_WIDTH, - EFI_GLYPH_HEIGHT, - EFI_GLYPH_WIDTH * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) - ); - } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { - UgaDraw->Blt ( - UgaDraw, - (EFI_UGA_PIXEL *) (UINTN) BltChar, - EfiUgaBltBufferToVideo, - 0, - 0, - GlyphX, - GlyphY, - EFI_GLYPH_WIDTH, - EFI_GLYPH_HEIGHT, - EFI_GLYPH_WIDTH * sizeof (EFI_UGA_PIXEL) - ); - } - - return EFI_SUCCESS; -} - -/** - HII Database Protocol notification event handler. - - Register font package when HII Database Protocol has been installed. - - @param[in] Event Event whose notification function is being invoked. - @param[in] Context Pointer to the notification function's context. -**/ -VOID -EFIAPI -RegisterFontPackage ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - EFI_STATUS Status; - EFI_HII_SIMPLE_FONT_PACKAGE_HDR *SimplifiedFont; - UINT32 PackageLength; - UINT8 *Package; - UINT8 *Location; - EFI_HII_DATABASE_PROTOCOL *HiiDatabase; - - // - // Locate HII Database Protocol - // - Status = gBS->LocateProtocol ( - &gEfiHiiDatabaseProtocolGuid, - NULL, - (VOID **) &HiiDatabase - ); - ASSERT_EFI_ERROR (Status); - - // - // Add 4 bytes to the header for entire length for HiiAddPackages use only. - // - // +--------------------------------+ <-- Package - // | | - // | PackageLength(4 bytes) | - // | | - // |--------------------------------| <-- SimplifiedFont - // | | - // |EFI_HII_SIMPLE_FONT_PACKAGE_HDR | - // | | - // |--------------------------------| <-- Location - // | | - // | gUsStdNarrowGlyphData | - // | | - // +--------------------------------+ - - PackageLength = sizeof (EFI_HII_SIMPLE_FONT_PACKAGE_HDR) + mNarrowFontSize + 4; - Package = AllocateZeroPool (PackageLength); - ASSERT (Package != NULL); - - WriteUnaligned32((UINT32 *) Package,PackageLength); - SimplifiedFont = (EFI_HII_SIMPLE_FONT_PACKAGE_HDR *) (Package + 4); - SimplifiedFont->Header.Length = (UINT32) (PackageLength - 4); - SimplifiedFont->Header.Type = EFI_HII_PACKAGE_SIMPLE_FONTS; - SimplifiedFont->NumberOfNarrowGlyphs = (UINT16) (mNarrowFontSize / sizeof (EFI_NARROW_GLYPH)); - - Location = (UINT8 *) (&SimplifiedFont->NumberOfWideGlyphs + 1); - CopyMem (Location, gUsStdNarrowGlyphData, mNarrowFontSize); - - // - // Add this simplified font package to a package list then install it. - // - mHiiHandle = HiiAddPackages ( - &mFontPackageListGuid, - NULL, - Package, - NULL - ); - ASSERT (mHiiHandle != NULL); - FreePool (Package); -} - - -/** - The user Entry Point for module GraphicsConsole. The user code starts with this function. - - @param[in] ImageHandle The firmware allocated handle for the EFI image. - @param[in] SystemTable A pointer to the EFI System Table. - - @retval EFI_SUCCESS The entry point is executed successfully. - @return other Some error occurs when executing this entry point. - -**/ -EFI_STATUS -EFIAPI -InitializeGraphicsConsole ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - Status = gBS->InstallMultipleProtocolInterfaces( - &ImageHandle, - &gEfiGraphicsOutputProtocolGuid,&gDisplay, - NULL - ); - ASSERT_EFI_ERROR(Status); - - // - // Register notify function on HII Database Protocol to add font package. - // - EfiCreateProtocolNotifyEvent ( - &gEfiHiiDatabaseProtocolGuid, - TPL_CALLBACK, - RegisterFontPackage, - NULL, - &mHiiRegistration - ); - - // - // Install driver model protocol(s). - // - Status = EfiLibInstallDriverBindingComponentName2 ( - ImageHandle, - SystemTable, - &gGraphicsConsoleDriverBinding, - ImageHandle, - &gGraphicsConsoleComponentName, - &gGraphicsConsoleComponentName2 - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h deleted file mode 100755 index 6e2c7955d..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h +++ /dev/null @@ -1,615 +0,0 @@ -/** @file - Header file for GraphicsConsole driver. - -Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
-This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef _GRAPHICS_CONSOLE_H_ -#define _GRAPHICS_CONSOLE_H_ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include - - -extern EFI_COMPONENT_NAME_PROTOCOL gGraphicsConsoleComponentName; -extern EFI_COMPONENT_NAME2_PROTOCOL gGraphicsConsoleComponentName2; -extern EFI_DRIVER_BINDING_PROTOCOL gGraphicsConsoleDriverBinding; -extern EFI_NARROW_GLYPH gUsStdNarrowGlyphData[]; -extern EFI_GRAPHICS_OUTPUT_PROTOCOL gDisplay; -extern UINT32 mNarrowFontSize; -// -// User can define valid graphic resolution here -// e.g. 640x480, 800x600, 1024x768... -// -#define CURRENT_HORIZONTAL_RESOLUTION 1366 -#define CURRENT_VERTICAL_RESOLUTION 768 - -typedef union { - EFI_NARROW_GLYPH NarrowGlyph; - EFI_WIDE_GLYPH WideGlyph; -} GLYPH_UNION; - -// -// Device Structure -// -#define GRAPHICS_CONSOLE_DEV_SIGNATURE SIGNATURE_32 ('g', 's', 't', 'o') - - -typedef struct { - UINTN Columns; - UINTN Rows; - INTN DeltaX; - INTN DeltaY; - UINT32 GopWidth; - UINT32 GopHeight; - UINT32 GopModeNumber; -} GRAPHICS_CONSOLE_MODE_DATA; - - -#define GRAPHICS_MAX_MODE 4 - -typedef struct { - UINTN Signature; - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; - EFI_UGA_DRAW_PROTOCOL *UgaDraw; - EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL SimpleTextOutput; - EFI_SIMPLE_TEXT_OUTPUT_MODE SimpleTextOutputMode; - GRAPHICS_CONSOLE_MODE_DATA ModeData[GRAPHICS_MAX_MODE]; - EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LineBuffer; -} GRAPHICS_CONSOLE_DEV; - - -#define GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS(a) \ - CR (a, GRAPHICS_CONSOLE_DEV, SimpleTextOutput, GRAPHICS_CONSOLE_DEV_SIGNATURE) - - -// -// EFI Component Name Functions -// -/** - Retrieves a Unicode string that is the user readable name of the driver. - - This function retrieves the user readable name of a driver in the form of a - Unicode string. If the driver specified by This has a user readable name in - the language specified by Language, then a pointer to the driver name is - returned in DriverName, and EFI_SUCCESS is returned. If the driver specified - by This does not support the language specified by Language, - then EFI_UNSUPPORTED is returned. - - @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or - EFI_COMPONENT_NAME_PROTOCOL instance. - - @param Language[in] A pointer to a Null-terminated ASCII string - array indicating the language. This is the - language of the driver name that the caller is - requesting, and it must match one of the - languages specified in SupportedLanguages. The - number of languages supported by a driver is up - to the driver writer. Language is specified - in RFC 4646 or ISO 639-2 language code format. - - @param DriverName[out] A pointer to the Unicode string to return. - This Unicode string is the name of the - driver specified by This in the language - specified by Language. - - @retval EFI_SUCCESS The Unicode string for the Driver specified by - This and the language specified by Language was - returned in DriverName. - - @retval EFI_INVALID_PARAMETER Language is NULL. - - @retval EFI_INVALID_PARAMETER DriverName is NULL. - - @retval EFI_UNSUPPORTED The driver specified by This does not support - the language specified by Language. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleComponentNameGetDriverName ( - IN EFI_COMPONENT_NAME_PROTOCOL *This, - IN CHAR8 *Language, - OUT CHAR16 **DriverName - ); - - -/** - Retrieves a Unicode string that is the user readable name of the controller - that is being managed by a driver. - - This function retrieves the user readable name of the controller specified by - ControllerHandle and ChildHandle in the form of a Unicode string. If the - driver specified by This has a user readable name in the language specified by - Language, then a pointer to the controller name is returned in ControllerName, - and EFI_SUCCESS is returned. If the driver specified by This is not currently - managing the controller specified by ControllerHandle and ChildHandle, - then EFI_UNSUPPORTED is returned. If the driver specified by This does not - support the language specified by Language, then EFI_UNSUPPORTED is returned. - - @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or - EFI_COMPONENT_NAME_PROTOCOL instance. - - @param ControllerHandle[in] The handle of a controller that the driver - specified by This is managing. This handle - specifies the controller whose name is to be - returned. - - @param ChildHandle[in] The handle of the child controller to retrieve - the name of. This is an optional parameter that - may be NULL. It will be NULL for device - drivers. It will also be NULL for a bus drivers - that wish to retrieve the name of the bus - controller. It will not be NULL for a bus - driver that wishes to retrieve the name of a - child controller. - - @param Language[in] A pointer to a Null-terminated ASCII string - array indicating the language. This is the - language of the driver name that the caller is - requesting, and it must match one of the - languages specified in SupportedLanguages. The - number of languages supported by a driver is up - to the driver writer. Language is specified in - RFC 4646 or ISO 639-2 language code format. - - @param ControllerName[out] A pointer to the Unicode string to return. - This Unicode string is the name of the - controller specified by ControllerHandle and - ChildHandle in the language specified by - Language from the point of view of the driver - specified by This. - - @retval EFI_SUCCESS The Unicode string for the user readable name in - the language specified by Language for the - driver specified by This was returned in - DriverName. - - @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. - - @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid - EFI_HANDLE. - - @retval EFI_INVALID_PARAMETER Language is NULL. - - @retval EFI_INVALID_PARAMETER ControllerName is NULL. - - @retval EFI_UNSUPPORTED The driver specified by This is not currently - managing the controller specified by - ControllerHandle and ChildHandle. - - @retval EFI_UNSUPPORTED The driver specified by This does not support - the language specified by Language. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleComponentNameGetControllerName ( - IN EFI_COMPONENT_NAME_PROTOCOL *This, - IN EFI_HANDLE ControllerHandle, - IN EFI_HANDLE ChildHandle OPTIONAL, - IN CHAR8 *Language, - OUT CHAR16 **ControllerName - ); - - -/** - Reset the text output device hardware and optionally run diagnostics. - - Implements SIMPLE_TEXT_OUTPUT.Reset(). - If ExtendeVerification is TRUE, then perform dependent Graphics Console - device reset, and set display mode to mode 0. - If ExtendedVerification is FALSE, only set display mode to mode 0. - - @param This Protocol instance pointer. - @param ExtendedVerification Indicates that the driver may perform a more - exhaustive verification operation of the device - during reset. - - @retval EFI_SUCCESS The text output device was reset. - @retval EFI_DEVICE_ERROR The text output device is not functioning correctly and - could not be reset. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutReset ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN BOOLEAN ExtendedVerification - ); - -/** - Write a Unicode string to the output device. - - Implements SIMPLE_TEXT_OUTPUT.OutputString(). - The Unicode string will be converted to Glyphs and will be - sent to the Graphics Console. - - @param This Protocol instance pointer. - @param WString The NULL-terminated Unicode string to be displayed - on the output device(s). All output devices must - also support the Unicode drawing defined in this file. - - @retval EFI_SUCCESS The string was output to the device. - @retval EFI_DEVICE_ERROR The device reported an error while attempting to output - the text. - @retval EFI_UNSUPPORTED The output device's mode is not currently in a - defined text mode. - @retval EFI_WARN_UNKNOWN_GLYPH This warning code indicates that some of the - characters in the Unicode string could not be - rendered and were skipped. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutOutputString ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN CHAR16 *WString - ); - -/** - Verifies that all characters in a Unicode string can be output to the - target device. - - Implements SIMPLE_TEXT_OUTPUT.TestString(). - If one of the characters in the *Wstring is neither valid valid Unicode - drawing characters, not ASCII code, then this function will return - EFI_UNSUPPORTED - - @param This Protocol instance pointer. - @param WString The NULL-terminated Unicode string to be examined for the output - device(s). - - @retval EFI_SUCCESS The device(s) are capable of rendering the output string. - @retval EFI_UNSUPPORTED Some of the characters in the Unicode string cannot be - rendered by one or more of the output devices mapped - by the EFI handle. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutTestString ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN CHAR16 *WString - ); - -/** - Returns information for an available text mode that the output device(s) - supports - - Implements SIMPLE_TEXT_OUTPUT.QueryMode(). - It returnes information for an available text mode that the Graphics Console supports. - In this driver,we only support text mode 80x25, which is defined as mode 0. - - @param This Protocol instance pointer. - @param ModeNumber The mode number to return information on. - @param Columns The returned columns of the requested mode. - @param Rows The returned rows of the requested mode. - - @retval EFI_SUCCESS The requested mode information is returned. - @retval EFI_UNSUPPORTED The mode number is not valid. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutQueryMode ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN ModeNumber, - OUT UINTN *Columns, - OUT UINTN *Rows - ); - - -/** - Sets the output device(s) to a specified mode. - - Implements SIMPLE_TEXT_OUTPUT.SetMode(). - Set the Graphics Console to a specified mode. In this driver, we only support mode 0. - - @param This Protocol instance pointer. - @param ModeNumber The text mode to set. - - @retval EFI_SUCCESS The requested text mode is set. - @retval EFI_DEVICE_ERROR The requested text mode cannot be set because of - Graphics Console device error. - @retval EFI_UNSUPPORTED The text mode number is not valid. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutSetMode ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN ModeNumber - ); - -/** - Sets the background and foreground colors for the OutputString () and - ClearScreen () functions. - - Implements SIMPLE_TEXT_OUTPUT.SetAttribute(). - - @param This Protocol instance pointer. - @param Attribute The attribute to set. Bits 0..3 are the foreground - color, and bits 4..6 are the background color. - All other bits are undefined and must be zero. - - @retval EFI_SUCCESS The requested attribute is set. - @retval EFI_DEVICE_ERROR The requested attribute cannot be set due to Graphics Console port error. - @retval EFI_UNSUPPORTED The attribute requested is not defined. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutSetAttribute ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN Attribute - ); - -/** - Clears the output device(s) display to the currently selected background - color. - - Implements SIMPLE_TEXT_OUTPUT.ClearScreen(). - - @param This Protocol instance pointer. - - @retval EFI_SUCCESS The operation completed successfully. - @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. - @retval EFI_UNSUPPORTED The output device is not in a valid text mode. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutClearScreen ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This - ); - -/** - Sets the current coordinates of the cursor position. - - Implements SIMPLE_TEXT_OUTPUT.SetCursorPosition(). - - @param This Protocol instance pointer. - @param Column The position to set the cursor to. Must be greater than or - equal to zero and less than the number of columns and rows - by QueryMode (). - @param Row The position to set the cursor to. Must be greater than or - equal to zero and less than the number of columns and rows - by QueryMode (). - - @retval EFI_SUCCESS The operation completed successfully. - @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. - @retval EFI_UNSUPPORTED The output device is not in a valid text mode, or the - cursor position is invalid for the current mode. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutSetCursorPosition ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN UINTN Column, - IN UINTN Row - ); - - -/** - Makes the cursor visible or invisible. - - Implements SIMPLE_TEXT_OUTPUT.EnableCursor(). - - @param This Protocol instance pointer. - @param Visible If TRUE, the cursor is set to be visible, If FALSE, - the cursor is set to be invisible. - - @retval EFI_SUCCESS The operation completed successfully. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleConOutEnableCursor ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN BOOLEAN Visible - ); - -/** - Test to see if Graphics Console could be supported on the Controller. - - Graphics Console could be supported if Graphics Output Protocol or UGA Draw - Protocol exists on the Controller. (UGA Draw Protocol could be skipped - if PcdUgaConsumeSupport is set to FALSE.) - - @param This Protocol instance pointer. - @param Controller Handle of device to test. - @param RemainingDevicePath Optional parameter use to pick a specific child - device to start. - - @retval EFI_SUCCESS This driver supports this device. - @retval other This driver does not support this device. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleControllerDriverSupported ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath - ); - - -/** - Start this driver on Controller by opening Graphics Output protocol or - UGA Draw protocol, and installing Simple Text Out protocol on Controller. - (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) - - @param This Protocol instance pointer. - @param Controller Handle of device to bind driver to - @param RemainingDevicePath Optional parameter use to pick a specific child - device to start. - - @retval EFI_SUCCESS This driver is added to Controller. - @retval other This driver does not support this device. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleControllerDriverStart ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath - ); - -/** - Stop this driver on Controller by removing Simple Text Out protocol - and closing the Graphics Output Protocol or UGA Draw protocol on Controller. - (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) - - - @param This Protocol instance pointer. - @param Controller Handle of device to stop driver on - @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of - children is zero stop the entire bus driver. - @param ChildHandleBuffer List of Child Handles to Stop. - - @retval EFI_SUCCESS This driver is removed Controller. - @retval EFI_NOT_STARTED Simple Text Out protocol could not be found the - Controller. - @retval other This driver was not removed from this device. - -**/ -EFI_STATUS -EFIAPI -GraphicsConsoleControllerDriverStop ( - IN EFI_DRIVER_BINDING_PROTOCOL *This, - IN EFI_HANDLE Controller, - IN UINTN NumberOfChildren, - IN EFI_HANDLE *ChildHandleBuffer - ); - - -/** - Locate HII Database protocol and HII Font protocol. - - @retval EFI_SUCCESS HII Database protocol and HII Font protocol - are located successfully. - @return other Failed to locate HII Database protocol or - HII Font protocol. - -**/ -EFI_STATUS -EfiLocateHiiProtocol ( - VOID - ); - - -/** - Gets Graphics Console devcie's foreground color and background color. - - @param This Protocol instance pointer. - @param Foreground Returned text foreground color. - @param Background Returned text background color. - - @retval EFI_SUCCESS It returned always. - -**/ -EFI_STATUS -GetTextColors ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Foreground, - OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Background - ); - -/** - Draw Unicode string on the Graphics Console device's screen. - - @param This Protocol instance pointer. - @param UnicodeWeight One Unicode string to be displayed. - @param Count The count of Unicode string. - - @retval EFI_OUT_OF_RESOURCES If no memory resource to use. - @retval EFI_UNSUPPORTED If no Graphics Output protocol and UGA Draw - protocol exist. - @retval EFI_SUCCESS Drawing Unicode string implemented successfully. - -**/ -EFI_STATUS -DrawUnicodeWeightAtCursorN ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, - IN CHAR16 *UnicodeWeight, - IN UINTN Count - ); - -/** - Erase the cursor on the screen. - - @param This Protocol instance pointer. - - @retval EFI_SUCCESS The cursor is erased successfully. - -**/ -EFI_STATUS -EraseCursor ( - IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This - ); - -/** - Check if the current specific mode supported the user defined resolution - for the Graphics Console device based on Graphics Output Protocol. - - If yes, set the graphic device's current mode to this specific mode. - - @param GraphicsOutput Graphics Output Protocol instance pointer. - @param HorizontalResolution User defined horizontal resolution - @param VerticalResolution User defined vertical resolution. - @param CurrentModeNumber Current specific mode to be check. - - @retval EFI_SUCCESS The mode is supported. - @retval EFI_UNSUPPORTED The specific mode is out of range of graphics - device supported. - @retval other The specific mode does not support user defined - resolution or failed to set the current mode to the - specific mode on graphics device. - -**/ -EFI_STATUS -CheckModeSupported ( - EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput, - IN UINT32 HorizontalResolution, - IN UINT32 VerticalResolution, - OUT UINT32 *CurrentModeNumber - ); - -EFI_STATUS -ExynosGopConstructor ( - IN GRAPHICS_CONSOLE_DEV *Private - ); - -EFI_STATUS -ExynosGopDestructor ( - GRAPHICS_CONSOLE_DEV *Private - ); -#endif diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf deleted file mode 100755 index 2f858bd4f..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf +++ /dev/null @@ -1,73 +0,0 @@ -## @file -# -# Component description file for GraphicsConsole module -# -# This is the main routine for initializing the Graphics Console support routines. -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = GraphicsConsoleDxe - FILE_GUID = c5deae31-fad2-4030-841b-cfc9644d2c5b - MODULE_TYPE = UEFI_DRIVER - VERSION_STRING = 1.0 - ENTRY_POINT = InitializeGraphicsConsole - -# -# The following information is for reference only and not required by the build tools. -# -# VALID_ARCHITECTURES = IA32 X64 IPF EBC -# -# DRIVER_BINDING = gGraphicsConsoleDriverBinding -# COMPONENT_NAME = gGraphicsConsoleComponentName -# COMPONENT_NAME2 = gGraphicsConsoleComponentName2 -# - -[Sources] - ComponentName.c - LaffStd.c - GraphicsConsole.c - GraphicsConsole.h - ExynosGop.c - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - SamsungPlatformPkg/SamsungPlatformPkg.dec - -[LibraryClasses] - BaseLib - UefiLib - MemoryAllocationLib - UefiDriverEntryPoint - HiiLib - IoLib - -[Protocols] - gEfiSimpleTextOutProtocolGuid ## BY_START - gEfiGraphicsOutputProtocolGuid ## TO_START - gEfiUgaDrawProtocolGuid ## TO_START - gEfiHiiFontProtocolGuid ## TO_START - gEfiHiiDatabaseProtocolGuid ## TO_START - gSamsungPlatformGpioProtocolGuid ## GPIO Protocol - -[Guids] - -[FeaturePcd] - gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport -[FixedPcd] - gExynosPkgTokenSpaceGuid.PcdCmuBase - gExynosPkgTokenSpaceGuid.PcdPmuBase - gExynosPkgTokenSpaceGuid.PcdSysBase - gExynosPkgTokenSpaceGuid.PcdFIMD0Base diff --git a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/LaffStd.c b/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/LaffStd.c deleted file mode 100755 index d5bf3ec71..000000000 --- a/SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/LaffStd.c +++ /dev/null @@ -1,276 +0,0 @@ -/** @file - Narrow font Data definition for GraphicsConsole driver. - -Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
-This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "GraphicsConsole.h" - - - -EFI_NARROW_GLYPH gUsStdNarrowGlyphData[] = { - // - // Unicode glyphs from 0x20 to 0x7e are the same as ASCII characters 0x20 to 0x7e - // - { 0x0020, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x0021, 0x00, {0x00,0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00}}, - { 0x0022, 0x00, {0x00,0x00,0x00,0x6C,0x6C,0x6C,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x0023, 0x00, {0x00,0x00,0x00,0x00,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00}}, - { 0x0024, 0x00, {0x00,0x00,0x18,0x18,0x7C,0xC6,0xC6,0x60,0x38,0x0C,0x06,0xC6,0xC6,0x7C,0x18,0x18,0x00,0x00,0x00}}, - { 0x0025, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0x0C,0x0C,0x18,0x18,0x30,0x30,0x60,0x60,0xC6,0xC6,0x00,0x00,0x00,0x00}}, - { 0x0026, 0x00, {0x00,0x00,0x00,0x78,0xCC,0xCC,0xCC,0x78,0x76,0xDC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00}}, - { 0x0027, 0x00, {0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x0028, 0x00, {0x00,0x00,0x00,0x06,0x0C,0x0C,0x18,0x18,0x18,0x18,0x18,0x18,0x0C,0x0C,0x06,0x00,0x00,0x00,0x00}}, - { 0x0029, 0x00, {0x00,0x00,0x00,0xC0,0x60,0x60,0x30,0x30,0x30,0x30,0x30,0x30,0x60,0x60,0xC0,0x00,0x00,0x00,0x00}}, - { 0x002a, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x6C,0x38,0xFE,0x38,0x6C,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x002b, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x002c, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,0x00}}, - { 0x002d, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x002e, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00}}, - { 0x002f, 0x00, {0x00,0x00,0x00,0x06,0x06,0x0C,0x0C,0x18,0x18,0x30,0x30,0x60,0x60,0xC0,0xC0,0x00,0x00,0x00,0x00}}, - { 0x0030, 0x00, {0x00,0x00,0x00,0x38,0x6C,0xC6,0xC6,0xC6,0xD6,0xD6,0xC6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00}}, - { 0x0031, 0x00, {0x00,0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x00,0x00,0x00,0x00}}, - { 0x0032, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0x06,0x06,0x06,0x0C,0x18,0x30,0x60,0xC0,0xC2,0xFE,0x00,0x00,0x00,0x00}}, - { 0x0033, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0x06,0x06,0x06,0x3C,0x06,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0034, 0x00, {0x00,0x00,0x00,0x1C,0x1C,0x3C,0x3C,0x6C,0x6C,0xCC,0xFE,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00}}, - { 0x0035, 0x00, {0x00,0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xC0,0xFC,0x06,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0036, 0x00, {0x00,0x00,0x00,0x3C,0x60,0xC0,0xC0,0xC0,0xFC,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0037, 0x00, {0x00,0x00,0x00,0xFE,0xC6,0x06,0x06,0x06,0x0C,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00}}, - { 0x0038, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0039, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x06,0x06,0x06,0x0C,0x78,0x00,0x00,0x00,0x00}}, - { 0x003a, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00}}, - { 0x003b, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00}}, - { 0x003c, 0x00, {0x00,0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0xC0,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00}}, - { 0x003d, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x003e, 0x00, {0x00,0x00,0x00,0x00,0xC0,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0xC0,0x00,0x00,0x00,0x00}}, - { 0x003f, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0x0C,0x0C,0x18,0x18,0x18,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00}}, - { 0x0040, 0x00, {0x00,0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xDE,0xDE,0xDE,0xDC,0xC0,0xC0,0x7E,0x00,0x00,0x00,0x00}}, - - { 0x0041, 0x00, {0x00,0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, - - { 0x0042, 0x00, {0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x7C,0x66,0x66,0x66,0x66,0x66,0xFC,0x00,0x00,0x00,0x00}}, - { 0x0043, 0x00, {0x00,0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x00,0x00,0x00,0x00}}, - { 0x0044, 0x00, {0x00,0x00,0x00,0xF8,0x6C,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x6C,0xF8,0x00,0x00,0x00,0x00}}, - { 0x0045, 0x00, {0x00,0x00,0x00,0xFE,0x66,0x62,0x60,0x68,0x78,0x68,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00}}, - { 0x0046, 0x00, {0x00,0x00,0x00,0xFE,0x66,0x62,0x60,0x64,0x7C,0x64,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00}}, - { 0x0047, 0x00, {0x00,0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xDE,0xC6,0xC6,0xC6,0x66,0x3C,0x00,0x00,0x00,0x00}}, - { 0x0048, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, - { 0x0049, 0x00, {0x00,0x00,0x00,0xFC,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0xFC,0x00,0x00,0x00,0x00}}, - { 0x004a, 0x00, {0x00,0x00,0x00,0x1E,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00}}, - { 0x004b, 0x00, {0x00,0x00,0x00,0xE6,0x66,0x6C,0x6C,0x78,0x70,0x78,0x6C,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00}}, - { 0x004c, 0x00, {0x00,0x00,0x00,0xF0,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00}}, - { 0x004d, 0x00, {0x00,0x00,0x00,0xC6,0xEE,0xEE,0xFE,0xFE,0xD6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, - { 0x004e, 0x00, {0x00,0x00,0x00,0xC6,0xE6,0xF6,0xF6,0xF6,0xDE,0xCE,0xCE,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, - { 0x004f, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0050, 0x00, {0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00}}, - { 0x0051, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xD6,0xD6,0x7C,0x1C,0x0E,0x00,0x00}}, - { 0x0052, 0x00, {0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x7C,0x78,0x6C,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00}}, - { 0x0053, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0x60,0x38,0x0C,0x06,0x06,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0054, 0x00, {0x00,0x00,0x00,0xFC,0xFC,0xB4,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}}, - { 0x0055, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0056, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x6C,0x38,0x10,0x00,0x00,0x00,0x00}}, - { 0x0057, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xD6,0xD6,0xD6,0xFE,0x6C,0x6C,0x00,0x00,0x00,0x00}}, - { 0x0058, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0xC6,0x6C,0x6C,0x38,0x6C,0x6C,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, - { 0x0059, 0x00, {0x00,0x00,0x00,0xCC,0xCC,0xCC,0xCC,0xCC,0x78,0x30,0x30,0x30,0x30,0x30,0x78,0x00,0x00,0x00,0x00}}, - { 0x005a, 0x00, {0x00,0x00,0x00,0xFE,0xC6,0x86,0x0C,0x0C,0x18,0x30,0x60,0xC0,0xC2,0xC6,0xFE,0x00,0x00,0x00,0x00}}, - { 0x005b, 0x00, {0x00,0x00,0x00,0x1E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1E,0x00,0x00,0x00,0x00}}, - { 0x005c, 0x00, {0x00,0x00,0x00,0xC0,0xC0,0x60,0x60,0x30,0x30,0x18,0x18,0x0C,0x0C,0x06,0x06,0x00,0x00,0x00,0x00}}, - { 0x005d, 0x00, {0x00,0x00,0x00,0xF0,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0xF0,0x00,0x00,0x00,0x00}}, - { 0x005e, 0x00, {0x00,0x00,0x10,0x38,0x6C,0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x005f, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0x00,0x00}}, - { 0x0060, 0x00, {0x00,0x30,0x30,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { 0x0061, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x0C,0x0C,0x7C,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00}}, - { 0x0062, 0x00, {0x00,0x00,0x00,0xE0,0x60,0x60,0x60,0x7C,0x66,0x66,0x66,0x66,0x66,0x66,0x7C,0x00,0x00,0x00,0x00}}, - { 0x0063, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7C,0xC6,0xC0,0xC0,0xC0,0xC0,0xC6,0x7C,0x00,0x00,0x00,0x00}}, - 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{ (CHAR16)BOXDRAW_DOUBLE_DOWN_LEFT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_UP_RIGHT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_UP_DOUBLE_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_DOUBLE_UP_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_UP_LEFT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_UP_DOUBLE_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_DOUBLE_UP_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_VERTICAL_RIGHT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, - { (CHAR16)BOXDRAW_VERTICAL_DOUBLE_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_DOUBLE_VERTICAL_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_VERTICAL_LEFT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, - { (CHAR16)BOXDRAW_VERTICAL_DOUBLE_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_DOUBLE_VERTICAL_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_DOWN_HORIZONTAL_DOUBLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, - { (CHAR16)BOXDRAW_DOWN_DOUBLE_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_DOUBLE_DOWN_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_UP_HORIZONTAL_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_UP_DOUBLE_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_DOUBLE_UP_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)BOXDRAW_VERTICAL_HORIZONTAL_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, - { (CHAR16)BOXDRAW_VERTICAL_DOUBLE_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - { (CHAR16)BOXDRAW_DOUBLE_VERTICAL_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, - - { (CHAR16)BLOCKELEMENT_FULL_BLOCK, 0x00, {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}}, - { (CHAR16)BLOCKELEMENT_LIGHT_SHADE, 0x00, {0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22}}, - - { (CHAR16)GEOMETRICSHAPE_RIGHT_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0xC0,0xE0,0xF0,0xF8,0xFE,0xF8,0xF0,0xE0,0xC0,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)GEOMETRICSHAPE_LEFT_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x06,0x0E,0x1E,0x3E,0xFE,0x3E,0x1E,0x0E,0x06,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)GEOMETRICSHAPE_UP_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7C,0x7C,0xFE,0xFE,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)GEOMETRICSHAPE_DOWN_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xFE,0x7C,0x7C,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00,0x00}}, - - { (CHAR16)ARROW_UP, 0x00, {0x00,0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)ARROW_DOWN, 0x00, {0x00,0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)ARROW_LEFT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x20,0x60,0x60,0xFE,0xFE,0x60,0x60,0x20,0x00,0x00,0x00,0x00,0x00,0x00}}, - { (CHAR16)ARROW_RIGHT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x08,0x0C,0x0C,0xFE,0xFE,0x0C,0x0C,0x08,0x00,0x00,0x00,0x00,0x00,0x00}}, - - { 0x0000, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} //EOL -}; - -// Get available Unicode glyphs narrow fonts(8*19 pixels) size. -UINT32 mNarrowFontSize = sizeof (gUsStdNarrowGlyphData); diff --git a/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosLib.h b/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosLib.h deleted file mode 100644 index e8ec8597d..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosLib.h +++ /dev/null @@ -1,24 +0,0 @@ -/** @file - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __EXYNOSLIB_H__ -#define __EXYNOSLIB_H__ - -UINT32 -EFIAPI -GpioBase ( - IN UINTN Port - ); - -#endif // __EXYNOSLIB_H__ diff --git a/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h b/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h deleted file mode 100644 index c723ac128..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Include/Library/ExynosTimerLib.h +++ /dev/null @@ -1,65 +0,0 @@ -/** @file -* -* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - - -#ifndef _EXYNOSTIMERLIB_H__ -#define _EXYNOSTIMERLIB_H__ - -typedef enum{ - TIMER_0, - TIMER_1, - TIMER_2, - TIMER_3, - TIMER_4, -}PWM_TIMERS; - -#define NUM_OF_TIMERS (0x05) -#define PWM_TCFG0_OFFSET (0x0000) -#define PWM_TCFG1_OFFSET (0x0004) -#define PWM_TCON_OFFSET (0x0008) -#define PWM_TCNTB0_OFFSET (0x000C) -#define PWM_TCMPB0_OFFSET (0x0010) -#define PWM_TCNTO0_OFFSET (0x0014) -#define PWM_TCNTB1_OFFSET (0x0018) -#define PWM_TCMPB1_OFFSET (0x001C) -#define PWM_TCNTO1_OFFSET (0x0020) -#define PWM_TCNTB2_OFFSET (0x0024) -#define PWM_TCMPB2_OFFSET (0x0028) -#define PWM_TCNTO2_OFFSET (0x002C) -#define PWM_TCNTB3_OFFSET (0x0030) -#define PWM_TCMPB3_OFFSET (0x0034) -#define PWM_TCNTO3_OFFSET (0x0038) -#define PWM_TCNTB4_OFFSET (0x003C) -#define PWM_TCNTO4_OFFSET (0x0040) -#define PWM_TINT_CSTAT_OFFSET (0x0044) - -#define TIMER_STATUS_MASK(timer_no) (1 << (NUM_OF_TIMERS + timer_no)) -#define TIMER_INTR_MASK(timer_no) (1 << (timer_no)) -#define STOP_TIMER_VAL(timer_no) ~(0x0f << (((timer_no + 1)*(!!timer_no)) << 2)) -#define UPDATE_COUNT_BUF_MASK(timer_no) (2 << (((timer_no + 1)*(!!timer_no)) << 2)) -#define RELOAD_AND_START(timer_no) ((AUTO_RELOAD | START_TIMERPOS) << (((timer_no + 1)*(!!timer_no)) << 2)) -#define START_TIMER(timer_no) (START_TIMERPOS << (((timer_no + 1)*(!!timer_no)) << 2)) - - -#define PRESCALE_GRP0_START_POS (0x00) -#define PRESCALE_TIMER_GRP0 (0x63) -#define PRESCALE_GRP1_START_POS (0x08) -#define PRESCALE_TIMER_GRP1 (0x63) -#define MAX_COUNT_VAL (0xFFFFFFFF) -#define AUTO_RELOAD (0x8) -#define START_TIMERPOS (0x1) - - - -#endif diff --git a/SamsungPlatformPkg/ExynosPkg/Include/Platform/ArmPlatform.h b/SamsungPlatformPkg/ExynosPkg/Include/Platform/ArmPlatform.h deleted file mode 100644 index edb814268..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Include/Platform/ArmPlatform.h +++ /dev/null @@ -1,693 +0,0 @@ -/** @file -* Header defining RealView EB constants (Base addresses, sizes, flags) -* -* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARMPLATFORM_H__ -#define __ARMPLATFORM_H__ - -/******************************************* -// Platform Memory Map -*******************************************/ - -/******************************************* -// Motherboard peripherals -*******************************************/ -//PMU DOMAIN offsets -#define SWRESET_OFFSET (0x400) -#define PMU_LCD0_CONF_OFFSET (0x3C80) -#define PMU_LCD0_STAT_OFFSET (0x3C84) -#define ARM_EB_BOARD_PERIPH_BASE 0x10000000 - - -#define LCD0_PWR_NRML_MODE (0x07) - -// SYSTRCL Register -#define ARM_EB_SYSCTRL 0x10001000 -#define ARM_EB_SYS_FLAGS_REG 0x10020814 -#define ARM_EB_SYS_FLAGS_SET_REG 0x10020814 -#define ARM_EB_SYS_FLAGS_CLR_REG 0x10020814 - -#define PL011_CONSOLE_UART_SPEED 115200 - - -// Exynos4210 DMC Base Address -#define Exynos4210_DMC_DELAY 0x3000 -#define Exynos4210_DMC_0_BASE 0x10400000 -#define Exynos4210_DMC_1_BASE 0x10410000 - -#define DMC_CONCONTROL 0x00 -#define DMC_MEMCONTROL 0x04 -#define DMC_MEMCONFIG0 0x08 -#define DMC_MEMCONFIG1 0x0C -#define DMC_DIRECTCMD 0x10 -#define DMC_PRECHCONFIG 0x14 -#define DMC_PHYCONTROL0 0x18 -#define DMC_PHYCONTROL1 0x1C -#define DMC_PHYCONTROL2 0x20 -#define DMC_PWRDNCONFIG 0x28 -#define DMC_TIMINGAREF 0x30 -#define DMC_TIMINGROW 0x34 -#define DMC_TIMINGDATA 0x38 -#define DMC_TIMINGPOWER 0x3C -#define DMC_PHYSTATUS 0x40 -#define DMC_PHYZQCONTROL 0x44 -#define DMC_CHIP0STATUS 0x48 -#define DMC_CHIP1STATUS 0x4C -#define DMC_AREFSTATUS 0x50 -#define DMC_MRSTATUS 0x54 -#define DMC_PHYTEST0 0x58 -#define DMC_PHYTEST1 0x5C -#define DMC_QOSCONTROL0 0x60 -#define DMC_QOSCONFIG0 0x64 -#define DMC_QOSCONTROL1 0x68 -#define DMC_QOSCONFIG1 0x6C -#define DMC_QOSCONTROL2 0x70 -#define DMC_QOSCONFIG2 0x74 -#define DMC_QOSCONTROL3 0x78 -#define DMC_QOSCONFIG3 0x7C -#define DMC_QOSCONTROL4 0x80 -#define DMC_QOSCONFIG4 0x84 -#define DMC_QOSCONTROL5 0x88 -#define DMC_QOSCONFIG5 0x8C -#define DMC_QOSCONTROL6 0x90 -#define DMC_QOSCONFIG6 0x94 -#define DMC_QOSCONTROL7 0x98 -#define DMC_QOSCONFIG7 0x9C -#define DMC_QOSCONTROL8 0xA0 -#define DMC_QOSCONFIG8 0xA4 -#define DMC_QOSCONTROL9 0xA8 -#define DMC_QOSCONFIG9 0xAC -#define DMC_QOSCONTROL10 0xB0 -#define DMC_QOSCONFIG10 0xB4 -#define DMC_QOSCONTROL11 0xB8 -#define DMC_QOSCONFIG11 0xBC -#define DMC_QOSCONTROL12 0xC0 -#define DMC_QOSCONFIG12 0xC4 -#define DMC_QOSCONTROL13 0xC8 -#define DMC_QOSCONFIG13 0xCC -#define DMC_QOSCONTROL14 0xD0 -#define DMC_QOSCONFIG14 0xD4 -#define DMC_QOSCONTROL15 0xD8 -#define DMC_QOSCONFIG15 0xDC - -// Exynos4210 UART Register -#define Exynos4210_UART_BASE 0x13810000 - -#define ULCON_OFFSET 0x00 -#define UCON_OFFSET 0x04 -#define UFCON_OFFSET 0x08 -#define UMCON_OFFSET 0x0C -#define UTRSTAT_OFFSET 0x10 -#define UERSTAT_OFFSET 0x14 -#define UFSTAT_OFFSET 0x18 -#define UMSTAT_OFFSET 0x1C -#define UTXH_OFFSET 0x20 -#define URXH_OFFSET 0x24 -#define UBRDIV_OFFSET 0x28 -#define UDIVSLOT_OFFSET 0x2C -#define UINTP_OFFSET 0x30 -#define UINTSP_OFFSET 0x34 -#define UINTM_OFFSET 0x38 - - -#define UARTLCR_H ULCON_OFFSET -#define UARTECR UFCON_OFFSET -#define UARTCR UCON_OFFSET -#define UARTIBRD UBRDIV_OFFSET -#define UARTFBRD UDIVSLOT_OFFSET - -#define UART_TX_EMPTY_FLAG_MASK (0x02) -#define UART_RX_EMPTY_FLAG_MASK (0x01) -// Exynos4210 TZPC Register -#define Exynos4210_TZPC0_BASE 0x10110000 -#define Exynos4210_TZPC1_BASE 0x10120000 -#define Exynos4210_TZPC2_BASE 0x10130000 -#define Exynos4210_TZPC3_BASE 0x10140000 -#define Exynos4210_TZPC4_BASE 0x10150000 -#define Exynos4210_TZPC5_BASE 0x10160000 - - -#define TZPC0_OFFSET 0x10000 -#define TZPC1_OFFSET 0x20000 -#define TZPC2_OFFSET 0x30000 -#define TZPC3_OFFSET 0x40000 -#define TZPC4_OFFSET 0x50000 -#define TZPC5_OFFSET 0x60000 - -#define TZPC_DECPROT0SET_OFFSET 0x804 -#define TZPC_DECPROT1SET_OFFSET 0x810 -#define TZPC_DECPROT2SET_OFFSET 0x81C -#define TZPC_DECPROT3SET_OFFSET 0x828 - - -// Exynos4210 CMU Base Address -#define Exynos4210_CMU_DELAY 0x2000 -#define Exynos4210_CMU_BASE 0x10030000 -#define Exynos4210_CMU_DIV_DMC0 0x10500 - -#define CONFIG_CLK_1000_400_200 - -#if defined(CONFIG_CLK_800_330_165) -#define APLL_MDIV 0xC8 -#define APLL_PDIV 0x6 -#define APLL_SDIV 0x1 - -#define MPLL_MDIV 0x6E -#define MPLL_PDIV 0x4 -#define MPLL_SDIV 0x1 -#elif defined(CONFIG_CLK_800_400_200) -#define APLL_MDIV 0xC8 -#define APLL_PDIV 0x6 -#define APLL_SDIV 0x1 - -#define MPLL_MDIV 0xC8 -#define MPLL_PDIV 0x6 -#define MPLL_SDIV 0x1 -#elif defined(CONFIG_CLK_1000_330_165) -#define APLL_MDIV 0xFA -#define APLL_PDIV 0x6 -#define APLL_SDIV 0x1 - -#define MPLL_MDIV 0x6E -#define MPLL_PDIV 0x4 -#define MPLL_SDIV 0x1 -#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) -#define APLL_MDIV 0xFA -#define APLL_PDIV 0x6 -#define APLL_SDIV 0x1 - -#define MPLL_MDIV 0xC8 -#define MPLL_PDIV 0x6 -#define MPLL_SDIV 0x1 -#endif - -#define APLL_AFC_ENB 0x1 -#define APLL_AFC 0xC -#define APLL_CON1_VAL ((APLL_AFC_ENB << 31) | (APLL_AFC)) - -/* MPLL_CON1 */ -#define MPLL_AFC_ENB 0x0 -#if defined(CONFIG_CLK_800_330_165) || defined(CONFIG_CLK_1000_330_165) -#define MPLL_AFC 0xD -#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) || defined(CONFIG_CLK_800_400_200) -#define MPLL_AFC 0x1C -#endif -#define MPLL_CON1_VAL ((MPLL_AFC_ENB << 31) | (MPLL_AFC)) - -#define EPLL_MDIV 0x30 -#define EPLL_PDIV 0x3 -#define EPLL_SDIV 0x2 -#define EPLL_K 0x0 -#define EPLL_CON1_VAL (EPLL_K) - -#define VPLL_MDIV 0x35 -#define VPLL_PDIV 0x3 -#define VPLL_SDIV 0x2 - -#define VPLL_SSCG_EN 0x0 -#define VPLL_SEL_PF 0x0 -#define VPLL_MRR 0x11 -#define VPLL_MFR 0x0 -#define VPLL_K 0x400 -#define VPLL_CON1_VAL ((VPLL_SSCG_EN <<31) \ - | (VPLL_SEL_PF <<29) \ - | (VPLL_MRR <<24) \ - | (VPLL_MFR << 16) \ - | (VPLL_K)) -/********************************************************/ - -/* Set PLL */ -#define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) - -#define APLL_CON0_VAL set_pll(APLL_MDIV,APLL_PDIV,APLL_SDIV) -#define MPLL_CON0_VAL set_pll(MPLL_MDIV,MPLL_PDIV,MPLL_SDIV) -#define EPLL_CON0_VAL set_pll(EPLL_MDIV,EPLL_PDIV,EPLL_SDIV) -#define VPLL_CON0_VAL set_pll(VPLL_MDIV,VPLL_PDIV,VPLL_SDIV) - -/* CLK_SRC_CPU */ -/* 0 = MOUTAPLL, 1 = SCLKMPLL */ -#define MUX_HPM_SEL_MOUTAPLL 0 -#define MUX_HPM_SEL_SCLKMPLL 1 -#define MUX_CORE_SEL_MOUTAPLL 0 -#define MUX_CORE_SEL_SCLKMPLL 1 - -/* 0 = FILPLL, 1 = MOUT */ -#define MUX_MPLL_SEL_FILPLL 0 -#define MUX_MPLL_SEL_MOUTMPLLFOUT 1 - -#define MUX_APLL_SEL_FILPLL 0 -#define MUX_APLL_SEL_MOUTMPLLFOUT 1 - -#define CLK_SRC_CPU_VAL_FINPLL ((MUX_HPM_SEL_MOUTAPLL << 20) \ - | (MUX_CORE_SEL_MOUTAPLL <<16) \ - | (MUX_MPLL_SEL_FILPLL << 8) \ - | (MUX_APLL_SEL_FILPLL <<0)) - -#define CLK_SRC_CPU_VAL_MOUTMPLLFOUT ((MUX_HPM_SEL_MOUTAPLL << 20) \ - | (MUX_CORE_SEL_MOUTAPLL <<16) \ - | (MUX_MPLL_SEL_MOUTMPLLFOUT << 8) \ - | (MUX_APLL_SEL_MOUTMPLLFOUT <<0)) - -/* CLK_DIV_CPU0 */ -#define APLL_RATIO 0x1 -#define PCLK_DBG_RATIO 0x1 -#define ATB_RATIO 0x3 -#define PERIPH_RATIO 0x3 -#define COREM1_RATIO 0x7 -#define COREM0_RATIO 0x3 -#define CORE_RATIO 0x0 -#define CLK_DIV_CPU0_VAL ((APLL_RATIO << 24) \ - | (PCLK_DBG_RATIO << 20)\ - | (ATB_RATIO << 16) \ - | (PERIPH_RATIO <<12) \ - | (COREM1_RATIO << 8) \ - | (COREM0_RATIO << 4) \ - | (CORE_RATIO)) - -/* CLK_DIV_CPU1 */ -#define HPM_RATIO 0x0 -#define COPY_RATIO 0x3 -#define CLK_DIV_CPU1_VAL ((HPM_RATIO << 4) | (COPY_RATIO)) - -/* CLK_SRC_DMC */ -#define MUX_PWI_SEL 0x0 -#define MUX_CORE_TIMERS_SEL 0x0 -#define MUX_DPHY_SEL 0x0 -#define MUX_DMC_BUS_SEL 0x0 -#define CLK_SRC_DMC_VAL ((MUX_PWI_SEL << 16) \ - | (MUX_CORE_TIMERS_SEL << 12) \ - | (MUX_DPHY_SEL << 8) \ - | (MUX_DMC_BUS_SEL << 4)) - -/* CLK_DIV_DMC0 */ -#if defined(CONFIG_CLK_1000_200_200) -#define CORE_TIMERS_RATIO 0x1 -#define COPY2_RATIO 0x3 -#define DMCP_RATIO 0x1 -#define DMCD_RATIO 0x0 -#define DMC_RATIO 0x3 -#define DPHY_RATIO 0x1 -#define ACP_PCLK_RATIO 0x1 -#define ACP_RATIO 0x3 -#else -#define CORE_TIMERS_RATIO 0x1 -#define COPY2_RATIO 0x3 -#define DMCP_RATIO 0x1 -#define DMCD_RATIO 0x1 -#define DMC_RATIO 0x1 -#define DPHY_RATIO 0x1 -#define ACP_PCLK_RATIO 0x1 -#define ACP_RATIO 0x3 -#endif -#define CLK_DIV_DMC0_VAL ((CORE_TIMERS_RATIO << 28) \ - | (COPY2_RATIO << 24) \ - | (DMCP_RATIO << 20) \ - | (DMCD_RATIO << 16) \ - | (DMC_RATIO << 12) \ - | (DPHY_RATIO << 8) \ - | (ACP_PCLK_RATIO << 4) \ - | (ACP_RATIO)) - -/* CLK_DIV_DMC1 */ -#define DPM_RATIO 0x1 -#define DVSEM_RATIO 0x1 -#define PWI_RATIO 0x1 -#define CLK_DIV_DMC1_VAL ((DPM_RATIO << 24) \ - | (DVSEM_RATIO << 16) \ - | (PWI_RATIO << 8)) - -/* CLK_SRC_TOP0 */ -#define MUX_ONENAND_SEL 0x0 /* 0 = DOUT133, 1 = DOUT166 */ -#define MUX_ACLK_133_SEL 0x0 /* 0 = SCLKMPLL, 1 = SCLKAPLL */ -#define MUX_ACLK_160_SEL 0x0 -#define MUX_ACLK_100_SEL 0x0 -#define MUX_ACLK_200_SEL 0x0 -#define MUX_VPLL_SEL 0x0 -#define MUX_EPLL_SEL 0x0 -#define CLK_SRC_TOP0_VAL ((MUX_ONENAND_SEL << 28) \ - | (MUX_ACLK_133_SEL << 24) \ - | (MUX_ACLK_160_SEL << 20) \ - | (MUX_ACLK_100_SEL << 16) \ - | (MUX_ACLK_200_SEL << 12) \ - | (MUX_VPLL_SEL << 8) \ - | (MUX_EPLL_SEL << 4)) - -/* CLK_SRC_TOP1 */ -#define VPLLSRC_SEL 0x0 /* 0 = FINPLL, 1 = SCLKHDMI27M */ -#define CLK_SRC_TOP1_VAL (VPLLSRC_SEL) - -/* CLK_DIV_TOP */ -#define ONENAND_RATIO 0x0 -#define ACLK_133_RATIO 0x5 -#define ACLK_160_RATIO 0x4 -#define ACLK_100_RATIO 0x7 -#define ACLK_200_RATIO 0x3 -#define CLK_DIV_TOP_VAL ((ONENAND_RATIO << 16) \ - | (ACLK_133_RATIO << 12) \ - | (ACLK_160_RATIO << 8) \ - | (ACLK_100_RATIO << 4) \ - | (ACLK_200_RATIO)) - -/* CLK_SRC_LEFTBUS */ -#define MUX_GDL_SEL 0x0 -#define CLK_SRC_LEFTBUS_VAL (MUX_GDL_SEL) - -/* CLK_DIV_LEFRBUS */ -#define GPL_RATIO 0x1 -#define GDL_RATIO 0x3 -#define CLK_DIV_LEFRBUS_VAL ((GPL_RATIO << 4) \ - | (GDL_RATIO)) - -/* CLK_SRC_RIGHTBUS */ -#define MUX_GDR_SEL 0x0 -#define CLK_SRC_RIGHTBUS_VAL (MUX_GDR_SEL) - -/* CLK_DIV_RIGHTBUS */ -#define GPR_RATIO 0x1 -#define GDR_RATIO 0x3 -#define CLK_DIV_RIGHTBUS_VAL ((GPR_RATIO << 4) \ - | (GDR_RATIO)) - -#define PLL_LOCKTIME 0x1C20 -/* APLL_LOCK */ -#define APLL_LOCK_VAL (PLL_LOCKTIME) -/* MPLL_LOCK */ -#define MPLL_LOCK_VAL (PLL_LOCKTIME) -/* EPLL_LOCK */ -#define EPLL_LOCK_VAL (PLL_LOCKTIME) -/* VPLL_LOCK */ -#define VPLL_LOCK_VAL (PLL_LOCKTIME) - -/* CLK_SRC_PERIL0 */ -#define PWM_SEL 0 -#define UART5_SEL 6 -#define UART4_SEL 6 -#define UART3_SEL 6 -#define UART2_SEL 6 -#define UART1_SEL 6 -#define UART0_SEL 6 -#define CLK_SRC_PERIL0_VAL ((PWM_SEL << 24)\ - | (UART5_SEL << 20) \ - | (UART4_SEL << 16) \ - | (UART3_SEL << 12) \ - | (UART2_SEL<< 8) \ - | (UART1_SEL << 4) \ - | (UART0_SEL)) - -/* CLK_DIV_PERIL0 */ -#if defined(CONFIG_CLK_800_330_165) || defined(CONFIG_CLK_1000_330_165) -#define UART5_RATIO 7 -#define UART4_RATIO 7 -#define UART3_RATIO 7 -#define UART2_RATIO 7 -#define UART1_RATIO 7 -#define UART0_RATIO 7 -#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) || defined(CONFIG_CLK_800_400_200) -#define UART5_RATIO 8 -#define UART4_RATIO 8 -#define UART3_RATIO 8 -#define UART2_RATIO 8 -#define UART1_RATIO 8 -#define UART0_RATIO 8 -#endif -#define CLK_DIV_PERIL0_VAL ((UART5_RATIO << 20) \ - | (UART4_RATIO << 16) \ - | (UART3_RATIO << 12) \ - | (UART2_RATIO << 8) \ - | (UART1_RATIO << 4) \ - | (UART0_RATIO)) - -#define MPLL_DEC (MPLL_MDIV * MPLL_MDIV / (MPLL_PDIV * 2^(MPLL_SDIV-1))) - -#define SCLK_UART MPLL_DEC/ (UART1_RATIO+1) -#if defined(CONFIG_CLK_800_330_165) || defined(CONFIG_CLK_1000_330_165) -#define UART_UBRDIV_VAL 0x2B/* (SCLK_UART/(115200*16) -1) */ -#define UART_UDIVSLOT_VAL 0xC /*((((SCLK_UART*10/(115200*16) -10))%10)*16/10)*/ -#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) || defined(CONFIG_CLK_800_400_200) -#define UART_UBRDIV_VAL 0x2F /* (SCLK_UART/(115200*16) -1) */ -#define UART_UDIVSLOT_VAL 0x3 /*((((SCLK_UART*10/(115200*16) -10))%10)*16/10)*/ -#endif - -#define UART_115200_IDIV UART_UBRDIV_VAL -#define UART_115200_FDIV UART_UDIVSLOT_VAL - -#define UART_38400_IDIV UART_UBRDIV_VAL -#define UART_38400_FDIV UART_UDIVSLOT_VAL - -#define UART_19200_IDIV UART_UBRDIV_VAL -#define UART_19200_FDIV UART_UDIVSLOT_VAL - -#define UART_LCON_VAL 0x03 -#define UART_ECR_VAL 0x111 -#define UART_CR_VAL 0x3C5 - -// Exynos4210 CMU Register definition -#define CLK_SRC_LEFTBUS_OFFSET 0x04200 -#define CLK_DIV_LEFTBUS_OFFSET 0x04500 - -#define CLK_SRC_RIGHTBUS_OFFSET 0x08200 -#define CLK_DIV_RIGHTBUS_OFFSET 0x08500 - -#define EPLL_LOCK_OFFSET 0x0C010 -#define VPLL_LOCK_OFFSET 0x0C020 -#define EPLL_CON0_OFFSET 0x0C110 -#define EPLL_CON1_OFFSET 0x0C114 -#define VPLL_CON0_OFFSET 0x0C120 -#define VPLL_CON1_OFFSET 0x0C124 - -#define CLK_SRC_TOP0_OFFSET 0x0C210 -#define CLK_SRC_TOP1_OFFSET 0x0C214 -#define CLK_SRC_PERIL0_OFFSET 0x0C250 - -#define CLK_SRC_FSYS_OFFSET (0x0C240) -#define CLK_DIV_FSYS1_OFFSET (0x0C544) -#define CLK_DIV_FSYS2_OFFSET (0x0C548) -#define CLK_DIV_FSYS3_OFFSET (0x0C54C) - -#define CLK_DIV_PERIL0_OFFSET 0x0C550 -#define CLK_DIV_TOP_OFFSET 0x0C510 - -#define CLK_SRC_DMC_OFFSET 0x10200 -#define CLK_DIV_DMC0_OFFSET 0x10500 -#define CLK_DIV_DMC1_OFFSET 0x10504 - -#define APLL_LOCK_OFFSET 0x14000 -#define MPLL_LOCK_OFFSET 0x14008 -#define APLL_CON0_OFFSET 0x14100 -#define APLL_CON1_OFFSET 0x14104 -#define MPLL_CON0_OFFSET 0x14108 -#define MPLL_CON1_OFFSET 0x1410C - -#define CLK_SRC_CPU_OFFSET 0x14200 -#define CLK_DIV_CPU0_OFFSET 0x14500 -#define CLK_DIV_CPU1_OFFSET 0x14504 - -#define CLKGATE_IP_LCD0_OFFSET (0xC934) -#define CLKSRC_LCD0_OFFSET (0xC234) -#define CLKDIV_LCD0_OFFSET (0xC534) -#define CLKSRC_MASK_LCD0_OFFSET (0xC334) - -#define FIMD0_SCLKMPLL (0x06) -#define FIMD0_CLK_DIV (0x05) - -#define CLK_PPMULCD0_MASK (0x01 << 0x05) -#define CLKGATE_FIMD0_MASK (0x01 << 0x00) -#define CLKSRC_FIMD0_MASK (0x0F << 0x00) -#define CLKDIV_FIMD0_MASK (0x0F << 0x00) - -#define CLKSRC_FIMD0_SEL(x) ((x) << 0x00) -#define CLKDIV_FIMD0_SEL(x) ((x) << 0x00) -#define FIMD0_UNMASK (0x01 << 0x00) - -#define CLK_DIV_FSYS2 (CLK_BASE + 0xC548) -#define CLK_DIV_FSYS3 (CLK_BASE + 0xC54C) - -// Exynos4210 MIU Base Address -#define Exynos4210_MIU_BASE 0x10600000 - -#define MIU_INTLV_CONFIG 0x400 -#define MIU_INTLV_START_ADDR 0x808 -#define MIU_MAPPING_UPDATE 0x800 -#define MIU_INTLV_END_ADDR 0x810 - -#define MIU_SINGLE_MAPPING0_START_ADDR 0x818 -#define MIU_SINGLE_MAPPING0_END_ADDR 0x820 -#define MIU_SINGLE_MAPPING1_START_ADDR 0x828 -#define MIU_SINGLE_MAPPING1_END_ADDR 0x830 - -// Dynamic Memory C#define PWM_TIMER_Tontroller Base -#define ARM_EB_DMC_BASE 0x10018000 - -// Static Memory Controller Base -#define ARM_EB_SMC_CTRL_BASE 0x10080000 - -// System Configuration Controller register Base addresses -#define SYS_DISPLAY_CONTROL_OFFSET (0x0210) -#define FIMDBYPASS_LBLK0 (0x01 << 0x01) - -//FIMD register offsets -#define VIDCON0_OFFSET (0x00) -#define VIDCON1_OFFSET (0x0004) /* Video control 1 */ -#define VIDCON2_OFFSET (0x0008) /* Video control 2 */ -#define VIDTCON0_OFFSET (0x0010) /* Video time control 0 */ -#define VIDTCON1_OFFSET (0x0014) /* Video time control 1 */ -#define VIDTCON2_OFFSET (0x0018) /* Video time control 2 */ -#define WINSHMAP_OFFSET (0x0034) /* Window Shadow control */ -#define WINCON_OFFSET(x) (0x0020 + (x * 0x04)) -#define VIDOSD_A_OFFSET(x) (0x0040 + (x * 0x10)) -#define VIDOSD_B_OFFSET(x) (0x0044 + (x * 0x10)) -#define VIDOSD_C_OFFSET(x) (0x0048 + (x * 0x10)) -#define VIDADDR_START0_OFFSET(x)(0x00A0 + (x * 0x08)) -#define VIDADDR_END0_OFFSET(x) (0x00D0 + (x * 0x08)) -#define VIDADDR_SIZE_OFFSET(x) (0x0100 + (x * 0x04)) -/******************************************* -// Interrupt Map -*******************************************/ - -// Timer Interrupts -#define TIMER01_INTERRUPT_NUM 34 -#define TIMER23_INTERRUPT_NUM 35 - -#define Exynos4210_INT_NUM(x) ((x) + 32) - -#define PWM_TIMER0_INTERRUPT_NUM Exynos4210_INT_NUM(37) -#define PWM_TIMER1_INTERRUPT_NUM Exynos4210_INT_NUM(38) -#define PWM_TIMER2_INTERRUPT_NUM Exynos4210_INT_NUM(39) -#define PWM_TIMER3_INTERRUPT_NUM Exynos4210_INT_NUM(40) -#define PWM_TIMER4_INTERRUPT_NUM Exynos4210_INT_NUM(41) - -/******************************************* -// EFI Memory Map in Permanent Memory (DRAM) -*******************************************/ - -// This region is allocated at the bottom of the DRAM. It will be used -// for fixed address allocations such as Vector Table -#define ARM_EB_EFI_FIX_ADDRESS_REGION_SZ SIZE_8MB - -// This region is the memory declared to PEI as permanent memory for PEI -// and DXE. EFI stacks and heaps will be declared in this region. -#define ARM_EB_EFI_MEMORY_REGION_SZ 0x1000000 - -//gpio definitions as required by the Embedded gpio module -#define DISTANCE_BTWN_PORTS (0x20) - -#define GPIO_CON (0x00) -#define GPIO_DATAIN (0x04) -#define GPIO_PUD (0x08) -#define GPIO_DRV (0x0C) - -#define GPIO_DATAIN_MASK(x) (1UL << (x)) -#define GPIO_PUD_MASK(x) (3UL << (x*2)) -#define GPIO_DRV_MASK(x) (3UL << (x*2)) -#define GPIO_SFN_MASK(x) (15UL <<(x*4)) - -#define GPIO_SFN_EN(x) (2UL << (x*4)) -#define GPIO_OP_EN(x) (1UL << (x*4)) - -#define GPIO_PUD_DIS(x) (0UL << (x*2)) -#define GPIO_PDN_EN(x) (1UL << (x*2)) -#define GPIO_PUP_EN(x) (3UL << (x*2)) -#define GPIO_DATA_HIGH(x) (1UL << (x)) -#define GPIO_DATA_LOW(x) (0UL << (x)) - -#define GPIO_DRV_SET(strength,pin) (strength << (pin*2)) - -#define PIN0 (0x00) -#define PIN1 (0x01) -#define PIN2 (0x02) -#define PIN3 (0x03) -#define PIN4 (0x04) -#define PIN5 (0x05) -#define PIN6 (0x06) -#define PIN7 (0x07) - -#define GPA0 (0x00) -#define GPA1 (0x01) -#define GPB (0x02) -#define GPC0 (0x03) -#define GPC1 (0x04) -#define GPD0 (0x05) -#define GPD1 (0x06) -#define GPE0 (0x07) -#define GPE1 (0x08) -#define GPE2 (0x09) -#define GPE3 (0x0A) -#define GPE4 (0x0B) -#define GPF0 (0x0C) -#define GPF1 (0x0D) -#define GPF2 (0x0E) -#define GPF3 (0x0F) -#define GPJ0 (0x10) -#define GPJ1 (0x11) -#define GPK0 (0x12) -#define GPK1 (0x13) -#define GPK2 (0x14) -#define GPK3 (0x15) -#define GPL0 (0x16) -#define GPL1 (0x17) -#define GPL2 (0x18) -#define GPX0 (0x19) -#define GPX1 (0x1A) -#define GPX2 (0x1B) -#define GPX3 (0x1C) -#define GPY (0x1D) -#define GPZ (0x1E) - -/* LCD GPIO Pin Configurations*/ -#define LCD_HSYNC GPIO(GPF0,PIN0) -#define LCD_VSYNC GPIO(GPF0,PIN1) -#define LCD_VDEN GPIO(GPF0,PIN2) -#define LCD_VCLK GPIO(GPF0,PIN3) -#define LCD_VD_0 GPIO(GPF0,PIN4) -#define LCD_VD_1 GPIO(GPF0,PIN5) -#define LCD_VD_2 GPIO(GPF0,PIN6) -#define LCD_VD_3 GPIO(GPF0,PIN7) - -#define LCD_VD_4 GPIO(GPF1,PIN0) -#define LCD_VD_5 GPIO(GPF1,PIN1) -#define LCD_VD_6 GPIO(GPF1,PIN2) -#define LCD_VD_7 GPIO(GPF1,PIN3) -#define LCD_VD_8 GPIO(GPF1,PIN4) -#define LCD_VD_9 GPIO(GPF1,PIN5) -#define LCD_VD_10 GPIO(GPF1,PIN6) -#define LCD_VD_11 GPIO(GPF1,PIN7) - -#define LCD_VD_12 GPIO(GPF2,PIN0) -#define LCD_VD_13 GPIO(GPF2,PIN1) -#define LCD_VD_14 GPIO(GPF2,PIN2) -#define LCD_VD_15 GPIO(GPF2,PIN3) -#define LCD_VD_16 GPIO(GPF2,PIN4) -#define LCD_VD_17 GPIO(GPF2,PIN5) -#define LCD_VD_18 GPIO(GPF2,PIN6) -#define LCD_VD_19 GPIO(GPF2,PIN7) - -#define LCD_VD_20 GPIO(GPF3,PIN0) -#define LCD_VD_21 GPIO(GPF3,PIN1) -#define LCD_VD_22 GPIO(GPF3,PIN2) -#define LCD_VD_23 GPIO(GPF3,PIN3) -#define VSYNC_LDI GPIO(GPF3,PIN4) -#define SYS_OE GPIO(GPF3,PIN5) - -#define LCD_BACKLIGHT GPIO(GPD0,PIN1) - -/* SDHC GPIO Pin Configuration*/ -#define SD_2_CLK GPIO(GPK2,PIN0) -#define SD_2_CMD GPIO(GPK2,PIN1) -#define SD_2_CDn GPIO(GPK2,PIN2) -#define SD_2_DATA0 GPIO(GPK2,PIN3) -#define SD_2_DATA1 GPIO(GPK2,PIN4) -#define SD_2_DATA2 GPIO(GPK2,PIN5) -#define SD_2_DATA3 GPIO(GPK2,PIN6) - -#endif diff --git a/SamsungPlatformPkg/ExynosPkg/Include/Protocol/ExynosGpio.h b/SamsungPlatformPkg/ExynosPkg/Include/Protocol/ExynosGpio.h deleted file mode 100644 index 35fe93bf6..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Include/Protocol/ExynosGpio.h +++ /dev/null @@ -1,199 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __EXYNOS_GPIO_H__ -#define __EXYNOS_GPIO_H__ - -// -// Protocol interface structure -// -typedef struct _EXYNOS_GPIO EXYNOS_GPIO; - -// -// Data Types -// -typedef UINTN EXYNOS_GPIO_PIN; - -#define GPIO(Port, Pin) ((EXYNOS_GPIO_PIN)(((Port) << (16)) | (Pin))) -#define GPIO_PIN(x) ((EXYNOS_GPIO_PIN)(x) & (0xFFFF)) -#define GPIO_PORT(x) ((EXYNOS_GPIO_PIN)(x) >> (16)) - -typedef enum { - GPIO_MODE_INPUT = 0x00, - GPIO_MODE_OUTPUT_0 = 0x0E, - GPIO_MODE_OUTPUT_1 = 0x0F, - GPIO_MODE_SPECIAL_FUNCTION_2 = 0x02, - GPIO_MODE_SPECIAL_FUNCTION_3 = 0x03, - GPIO_MODE_SPECIAL_FUNCTION_4 = 0x04, - GPIO_MODE_SPECIAL_FUNCTION_5 = 0x05, - GPIO_MODE_SPECIAL_FUNCTION_6 = 0x06, - GPIO_MODE_SPECIAL_FUNCTION_7 = 0x07 -} EXYNOS_GPIO_MODE; - -typedef enum { - GPIO_PULL_NONE, - GPIO_PULL_UP, - GPIO_PULL_DOWN -} EXYNOS_GPIO_PULL; - -typedef enum { - GPIO_DRV_1X, - GPIO_DRV_2X, - GPIO_DRV_3X, - GPIO_DRV_4X -} EXYNOS_GPIO_STRN; - -// -// Function Prototypes -// -typedef -EFI_STATUS -(EFIAPI *EXYNOS_GPIO_GET) ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - OUT UINTN *Value - ); -/*++ - -Routine Description: - - Gets the state of a GPIO pin - -Arguments: - - This - pointer to protocol - Gpio - which pin to read - Value - state of the pin - -Returns: - - EFI_SUCCESS - GPIO state returned in Value - ---*/ - - -typedef -EFI_STATUS -(EFIAPI *EXYNOS_GPIO_SET) ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - IN EXYNOS_GPIO_MODE Mode - ); -/*++ - -Routine Description: - - Sets the state of a GPIO pin - -Arguments: - - This - pointer to protocol - Gpio - which pin to modify - Mode - mode to set - -Returns: - - EFI_SUCCESS - GPIO set as requested - ---*/ - - -typedef -EFI_STATUS -(EFIAPI *EXYNOS_GPIO_GET_MODE) ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - OUT EXYNOS_GPIO_MODE *Mode - ); -/*++ - -Routine Description: - - Gets the mode (function) of a GPIO pin - -Arguments: - - This - pointer to protocol - Gpio - which pin - Mode - pointer to output mode value - -Returns: - - EFI_SUCCESS - mode value retrieved - ---*/ - - -typedef -EFI_STATUS -(EFIAPI *EXYNOS_GPIO_SET_PULL) ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - IN EXYNOS_GPIO_PULL Direction - ); -/*++ - -Routine Description: - - Sets the pull-up / pull-down resistor of a GPIO pin - -Arguments: - - This - pointer to protocol - Gpio - which pin - Direction - pull-up, pull-down, or none - -Returns: - - EFI_SUCCESS - pin was set - ---*/ - -typedef EFI_STATUS -(EFIAPI *EXYNOS_GPIO_DRV) ( - IN EXYNOS_GPIO *This, - IN EXYNOS_GPIO_PIN Gpio, - IN EXYNOS_GPIO_STRN Strength - ); -/*++ - -Routine Description: - - Sets the Driving strength resistor of a GPIO pin - -Arguments: - - This - pointer to protocol - Gpio - which pin - Strength - 0=1x,1=2x,2=3x,3=4x - -Returns: - - EFI_SUCCESS - pin was set - ---*/ - - - -struct _EXYNOS_GPIO { - EXYNOS_GPIO_GET Get; - EXYNOS_GPIO_SET Set; - EXYNOS_GPIO_GET_MODE GetMode; - EXYNOS_GPIO_SET_PULL SetPull; - EXYNOS_GPIO_DRV SetStrength; -}; - -extern EFI_GUID gSamsungPlatformGpioProtocolGuid; - -#endif diff --git a/SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.c b/SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.c deleted file mode 100644 index a1e1799f0..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.c +++ /dev/null @@ -1,36 +0,0 @@ -/** @file - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -UINT32 -GpioBase ( - IN UINTN Port - ) -{ - - ASSERT( (Port >= GPA0) && (Port <= GPZ)); - - /*decide which part of gpio is being requested. give the corresponding base address*/ - if(Port & 0x10) { - return (PcdGet32(PcdGpioPart2Base) + (Port*DISTANCE_BTWN_PORTS)); - }else { - return (PcdGet32(PcdGpioPart1Base) + (Port*DISTANCE_BTWN_PORTS)); - } - - ASSERT(FALSE); return 0; -} diff --git a/SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf b/SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf deleted file mode 100644 index cafbdec32..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf +++ /dev/null @@ -1,40 +0,0 @@ -#/** @file -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ExynosLib - FILE_GUID = d035f5c2-1b92-4746-9f6c-5ff6202970df - MODULE_TYPE = UEFI_DRIVER - VERSION_STRING = 1.0 - LIBRARY_CLASS = ExynosLib - -[Sources.common] - ExynosLib.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - -[LibraryClasses] - DebugLib - IoLib - -[Protocols] - -[Guids] - -[Pcd] - gExynosPkgTokenSpaceGuid.PcdGpioPart1Base - gExynosPkgTokenSpaceGuid.PcdGpioPart2Base diff --git a/SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c b/SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c deleted file mode 100644 index 353cad11e..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c +++ /dev/null @@ -1,118 +0,0 @@ -/** @file - Basic serial IO abstaction for GDB - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include -#include - -RETURN_STATUS -EFIAPI -GdbSerialLibConstructor ( - VOID - ) -{ - return GdbSerialInit (115200, 0, 8, 1); -} - -RETURN_STATUS -EFIAPI -GdbSerialInit ( - IN UINT64 BaudRate, - IN UINT8 Parity, - IN UINT8 DataBits, - IN UINT8 StopBits - ) -{ - if ((Parity != 0) || (DataBits != 8) || (StopBits != 1)) { - return RETURN_UNSUPPORTED; - } - - if (BaudRate != 115200) { - // Could add support for different Baud rates.... - return RETURN_UNSUPPORTED; - } - - UINT32 Base = PcdGet32 (PcdGdbUartBase); - - // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ - MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV); - MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV); - - // no parity, 1 stop, no fifo, 8 data bits - MmioWrite32 (Base + UARTLCR_H, 0x60); - - // clear any pending errors - MmioWrite32 (Base + UARTECR, 0); - - // enable tx, rx, and uart overall - MmioWrite32 (Base + UARTCR, 0x301); - - return RETURN_SUCCESS; -} - -BOOLEAN -EFIAPI -GdbIsCharAvailable ( - VOID - ) -{ - UINT32 FR = PcdGet32 (PcdGdbUartBase) + UTRSTAT_OFFSET; - - if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) { - return TRUE; - } else { - return FALSE; - } -} - -CHAR8 -EFIAPI -GdbGetChar ( - VOID - ) -{ - UINT32 FR = PcdGet32 (PcdGdbUartBase) + UTRSTAT_OFFSET; - UINT32 DR = PcdGet32 (PcdGdbUartBase) + URXH_OFFSET; - - while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0); - return MmioRead8 (DR); -} - -VOID -EFIAPI -GdbPutChar ( - IN CHAR8 Char - ) -{ - UINT32 FR = PcdGet32 (PcdGdbUartBase) + UTRSTAT_OFFSET; - UINT32 DR = PcdGet32 (PcdGdbUartBase) + UTXH_OFFSET; - - while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0); - MmioWrite8 (DR, Char); - return; -} - -VOID -GdbPutString ( - IN CHAR8 *String - ) -{ - while (*String != '\0') { - GdbPutChar (*String); - String++; - } -} diff --git a/SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf b/SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf deleted file mode 100644 index 42adbb0f1..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf +++ /dev/null @@ -1,40 +0,0 @@ -#/** @file -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = GdbSerialLib - FILE_GUID = E8EA1309-2F14-428f-ABE3-7016CE4B4305 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = GdbSerialLib - - CONSTRUCTOR = GdbSerialLibConstructor - - -[Sources.common] - GdbSerialLib.c - - -[Packages] - MdePkg/MdePkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - - -[LibraryClasses] - DebugLib - IoLib - -[FixedPcd] - gExynosPkgTokenSpaceGuid.PcdGdbUartBase diff --git a/SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c b/SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c deleted file mode 100644 index daaa1299c..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c +++ /dev/null @@ -1,167 +0,0 @@ -/** @file - Template library implementation to support ResetSystem Runtime call. - - Fill in the templates with what ever makes you system reset. - - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -VOID DestroyExynosMemMap(VOID); -typedef VOID (EFIAPI *CALL_STUB)(VOID); - -VOID -DestroyExynosMemMap ( - VOID - ) -{ - EFI_STATUS Status; - UINTN MemoryMapSize; - EFI_MEMORY_DESCRIPTOR *MemoryMap; - UINTN MapKey; - UINTN DescriptorSize; - UINTN DescriptorVersion; - UINTN Pages; - - MemoryMap = NULL; - MemoryMapSize = 0; - do { - Status = gBS->GetMemoryMap ( - &MemoryMapSize, - MemoryMap, - &MapKey, - &DescriptorSize, - &DescriptorVersion - ); - if (Status == EFI_BUFFER_TOO_SMALL) { - - Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1; - MemoryMap = AllocatePages (Pages); - - // - // Get System MemoryMap - // - Status = gBS->GetMemoryMap ( - &MemoryMapSize, - MemoryMap, - &MapKey, - &DescriptorSize, - &DescriptorVersion - ); - // Don't do anything between the GetMemoryMap() and ExitBootServices() - if (!EFI_ERROR (Status)) { - Status = gBS->ExitBootServices (gImageHandle, MapKey); - if (EFI_ERROR (Status)) { - FreePages (MemoryMap, Pages); - MemoryMap = NULL; - MemoryMapSize = 0; - } - } - } - } while (EFI_ERROR (Status)); - - //Clean and invalidate caches. - WriteBackInvalidateDataCache(); - InvalidateInstructionCache(); - - //Turning off Caches and MMU - ArmDisableDataCache (); - ArmDisableInstructionCache (); - ArmDisableMmu (); -} - - - -/** - Resets the entire platform. - - @param ResetType The type of reset to perform. - @param ResetStatus The status code for the reset. - @param DataSize The size, in bytes, of WatchdogData. - @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or - EfiResetShutdown the data buffer starts with a Null-terminated - Unicode string, optionally followed by additional binary data. - -**/ -EFI_STATUS -EFIAPI -LibResetSystem ( - IN EFI_RESET_TYPE ResetType, - IN EFI_STATUS ResetStatus, - IN UINTN DataSize, - IN CHAR16 *ResetData OPTIONAL - ) -{ - CALL_STUB StartOfFv; - UINTN PmuBase; - if (ResetData != NULL) { - DEBUG ((EFI_D_ERROR, "%s", ResetData)); - } - - DestroyExynosMemMap(); - - switch (ResetType) { - case EfiResetWarm: - //Perform warm reset of the system by jumping to the begining of the FV -// ((ptrImageStart)PcdGet32(PcdFvBaseAddress))(); - StartOfFv = (CALL_STUB)(UINTN)PcdGet32(PcdFvBaseAddress); - StartOfFv (); - break; - case EfiResetCold: - case EfiResetShutdown: - default: - //Perform cold reset of the system. - PmuBase = (UINTN)PcdGet32(PcdPmuBase); - MmioWrite32 ((PmuBase + SWRESET_OFFSET), 0x01); - while ((MmioRead32(PmuBase + SWRESET_OFFSET)) != 0x1); - break; - } - - // If the reset didn't work, return an error. - ASSERT (FALSE); - return EFI_DEVICE_ERROR; -} - - - -/** - Initialize any infrastructure required for LibResetSystem () to function. - - @param ImageHandle The firmware allocated handle for the EFI image. - @param SystemTable A pointer to the EFI System Table. - - @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. - -**/ -EFI_STATUS -EFIAPI -LibInitializeResetSystem ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - return EFI_SUCCESS; -} diff --git a/SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf b/SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf deleted file mode 100644 index 989eddeb7..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ /dev/null @@ -1,44 +0,0 @@ -#/** @file -# Reset System lib to make it easy to port new platforms -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmEbResetSystemLib - FILE_GUID = CEFFA65C-B568-453e-9E11-B81AE683D035 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = EfiResetSystemLib - - -[Sources.common] - ResetSystemLib.c - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec -[LibraryClasses] - ArmLib - IoLib - BaseLib - DebugLib - MemoryAllocationLib - CacheMaintenanceLib -[FixedPcd] - gArmTokenSpaceGuid.PcdFvBaseAddress -[Pcd] - gExynosPkgTokenSpaceGuid.PcdPmuBase diff --git a/SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.c b/SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.c deleted file mode 100644 index 328956fb0..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.c +++ /dev/null @@ -1,204 +0,0 @@ -/** @file - Serial I/O Port library functions with no library constructor/destructor - - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include -#include -#include - -/* - - Programmed hardware of Serial port. - Irrespective of the previous settings Initialize it to current requirement -**/ -RETURN_STATUS -EFIAPI -SerialPortInitialize ( - VOID - ) -{ -#if 0 - UINT32 UARTConsoleBase; - UINT32 SmdkCmuBase; - - UARTConsoleBase=PcdGet32(PcdConsoleUartBase); - SmdkCmuBase=PcdGet32(PcdCmuBase); - - MmioWrite32 (SmdkCmuBase + CLK_SRC_PERIL0_OFFSET, CLK_SRC_PERIL0_VAL); - MmioWrite32 (SmdkCmuBase + CLK_DIV_PERIL0_OFFSET, CLK_DIV_PERIL0_VAL); - - if (PL011_CONSOLE_UART_SPEED == 115200) { - // Initialize baud rate generator - MmioWrite32 (UARTConsoleBase + UARTIBRD, UART_115200_IDIV); - MmioWrite32 (UARTConsoleBase + UARTFBRD, UART_115200_FDIV); - } else if (PL011_CONSOLE_UART_SPEED == 38400) { - // Initialize baud rate generator - MmioWrite32 (UARTConsoleBase + UARTIBRD, UART_38400_IDIV); - MmioWrite32 (UARTConsoleBase + UARTFBRD, UART_38400_FDIV); - } else if (PL011_CONSOLE_UART_SPEED == 19200) { - // Initialize baud rate generator - MmioWrite32 (UARTConsoleBase + UARTIBRD, UART_19200_IDIV); - MmioWrite32 (UARTConsoleBase + UARTFBRD, UART_19200_FDIV); - } else { - return EFI_INVALID_PARAMETER; - } - - // No parity, 1 stop, no fifo, 8 data bits - MmioWrite32 (UARTConsoleBase + UARTLCR_H, UART_LCON_VAL); - - // configure FIFO contrl regs - MmioWrite32 (UARTConsoleBase + UARTECR, UART_ECR_VAL); - - // enable tx, rx, and uart overall - MmioWrite32 (UARTConsoleBase + UARTCR, UART_CR_VAL); -#endif - return EFI_SUCCESS; -} - -/** - Write data to serial device. - - @param Buffer Point of data buffer which need to be writed. - @param NumberOfBytes Number of output bytes which are cached in Buffer. - - @retval 0 Write data failed. - @retval !0 Actual number of bytes writed to serial device. - -**/ -UINTN -EFIAPI -SerialPortWrite ( - IN UINT8 *Buffer, - IN UINTN NumberOfBytes -) -{ - UINTN Count; - UINT32 UARTConsoleBase; - - UARTConsoleBase=PcdGet32(PcdConsoleUartBase); - for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) { - while ((MmioRead32 (UARTConsoleBase + UTRSTAT_OFFSET) & UART_TX_EMPTY_FLAG_MASK) == 0); - MmioWrite8 (UARTConsoleBase + UTXH_OFFSET, *Buffer); - } - - return NumberOfBytes; -} - -/** - Read data from serial device and save the datas in buffer. - - @param Buffer Point of data buffer which need to be writed. - @param NumberOfBytes Number of output bytes which are cached in Buffer. - - @retval 0 Read data failed. - @retval !0 Aactual number of bytes read from serial device. - -**/ -UINTN -EFIAPI -SerialPortRead ( - OUT UINT8 *Buffer, - IN UINTN NumberOfBytes -) -{ - UINTN Count; - UINT32 UARTConsoleBase; - - UARTConsoleBase=PcdGet32(PcdConsoleUartBase); - for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) { - while ((MmioRead32 (UARTConsoleBase + UTRSTAT_OFFSET) & UART_RX_EMPTY_FLAG_MASK) == 0); - *Buffer = MmioRead8 (UARTConsoleBase + URXH_OFFSET); - } - - return NumberOfBytes; -} - -/** - Check to see if any data is avaiable to be read from the debug device. - - @retval EFI_SUCCESS At least one byte of data is avaiable to be read - @retval EFI_NOT_READY No data is avaiable to be read - @retval EFI_DEVICE_ERROR The serial device is not functioning properly - -**/ -BOOLEAN -EFIAPI -SerialPortPoll ( - VOID - ) -{ - UINT32 UARTConsoleBase; - UARTConsoleBase=PcdGet32(PcdConsoleUartBase); - - return ((MmioRead32 (UARTConsoleBase + UTRSTAT_OFFSET) & UART_RX_EMPTY_FLAG_MASK) != 0); -} - -/** - Set the serial device control bits. - - @return Always return EFI_UNSUPPORTED. - -**/ -RETURN_STATUS -EFIAPI -SerialPortSetControl ( - IN UINT32 Control - ) -{ - return RETURN_SUCCESS; -} - -/** - Get the serial device control bits. - - @param Control Control signals read from the serial device. - - @retval EFI_SUCCESS The control bits were read from the serial device. - @retval EFI_DEVICE_ERROR The serial device is not functioning correctly. - -**/ -RETURN_STATUS -EFIAPI -SerialPortGetControl ( - OUT UINT32 *Control - ) -{ - return RETURN_SUCCESS; -} - - -/** - Set the serial device attributes. - - @return Always return EFI_UNSUPPORTED. - -**/ -RETURN_STATUS -EFIAPI -SerialPortSetAttributes ( - IN UINT64 BaudRate, - IN UINT32 ReceiveFifoDepth, - IN UINT32 Timeout, - IN EFI_PARITY_TYPE Parity, - IN UINT8 DataBits, - IN EFI_STOP_BITS_TYPE StopBits - ) -{ - return RETURN_SUCCESS; -} - diff --git a/SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf b/SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf deleted file mode 100644 index 2b3141245..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf +++ /dev/null @@ -1,38 +0,0 @@ -#/** @file -# -# Component discription file for NorFlashDxe module -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = SerialPortLib - FILE_GUID = 8ecefc8f-a2c4-4091-b80f-20f7aeb0567f - MODULE_TYPE = PEIM - VERSION_STRING = 1.0 - LIBRARY_CLASS = SerialPortLib - -[Sources.common] - SerialPortLib.c - -[LibraryClasses] - IoLib - -[Packages] - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - # ArmPlatformPkg/ArmPlatformPkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - -[FixedPcd] - gExynosPkgTokenSpaceGuid.PcdConsoleUartBase - gExynosPkgTokenSpaceGuid.PcdCmuBase diff --git a/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c b/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c deleted file mode 100755 index 6baf2cec6..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.c +++ /dev/null @@ -1,234 +0,0 @@ -/** @file - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -#include -#include -#include -#include -#include -#include -#include - - -// Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter -// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe. -RETURN_STATUS -EFIAPI -TimerConstructor ( - VOID - ) -{ - UINT32 PWMTimerBase; - UINT32 rwVal; - - PWMTimerBase = PcdGet32(PcdPWMTimerBase); - -/** - This function is for initializing for PWM Timer - Timer 2 = > Delay Counter - Timer 3 = > Performance Counter -**/ -// PWM Input Clock(ACLK_100) is 100 Mhz so We need to prescale about 1Mhz to make udelay function - rwVal = MmioRead32 (PWMTimerBase + PWM_TCFG0_OFFSET); - rwVal &= ~(0xFF << PRESCALE_GRP1_START_POS); - rwVal |= (PRESCALE_TIMER_GRP1 << PRESCALE_GRP1_START_POS); - MmioWrite32 ((PWMTimerBase + PWM_TCFG0_OFFSET), rwVal); - MmioWrite32 ((PWMTimerBase + PWM_TCFG1_OFFSET), 0x0); - -// PWM Timer INT disable - rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET), rwVal & ~(TIMER_INTR_MASK(TIMER_2) | TIMER_INTR_MASK(TIMER_3))); - -// PWM Timer 2,3 make to stop - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & (STOP_TIMER_VAL(TIMER_2) | STOP_TIMER_VAL(TIMER_3))); - -// PWM Timer 3 used by Free running counter with Auto re-load mode - MmioWrite32 ((PWMTimerBase + PWM_TCNTB3_OFFSET), MAX_COUNT_VAL); -// Set and Clear PWM Manually update for Timer 3 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_3)); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_3)); -// Set Auto re-load and start Timer - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | RELOAD_AND_START(TIMER_3)); - - DEBUG ((EFI_D_ERROR, "Timer 2,3 Enabled\n")); - - return RETURN_SUCCESS; -} - -/** - Stalls the CPU for at least the given number of microseconds. - - Stalls the CPU for the number of microseconds specified by MicroSeconds. - - @param MicroSeconds The minimum number of microseconds to delay. - - @return The value of MicroSeconds inputted. - -**/ -UINTN -EFIAPI -MicroSecondDelay ( - IN UINTN MicroSeconds - ) -{ - UINT32 rwVal; - UINT32 PWMTimerBase; - - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - // load the timer count register - MmioWrite32 ((PWMTimerBase + PWM_TCNTB2_OFFSET), MicroSeconds); - - -// PWM Timer 2 stop - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & STOP_TIMER_VAL(TIMER_2)); - -// Set and Clear PWM Manually update for Timer 2 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_2)); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_2)); - //Start Timer 2 - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | START_TIMER(TIMER_2)); - //Wait for requested delay time - while (MmioRead32 (PWMTimerBase + PWM_TCNTO2_OFFSET) > 0) { - ; - } - - return MicroSeconds; -} - -/** - Stalls the CPU for at least the given number of nanoseconds. - - Stalls the CPU for the number of nanoseconds specified by NanoSeconds. - - @param NanoSeconds The minimum number of nanoseconds to delay. - - @return The value of NanoSeconds inputted. - -**/ -UINTN -EFIAPI -NanoSecondDelay ( - IN UINTN NanoSeconds - ) -{ - UINT32 MicroSeconds; - UINT32 rwVal; - UINT32 PWMTimerBase; - - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - - // Round up to 1us Tick Number - MicroSeconds = (UINT32)NanoSeconds / 1000; - MicroSeconds += ((UINT32)NanoSeconds % 1000) == 0 ? 0 : 1; - // load the timer count register - MmioWrite32 ((PWMTimerBase + PWM_TCNTB2_OFFSET), MicroSeconds); - -// PWM Timer 2 stop - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & STOP_TIMER_VAL(TIMER_2)); -// Set and Clear PWM Manually update for Timer 2 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_2)); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_2)); - //Start Timer 2 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | START_TIMER(TIMER_2)); - - //Wait for requested delay time - while (MmioRead32 (PWMTimerBase + PWM_TCNTO0_OFFSET) > 0) { - ; - } - - return NanoSeconds; -} - -/** - Retrieves the current value of a 64-bit free running performance counter. - - The counter can either count up by 1 or count down by 1. If the physical - performance counter counts by a larger increment, then the counter values - must be translated. The properties of the counter can be retrieved from - GetPerformanceCounterProperties(). - - @return The current value of the free running performance counter. - -**/ -UINT64 -EFIAPI -GetPerformanceCounter ( - VOID - ) -{ - UINT32 PWMTimerBase; - - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - // Free running 64-bit/32-bit counter is needed here. - // Don't think we need this to boot, just to do performance profile - // ASSERT (FALSE); - UINT32 val = MmioRead32 (PWMTimerBase + PWM_TCNTO3_OFFSET); - - ASSERT(val > 0); - - return (UINT64)val; -} - - -/** - Retrieves the 64-bit frequency in Hz and the range of performance counter - values. - - If StartValue is not NULL, then the value that the performance counter starts - with immediately after is it rolls over is returned in StartValue. If - EndValue is not NULL, then the value that the performance counter end with - immediately before it rolls over is returned in EndValue. The 64-bit - frequency of the performance counter in Hz is always returned. If StartValue - is less than EndValue, then the performance counter counts up. If StartValue - is greater than EndValue, then the performance counter counts down. For - example, a 64-bit free running counter that counts up would have a StartValue - of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter - that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0. - - @param StartValue The value the performance counter starts with when it - rolls over. - @param EndValue The value that the performance counter ends with before - it rolls over. - - @return The frequency in Hz. - -**/ -UINT64 -EFIAPI -GetPerformanceCounterProperties ( - OUT UINT64 *StartValue, OPTIONAL - OUT UINT64 *EndValue OPTIONAL - ) -{ - if (StartValue != NULL) { - // Timer starts with the reload value - *StartValue = (UINT64)0ULL; - } - - if (EndValue != NULL) { - // Timer counts up to 0xFFFFFFFF - *EndValue = 0xFFFFFFFF; - } - - return 1000000; -} diff --git a/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf b/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf deleted file mode 100755 index 5eb403402..000000000 --- a/SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf +++ /dev/null @@ -1,41 +0,0 @@ -#/** @file -# Timer library implementation -# -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = Exynos4210TimerLib - FILE_GUID = 34cfa85e-a798-4e46-8d38-1843d7a0caea - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = TimerLib - - CONSTRUCTOR = TimerConstructor - -[Sources.common] - TimerLib.c - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - -[LibraryClasses] - DebugLib - IoLib - BaseLib - -[Pcd.common] - gExynosPkgTokenSpaceGuid.PcdPWMTimerBase diff --git a/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.c b/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.c deleted file mode 100755 index 064a1d158..000000000 --- a/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.c +++ /dev/null @@ -1,1327 +0,0 @@ -/** @file - MMC/SD Card driver for Secure Digital Host Controller - - This driver always produces a BlockIo protocol but it starts off with no Media - present. A TimerCallBack detects when media is inserted or removed and after - a media change event a call to BlockIo ReadBlocks/WriteBlocks will cause the - media to be detected (or removed) and the BlockIo Media structure will get - updated. No MMC/SD Card harward registers are updated until the first BlockIo - ReadBlocks/WriteBlocks after media has been insterted (booting with a card - plugged in counts as an insertion event). - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -#include "SDHCDxe.h" - - -EFI_BLOCK_IO_MEDIA gSDHCMedia = { - SIGNATURE_32('s','d','h','c'), // MediaId - TRUE, // RemovableMedia - FALSE, // MediaPresent - FALSE, // LogicalPartition - FALSE, // ReadOnly - FALSE, // WriteCaching - 512, // BlockSize - 4, // IoAlign - 0, // Pad - 0 // LastBlock -}; - -typedef struct { - VENDOR_DEVICE_PATH Mmc; - EFI_DEVICE_PATH End; -} SDHC_DEVICE_PATH; - -SDHC_DEVICE_PATH gSDHCDevicePath = { - { - HARDWARE_DEVICE_PATH, - HW_VENDOR_DP, - (UINT8)(sizeof(VENDOR_DEVICE_PATH)), - (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8), - 0xb615f1f5, 0x5088, 0x43cd, 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 - }, - { - END_DEVICE_PATH_TYPE, - END_ENTIRE_DEVICE_PATH_SUBTYPE, - sizeof (EFI_DEVICE_PATH_PROTOCOL), - 0 - } -}; - -CARD_INFO gCardInfo; -EFI_EVENT gTimerEvent; -BOOLEAN gMediaChange = FALSE; - -// -// Internal Functions -// - - -VOID -ParseCardCIDData ( - UINT32 Response0, - UINT32 Response1, - UINT32 Response2, - UINT32 Response3 - ) -{ - gCardInfo.CIDData.MDT = ((Response0 >> 8) & 0xFFF); - gCardInfo.CIDData.PSN = (((Response0 >> 24) & 0xFF) | ((Response1 & 0xFFFFFF) << 8)); - gCardInfo.CIDData.PRV = ((Response1 >> 24) & 0xFF); - gCardInfo.CIDData.PNM[4] = ((Response2) & 0xFF); - gCardInfo.CIDData.PNM[3] = ((Response2 >> 8) & 0xFF); - gCardInfo.CIDData.PNM[2] = ((Response2 >> 16) & 0xFF); - gCardInfo.CIDData.PNM[1] = ((Response2 >> 24) & 0xFF); - gCardInfo.CIDData.PNM[0] = ((Response3) & 0xFF); - gCardInfo.CIDData.OID = ((Response3 >> 8) & 0xFFFF); - gCardInfo.CIDData.MID = ((Response3 >> 24) & 0xFF); -} - - -VOID -UpdateSDHCClkFrequency ( - UINTN NewCLK - ) -{ - UINT32 CumBaseAddr; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - // Disable all clocks to not provide the clock to the card - MmioAnd32 ((SdMmcBaseAddr + CLKCON_OFFSET), ~(0xF)); - - CumBaseAddr = PcdGet32(PcdCmuBase); - //Set new clock frequency. - if (NewCLK == 400) - MmioAndThenOr32 ((CumBaseAddr + CLK_DIV_FSYS2_OFFSET), ~(0xFFFF), 0xE008); - else if (NewCLK == 25000) - MmioAndThenOr32 ((CumBaseAddr + CLK_DIV_FSYS2_OFFSET), ~(0xFFFF), 0x0307); - - MmioOr32 ((SdMmcBaseAddr + CLKCON_OFFSET), ICE); - - //Poll till Internal Clock Stable - while ((MmioRead32 ((SdMmcBaseAddr + CLKCON_OFFSET)) & ICS) != ICS); - - //Set Clock enable to 0x1 to provide the clock to the card - MmioOr32 ((SdMmcBaseAddr + CLKCON_OFFSET), CCE); -} - -VOID -PrepareTransfer ( - UINTN Direction, UINTN BlockCount - ) -{ - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - //Set Block Size and Block count. - MmioWrite32 ((SdMmcBaseAddr + BLKSIZE_OFFSET), BLEN_512BYTES | (BlockCount << 16)); - - //Setting Data timeout counter value to max value. - MmioAndThenOr32 ((SdMmcBaseAddr + TIMEOUTCON_OFFSET), ~(0xFF << 16), 0xE << 16); -} - -EFI_STATUS -SendCmd ( - UINTN Cmd, - UINTN CmdInterruptEnableVal, - UINTN CmdArgument - ) -{ - UINTN MmcStatus; - UINTN RetryCount = 0; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - //Check if command line is in use or not. Poll till command line is available. - while (MmioRead32 ((SdMmcBaseAddr + PRNSTS_OFFSET)) & (CMDINHCMD | CMDINHDAT)); - //Clear Status register. - MmioWrite32 ((SdMmcBaseAddr + INTSTS_OFFSET), 0xFFFFFFFF); - - //Set command argument register - MmioWrite32 ((SdMmcBaseAddr + ARGUMENT_OFFSET), CmdArgument); - - //Enable interrupt enable events to occur - MmioWrite32 ((SdMmcBaseAddr + INTEN_OFFSET), CmdInterruptEnableVal); - - DEBUG ((EFI_D_INFO, "SDHC::SendCmd : CMD = %d\n", (Cmd >> 24) & 0x3F)); - - MmioAndThenOr32 ((SdMmcBaseAddr + TIMEOUTCON_OFFSET), ~(0xFF << 16), 0xE << 16); - MicroSecondDelay(1); - //Send a command - MmioWrite32 ((SdMmcBaseAddr + CMDREG_OFFSET), Cmd); - MicroSecondDelay(1); - - //Check for the command status. - while (RetryCount < MAX_RETRY_COUNT) { - do { - MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); - } while (MmcStatus == 0); - - //Read status of command response - if ((MmcStatus & ERRINT) != 0) { - - //Perform soft-reset for cmd line. - MmioOr32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRC); - while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRC)); - - DEBUG ((EFI_D_INFO, "MmcStatus: %x\n", MmcStatus)); - return EFI_DEVICE_ERROR; - } - - //Check if command is completed. - if ((MmcStatus & CMDCOMP) == CMDCOMP) { - MmioWrite32 ((SdMmcBaseAddr + INTSTS_OFFSET), CMDCOMP); - break; - } - - RetryCount++; - } - - if (RetryCount == MAX_RETRY_COUNT) { - return EFI_TIMEOUT; - } - - return EFI_SUCCESS; -} - - -VOID -GetBlockInformation ( - UINTN *BlockSize, - UINTN *NumBlocks - ) -{ - CSD_SDV2 *CsdSDV2Data; - UINTN CardSize; - - if (gCardInfo.CardType == SD_CARD_2_HIGH) { - CsdSDV2Data = (CSD_SDV2 *)&gCardInfo.CSDData; - - //Populate BlockSize. - *BlockSize = (0x1UL << CsdSDV2Data->READ_BL_LEN); - - //Calculate Total number of blocks. - CardSize = CsdSDV2Data->C_SIZELow16 | (CsdSDV2Data->C_SIZEHigh6 << 2); - *NumBlocks = ((CardSize + 1) * 1024); - } else { - //Populate BlockSize. - *BlockSize = (0x1UL << gCardInfo.CSDData.READ_BL_LEN); - - //Calculate Total number of blocks. - CardSize = gCardInfo.CSDData.C_SIZELow2 | (gCardInfo.CSDData.C_SIZEHigh10 << 2); - *NumBlocks = (CardSize + 1) * (1 << (gCardInfo.CSDData.C_SIZE_MULT + 2)); - } - - //For >=2G card, BlockSize may be 1K, but the transfer size is 512 bytes. - if (*BlockSize > 512) { - *NumBlocks = MultU64x32(*NumBlocks, *BlockSize/2); - *BlockSize = 512; - } - - DEBUG ((EFI_D_ERROR, "Card type: 0x%x, BlockSize: 0x%x, NumBlocks: 0x%x\n", gCardInfo.CardType, *BlockSize, *NumBlocks)); -} - - -VOID -CalculateCardCLKD ( - UINTN *ClockFrequencySelect - ) -{ - UINT8 MaxDataTransferRate; - UINTN TransferRateValue = 0; - UINTN TimeValue = 0 ; - UINTN Frequency = 0; - - MaxDataTransferRate = gCardInfo.CSDData.TRAN_SPEED; - - DEBUG((EFI_D_INFO, "SDHC::CalculateCardCLKD : 0x%x.\n", MaxDataTransferRate)); - - // For SD Cards we would need to send CMD6 to set - // speeds abouve 25MHz. High Speed mode 50 MHz and up - - //Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED) - switch (MaxDataTransferRate & 0x7) { - case 0: - TransferRateValue = 100 * 1000; - break; - - case 1: - TransferRateValue = 1 * 1000 * 1000; - break; - - case 2: - TransferRateValue = 10 * 1000 * 1000; - break; - - case 3: - TransferRateValue = 100 * 1000 * 1000; - break; - - default: - DEBUG((EFI_D_ERROR, "Invalid parameter.\n")); - ASSERT(FALSE); - } - - //Calculate Time value (Bits 6:3 of TRAN_SPEED) - switch ((MaxDataTransferRate >> 3) & 0xF) { - case 1: - TimeValue = 10; - break; - - case 2: - TimeValue = 12; - break; - - case 3: - TimeValue = 13; - break; - - case 4: - TimeValue = 15; - break; - - case 5: - TimeValue = 20; - break; - - case 6: - TimeValue = 25; - break; - - case 7: - TimeValue = 30; - break; - - case 8: - TimeValue = 35; - break; - - case 9: - TimeValue = 40; - break; - - case 10: - TimeValue = 45; - break; - - case 11: - TimeValue = 50; - break; - - case 12: - TimeValue = 55; - break; - - case 13: - TimeValue = 60; - break; - - case 14: - TimeValue = 70; - break; - - case 15: - TimeValue = 80; - break; - - default: - DEBUG((EFI_D_ERROR, "Invalid parameter.\n")); - ASSERT(FALSE); - } - - Frequency = TransferRateValue * TimeValue/10; - - //Calculate Clock divider value to program in SDHC_SYSCTL[CLKD] field. - *ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1); - - DEBUG ((EFI_D_INFO, "MaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", MaxDataTransferRate, Frequency/1000, *ClockFrequencySelect)); -} - - -VOID -GetCardConfigurationData ( - VOID - ) -{ - UINTN BlockSize; - UINTN NumBlocks; - // UINTN ClockFrequencySelect; - - //Calculate BlockSize and Total number of blocks in the detected card. - GetBlockInformation(&BlockSize, &NumBlocks); - gCardInfo.BlockSize = BlockSize; - gCardInfo.NumBlocks = NumBlocks; - - //Calculate Card clock divider value. - // CalculateCardCLKD(&ClockFrequencySelect); -// gCardInfo.ClockFrequencySelect = ClockFrequencySelect; - gCardInfo.ClockFrequencySelect = 25000000; -} - - -EFI_STATUS -InitializeSDHC ( - VOID - ) -{ - - EFI_STATUS Status; - EXYNOS_GPIO *Gpio; - UINT32 CumBaseAddr; - UINT32 SdMmcBaseAddr; - - Status = gBS->LocateProtocol(&gSamsungPlatformGpioProtocolGuid, NULL, (VOID **)&Gpio); - ASSERT_EFI_ERROR(Status); - - CumBaseAddr = PcdGet32(PcdCmuBase); - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - // Reset Host Controller - MmioWrite32((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRA); - while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRA) != 0x0); - - // Set Clock Source for using MPLL - MmioAndThenOr32 ((CumBaseAddr + CLK_SRC_FSYS_OFFSET), ~(0xF << 8), (0x6 << 8)); - - // Set GPIO for using SDMMC2 - Gpio->Set(Gpio,SD_2_CLK,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,SD_2_CMD,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,SD_2_CDn,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,SD_2_DATA0,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,SD_2_DATA1,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,SD_2_DATA2,GPIO_MODE_SPECIAL_FUNCTION_2); - Gpio->Set(Gpio,SD_2_DATA3,GPIO_MODE_SPECIAL_FUNCTION_2); - - Gpio->SetPull(Gpio,SD_2_CLK,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,SD_2_CMD,GPIO_PULL_NONE); - Gpio->SetPull(Gpio,SD_2_CDn,GPIO_PULL_UP); - Gpio->SetPull(Gpio,SD_2_DATA0,GPIO_PULL_UP); - Gpio->SetPull(Gpio,SD_2_DATA1,GPIO_PULL_UP); - Gpio->SetPull(Gpio,SD_2_DATA2,GPIO_PULL_UP); - Gpio->SetPull(Gpio,SD_2_DATA3,GPIO_PULL_UP); - - - Gpio->SetStrength(Gpio,SD_2_CLK,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,SD_2_CMD,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,SD_2_CDn,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,SD_2_DATA0,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,SD_2_DATA1,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,SD_2_DATA2,GPIO_DRV_4X); - Gpio->SetStrength(Gpio,SD_2_DATA3,GPIO_DRV_4X); - - return EFI_SUCCESS; -} - - -EFI_STATUS -PerformCardIdenfication ( - VOID - ) -{ - EFI_STATUS Status; - UINTN CmdArgument = 0; - UINTN Response = 0; - UINTN RetryCount = 0; - UINTN TempRes0,TempRes1,TempRes2,TempRes3; - BOOLEAN SDCmd8Supported = FALSE; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - //Enable interrupts. - MmioWrite32 ((SdMmcBaseAddr + INTEN_OFFSET), (CMDCOMP | TRNSCOMP | RDYFORRD | RDYFORWT | CARDINSERT | CARDREMOVE)); - - //Change clock frequency to 400KHz to fit protocol - UpdateSDHCClkFrequency(400); - - //Send CMD0 command. - Status = SendCmd (CMD0, CMD0_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "Cmd0 fails.\n")); - return Status; - } - - DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)))); - - //Send CMD8 command. (New v2.00 command for Voltage check) - //Only 2.7V - 3.6V is supported for SD2.0, only SD 2.0 card can pass. - //MMC & SD1.1 card will fail this command. - CmdArgument = CMD8_ARG; - Status = SendCmd (CMD8, CMD8_INT_EN, CmdArgument); - if (Status == EFI_SUCCESS) { - Response = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); - DEBUG ((EFI_D_INFO, "CMD8 success. CMD8 response: %x\n", Response)); - if (Response != CmdArgument) { - return EFI_DEVICE_ERROR; - } - DEBUG ((EFI_D_INFO, "Card is SD2.0\n")); - SDCmd8Supported = TRUE; //Supports high capacity. - } else { - DEBUG ((EFI_D_INFO, "CMD8 fails. Not an SD2.0 card.\n")); - } - - MmioOr32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRC); - while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRC)); - - //Poll till card is busy - while (RetryCount < MAX_RETRY_COUNT) { - //Send CMD55 command. - CmdArgument = 0; - Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument); - if (Status == EFI_SUCCESS) { - DEBUG ((EFI_D_INFO, "CMD55 success. CMD55 response: %x\n", MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)))); - gCardInfo.CardType = SD_CARD; - } else { - DEBUG ((EFI_D_ERROR, "CMD55 fails.\n")); - gCardInfo.CardType = MMC_CARD; - } - - //Send appropriate command for the card type which got detected. - if (gCardInfo.CardType == SD_CARD) { - CmdArgument = ((UINTN *) &(gCardInfo.OCRData))[0]; - - //Set HCS bit. - if (SDCmd8Supported) { - CmdArgument |= HCS; - } - - Status = SendCmd (ACMD41, ACMD41_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "ACMD41 fails.\n")); - return Status; - } - ((UINT32 *) &(gCardInfo.OCRData))[0] = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); - DEBUG ((EFI_D_INFO, "SD card detected. ACMD41 OCR: %x\n", ((UINT32 *) &(gCardInfo.OCRData))[0])); - } else if (gCardInfo.CardType == MMC_CARD) { - CmdArgument = 0; - Status = SendCmd (CMD1, CMD1_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD1 fails.\n")); - return Status; - } - Response = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); - DEBUG ((EFI_D_INFO, "MMC card detected. CMD1 response: %x\n", Response)); - - //NOTE: For now, I am skipping this since I only have an SD card. - //Compare card OCR and host OCR (Section 22.6.1.3.2.4) - return EFI_UNSUPPORTED; //For now, MMC is not supported. - } - - //Poll the card until it is out of its power-up sequence. - if (gCardInfo.OCRData.Busy == 1) { - - if (SDCmd8Supported) { - gCardInfo.CardType = SD_CARD_2; - } - - //Card is ready. Check CCS (Card capacity status) bit (bit#30). - //SD 2.0 standard card will response with CCS 0, SD high capacity card will respond with CCS 1. - if (gCardInfo.OCRData.AccessMode & BIT1) { - gCardInfo.CardType = SD_CARD_2_HIGH; - DEBUG ((EFI_D_INFO, "High capacity card.\n")); - } else { - DEBUG ((EFI_D_INFO, "Standard capacity card.\n")); - } - - break; - } - - RetryCount++; - } - - if (RetryCount == MAX_RETRY_COUNT) { - DEBUG ((EFI_D_ERROR, "Timeout error. RetryCount: %d\n", RetryCount)); - return EFI_TIMEOUT; - } - - //Read CID data. - CmdArgument = 0; - Status = SendCmd (CMD2, CMD2_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD2 fails. Status: %x\n", Status)); - return Status; - } - - DEBUG ((EFI_D_INFO, "CMD2 response: %x %x %x %x\n", MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)), \ - MmioRead32 ((SdMmcBaseAddr + RSPREG1_OFFSET)), \ - MmioRead32 ((SdMmcBaseAddr + RSPREG2_OFFSET)), \ - MmioRead32 ((SdMmcBaseAddr + RSPREG3_OFFSET)))); - - TempRes0 = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); - TempRes1 = MmioRead32 ((SdMmcBaseAddr + RSPREG1_OFFSET)); - TempRes2 = MmioRead32 ((SdMmcBaseAddr + RSPREG2_OFFSET)); - TempRes3 = MmioRead32 ((SdMmcBaseAddr + RSPREG3_OFFSET)); - - //Parse CID register data. - ParseCardCIDData(TempRes0 << 8, (TempRes1 << 8) | (TempRes0 >> 24), - (TempRes2 << 8) | (TempRes1 >> 24), (TempRes3 << 8) | (TempRes2 >> 24)); - - //Read RCA - CmdArgument = 0; - Status = SendCmd (CMD3, CMD3_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD3 fails. Status: %x\n", Status)); - return Status; - } - - //Set RCA for the detected card. RCA is CMD3 response. - gCardInfo.RCA = (MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)) >> 16); - DEBUG ((EFI_D_ERROR, "CMD3 response: RCA %x\n", gCardInfo.RCA)); - - //MMC Bus setting change after card identification. -// MmioAndThenOr32 (SDHC_PWRCON, ~(0x7<<9), SDBV30); //check if our controller voltage is 3.0v or 3.3v //wprkfgur - UpdateSDHCClkFrequency(400); //Set the clock frequency to 400KHz. - - return EFI_SUCCESS; -} - - -EFI_STATUS -GetCardSpecificData ( - VOID - ) -{ - EFI_STATUS Status; - UINTN CmdArgument; - UINTN TempRes[4],i; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - //Send CMD9 to retrieve CSD. - CmdArgument = gCardInfo.RCA << 16; - Status = SendCmd (CMD9, CMD9_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD9 fails. Status: %x\n", Status)); - return Status; - } - - TempRes[0] = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); - TempRes[1] = MmioRead32 ((SdMmcBaseAddr + RSPREG1_OFFSET)); - TempRes[2] = MmioRead32 ((SdMmcBaseAddr + RSPREG2_OFFSET)); - TempRes[3] = MmioRead32 ((SdMmcBaseAddr + RSPREG3_OFFSET)); - - //Populate 128-bit CSD register data. - for (i = 0 ; i < 4; i++) { - ((UINT32 *)&(gCardInfo.CSDData))[i] = TempRes[i] << 8; - if (i != 0) - ((UINT32 *)&(gCardInfo.CSDData))[i] |= ((TempRes[i-1] >> 24) & 0xFF); - } - - DEBUG ((EFI_D_INFO, "CMD9 response: %x %x %x %x\n", ((UINT32 *)&(gCardInfo.CSDData))[0], ((UINT32 *)&(gCardInfo.CSDData))[1], ((UINT32 *)&(gCardInfo.CSDData))[2], ((UINT32 *)&(gCardInfo.CSDData))[3])); - - //Calculate total number of blocks and max. data transfer rate supported by the detected card. - GetCardConfigurationData(); - - return Status; -} - - -EFI_STATUS -PerformCardConfiguration ( - VOID - ) -{ - UINTN CmdArgument = 0; - EFI_STATUS Status; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - //Send CMD7 - CmdArgument = gCardInfo.RCA << 16; - Status = SendCmd (CMD7, CMD7_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD7 fails. Status: %x\n", Status)); - return Status; - } - - if ((gCardInfo.CardType != UNKNOWN_CARD) && (gCardInfo.CardType != MMC_CARD)) { - // We could read SCR register, but SD Card Phys spec stats any SD Card shall - // set SCR.SD_BUS_WIDTHS to support 4-bit mode, so why bother? - - // Send ACMD6 (application specific commands must be prefixed with CMD55) - Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument); - if (!EFI_ERROR (Status)) { - // set device into 4-bit data bus mode - Status = SendCmd (ACMD6, ACMD6_INT_EN, 0x2); - if (!EFI_ERROR (Status)) { - // Set host controler into 4-bit mode - MmioOr32 ((SdMmcBaseAddr + HOSTCTL_OFFSET), WIDE4); - DEBUG ((EFI_D_INFO, "SD Memory Card set to 4-bit mode\n")); - } - } - } - - //Send CMD16 to set the block length - CmdArgument = gCardInfo.BlockSize; - Status = SendCmd (CMD16, CMD16_INT_EN, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD16 fails. Status: %x\n", Status)); - return Status; - } - - //Change SDHC clock frequency to what detected card can support. - UpdateSDHCClkFrequency(250000); //Fix the clock value temporary - //UpdateSDHCClkFrequency(gCardInfo.ClockFrequencySelect); - - return EFI_SUCCESS; -} - - -EFI_STATUS -ReadBlockData ( - IN EFI_BLOCK_IO_PROTOCOL *This, - OUT VOID *Buffer - ) -{ - UINTN MmcStatus; - UINTN *DataBuffer = Buffer; - UINTN DataSize = This->Media->BlockSize/4; - UINTN Count; - UINTN RetryCount = 0; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - //Check controller status to make sure there is no error. - while (RetryCount < MAX_RETRY_COUNT) { - do { - //Read Status. - MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); - } while(MmcStatus == 0); - - //Check if Buffer read ready (RDYFORRD) bit is set? - if (MmcStatus & RDYFORRD) { - - //Clear RDYFORRD bit - MmioOr32 ((SdMmcBaseAddr + INTSTS_OFFSET), RDYFORRD); - - //Read block worth of data. - for (Count = 0; Count < DataSize; Count++) { - *DataBuffer++ = MmioRead32 ((SdMmcBaseAddr + BDATA_OFFSET)); - } - break; - } - RetryCount++; - } - - if (RetryCount == MAX_RETRY_COUNT) { - return EFI_TIMEOUT; - } - - return EFI_SUCCESS; -} - - -EFI_STATUS -WriteBlockData ( - IN EFI_BLOCK_IO_PROTOCOL *This, - OUT VOID *Buffer - ) -{ - UINTN MmcStatus; - UINTN *DataBuffer = Buffer; - UINTN DataSize = This->Media->BlockSize/4; - UINTN Count; - UINTN RetryCount = 0; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - //Check controller status to make sure there is no error. - while (RetryCount < MAX_RETRY_COUNT) { - do { - //Read Status. - MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); - } while(MmcStatus == 0); - - //Check if Buffer write ready (RDYFORWT) bit is set? - if (MmcStatus & RDYFORWT) { - - //Clear RDYFORWT bit - MmioOr32 ((SdMmcBaseAddr + INTSTS_OFFSET), RDYFORWT); - - //Write block worth of data. - for (Count = 0; Count < DataSize; Count++) { - MmioWrite32 ((SdMmcBaseAddr + BDATA_OFFSET), *DataBuffer++); - } - - break; - } - RetryCount++; - } - - if (RetryCount == MAX_RETRY_COUNT) { - return EFI_TIMEOUT; - } - - return EFI_SUCCESS; -} - - -EFI_STATUS -TransferBlock ( - IN EFI_BLOCK_IO_PROTOCOL *This, - IN UINTN Lba, - IN OUT VOID *Buffer, - IN OPERATION_TYPE OperationType - ) -{ - EFI_STATUS Status; - UINTN MmcStatus; - UINTN RetryCount = 0; - UINTN Cmd = 0; - UINTN CmdInterruptEnable = 0; - UINTN CmdArgument = 0; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - DEBUG ((EFI_D_INFO, "SDHC::TransferBlock : Lba = %d, Buffer = 0x%x, Type = %d\n", Lba, Buffer, OperationType)); - //Populate the command information based on the operation type. - if (OperationType == READ) { - Cmd = CMD17; //Single block read - CmdInterruptEnable = CMD17_INT_EN; - PrepareTransfer(CardtoHost, 1); - } else if (OperationType == WRITE) { - Cmd = CMD24; //Single block write - CmdInterruptEnable = CMD24_INT_EN; - PrepareTransfer(HosttoCard, 1); - } - - //Set command argument based on the card access mode (Byte mode or Block mode) - if (gCardInfo.OCRData.AccessMode & BIT1) { - CmdArgument = Lba; - } else { - CmdArgument = Lba * This->Media->BlockSize; - } - - //Send Command. - Status = SendCmd (Cmd, CmdInterruptEnable, CmdArgument); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "CMD fails. Status: %x\n", Status)); - return Status; - } - - //Read or Write data. - if (OperationType == READ) { - Status = ReadBlockData (This, Buffer); - if (EFI_ERROR(Status)) { - DEBUG((EFI_D_ERROR, "ReadBlockData fails.\n")); - return Status; - } - } else if (OperationType == WRITE) { - Status = WriteBlockData (This, Buffer); - if (EFI_ERROR(Status)) { - DEBUG((EFI_D_ERROR, "WriteBlockData fails.\n")); - return Status; - } - } - - //Check for the Transfer completion. - while (RetryCount < MAX_RETRY_COUNT) { - //Read Status - do { - MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); - } while (MmcStatus == 0); - - //Check if Transfer complete (TRNSCOMP) bit is set? - if (MmcStatus & TRNSCOMP) { - break; - } else { - DEBUG ((EFI_D_INFO, "MmcStatus for TRNSCOMP: %x\n", MmcStatus)); - //Check if DATAEBITERR, DATACRCERR or DATATOUTERR interrupt occured. - if ((MmcStatus & DATAEBITERR) | (MmcStatus & DATACRCERR) | (MmcStatus & DATATOUTERR)) { - //There was an error during the data transfer. - - //Set SRD bit to 1 and wait until it return to 0x0. - MmioOr32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRD); - while((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRD) != 0x0); - - return EFI_DEVICE_ERROR; - } - } - RetryCount++; - } - - if (RetryCount == MAX_RETRY_COUNT) { - DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n")); - return EFI_TIMEOUT; - } - - return EFI_SUCCESS; -} - -BOOLEAN -CardPresent ( - VOID - ) -{ - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - if (MmioRead32((SdMmcBaseAddr + PRNSTS_OFFSET)) & INSCARD) - return TRUE; - else - return FALSE; -} - -EFI_STATUS -DetectCard ( - VOID - ) -{ - EFI_STATUS Status; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - if (!CardPresent ()) { - return EFI_NO_MEDIA; - } - - //Initialize MMC host controller clocks. - Status = InitializeSDHC (); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "Initialize MMC host controller fails. Status: %x\n", Status)); - return Status; - } - - //Soft reset for all. - MmioWrite32((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRA); - while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRA) != 0x0); - - //Set the clock frequency to 400KHz. - UpdateSDHCClkFrequency (400); - - //Card idenfication - Status = PerformCardIdenfication (); - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "No MMC/SD card detected.\n")); - return Status; - } - - //Get CSD (Card specific data) for the detected card. - Status = GetCardSpecificData(); - if (EFI_ERROR(Status)) { - return Status; - } - - //Configure the card in data transfer mode. - Status = PerformCardConfiguration(); - if (EFI_ERROR(Status)) { - return Status; - } - - //Patch the Media structure. - gSDHCMedia.LastBlock = (gCardInfo.NumBlocks - 1); - gSDHCMedia.BlockSize = gCardInfo.BlockSize; - gSDHCMedia.ReadOnly = 0; - gSDHCMedia.MediaPresent = TRUE; - gSDHCMedia.MediaId++; - - DEBUG ((EFI_D_INFO, "SD Card Media Change on Handle 0x%08x\n", gImageHandle)); - - return Status; -} - -#define MAX_SDHC_TRANSFER_SIZE 0x4000 - -EFI_STATUS -SdReadWrite ( - IN EFI_BLOCK_IO_PROTOCOL *This, - IN UINTN Lba, - OUT VOID *Buffer, - IN UINTN BufferSize, - IN OPERATION_TYPE OperationType - ) -{ - EFI_STATUS Status = EFI_SUCCESS; - UINTN RetryCount = 0; - UINTN BlockCount; - UINTN BytesToBeTranferedThisPass = 0; - UINTN BytesRemainingToBeTransfered; - EFI_TPL OldTpl; - BOOLEAN Update; - UINT32 SdMmcBaseAddr; - - SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); - - Update = FALSE; - - DEBUG ((EFI_D_INFO, "SDHC::SDHCInitialize is called \n")); - if (gMediaChange) { - Update = TRUE; - Status = DetectCard(); - if (EFI_ERROR (Status)) { - DEBUG ((EFI_D_ERROR, "SDHC::SDHCInitialize:Card Detect Fail\n")); - gSDHCMedia.MediaPresent = FALSE; - gSDHCMedia.LastBlock = 0; - gSDHCMedia.BlockSize = 512; // Should be zero but there is a bug in DiskIo - gSDHCMedia.ReadOnly = FALSE; - } - gMediaChange = FALSE; - } else if (!gSDHCMedia.MediaPresent) { - Status = EFI_NO_MEDIA; - goto Done; - } - - if (Update) { - DEBUG ((EFI_D_INFO, "SD Card ReinstallProtocolInterface ()\n")); - gBS->ReinstallProtocolInterface ( - - gImageHandle, - - &gEfiBlockIoProtocolGuid, - - &gBlockIo, - - &gBlockIo - - ); - } -DEBUG ((EFI_D_INFO, "SDHC::SDHCInitialize:CardInfo : LastBlock = %ld, BlockSize = %d\n", gSDHCMedia.LastBlock, gSDHCMedia.BlockSize)); - - - if (Buffer == NULL) { - Status = EFI_INVALID_PARAMETER; - goto Done; - } - - if (Lba > This->Media->LastBlock) { - Status = EFI_INVALID_PARAMETER; - goto Done; - } - - if ((BufferSize % This->Media->BlockSize) != 0) { - Status = EFI_BAD_BUFFER_SIZE; - goto Done; - } - - //Check if the data lines are not in use. - while ((RetryCount++ < MAX_RETRY_COUNT) && (MmioRead32 ((SdMmcBaseAddr + PRNSTS_OFFSET)) & CMDINHDAT)); - if (RetryCount == MAX_RETRY_COUNT) { - Status = EFI_TIMEOUT; - goto Done; - } - - OldTpl = gBS->RaiseTPL (TPL_NOTIFY); - - BytesRemainingToBeTransfered = BufferSize; - while (BytesRemainingToBeTransfered > 0) { - // Turn OFF DMA path until it is debugged - // BytesToBeTranferedThisPass = (BytesToBeTranferedThisPass >= MAX_SDHC_TRANSFER_SIZE) ? MAX_SDHC_TRANSFER_SIZE : BytesRemainingToBeTransfered; - BytesToBeTranferedThisPass = This->Media->BlockSize; - - BlockCount = BytesToBeTranferedThisPass/This->Media->BlockSize; - - if (BlockCount > 1) { -// Status = DmaBlocks (This, Lba, Buffer, BlockCount, OperationType); - } else { - //Transfer a block worth of data. - Status = TransferBlock (This, Lba, Buffer, OperationType); - - } - - if (EFI_ERROR(Status)) { - DEBUG ((EFI_D_ERROR, "TransferBlockData fails. %x\n", Status)); - goto DoneRestoreTPL; - } - - BytesRemainingToBeTransfered -= BytesToBeTranferedThisPass; - Lba += BlockCount; - Buffer = (UINT8 *)Buffer + This->Media->BlockSize; - } - -DoneRestoreTPL: - - gBS->RestoreTPL (OldTpl); - -Done: - - return Status; - -} - - -/** - - Reset the Block Device. - - - - @param This Indicates a pointer to the calling context. - - @param ExtendedVerification Driver may perform diagnostics on reset. - - - - @retval EFI_SUCCESS The device was reset. - - @retval EFI_DEVICE_ERROR The device is not functioning properly and could - - not be reset. - - - -**/ -EFI_STATUS -EFIAPI -SDHCReset ( - IN EFI_BLOCK_IO_PROTOCOL *This, - IN BOOLEAN ExtendedVerification - ) -{ - DEBUG ((EFI_D_INFO, " SDHC::SDHCReset is called\n")); - return EFI_SUCCESS; -} - - -/** - - Read BufferSize bytes from Lba into Buffer. - - - - @param This Indicates a pointer to the calling context. - - @param MediaId Id of the media, changes every time the media is replaced. - - @param Lba The starting Logical Block Address to read from - - @param BufferSize Size of Buffer, must be a multiple of device block size. - - @param Buffer A pointer to the destination buffer for the data. The caller is - - responsible for either having implicit or explicit ownership of the buffer. - - - - @retval EFI_SUCCESS The data was read correctly from the device. - - @retval EFI_DEVICE_ERROR The device reported an error while performing the read. - - @retval EFI_NO_MEDIA There is no media in the device. - - @retval EFI_MEDIA_CHANGED The MediaId does not matched the current device. - - @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device. - - @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid, - - or the buffer is not on proper alignment. - -EFI_STATUS - -**/ -EFI_STATUS -EFIAPI -SDHCReadBlocks ( - IN EFI_BLOCK_IO_PROTOCOL *This, - IN UINT32 MediaId, - IN EFI_LBA Lba, - IN UINTN BufferSize, - OUT VOID *Buffer - ) -{ - EFI_STATUS Status; - - DEBUG ((EFI_D_INFO, "SDHC::SDHCWriteBlocks : MediaId = %d, Lba = %d, BufferSize = %d, Buffer = 0x%x\n", - MediaId, (UINTN)Lba, BufferSize, Buffer)); - //Perform Read operation. - Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, READ); - - return Status; - -} - - -/** - - Write BufferSize bytes from Lba into Buffer. - - - - @param This Indicates a pointer to the calling context. - - @param MediaId The media ID that the write request is for. - - @param Lba The starting logical block address to be written. The caller is - - responsible for writing to only legitimate locations. - - @param BufferSize Size of Buffer, must be a multiple of device block size. - - @param Buffer A pointer to the source buffer for the data. - - - - @retval EFI_SUCCESS The data was written correctly to the device. - - @retval EFI_WRITE_PROTECTED The device can not be written to. - - @retval EFI_DEVICE_ERROR The device reported an error while performing the write. - - @retval EFI_NO_MEDIA There is no media in the device. - - @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device. - - @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device. - - @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid, - - or the buffer is not on proper alignment. - - - -**/ -EFI_STATUS -EFIAPI -SDHCWriteBlocks ( - IN EFI_BLOCK_IO_PROTOCOL *This, - IN UINT32 MediaId, - IN EFI_LBA Lba, - IN UINTN BufferSize, - IN VOID *Buffer - ) -{ - EFI_STATUS Status; - - DEBUG ((EFI_D_INFO, "SDHC::SDHCWriteBlocks : MediaId = %d, Lba = %d, BufferSize = %d, Buffer = 0x%x\n", - MediaId, (UINTN)Lba, BufferSize, Buffer)); - //Perform write operation. - Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, WRITE); - - - return Status; - -} - - -/** - - Flush the Block Device. - - - - @param This Indicates a pointer to the calling context. - - - - @retval EFI_SUCCESS All outstanding data was written to the device - - @retval EFI_DEVICE_ERROR The device reported an error while writting back the data - - @retval EFI_NO_MEDIA There is no media in the device. - - - -**/ -EFI_STATUS -EFIAPI -SDHCFlushBlocks ( - IN EFI_BLOCK_IO_PROTOCOL *This - ) -{ - DEBUG ((EFI_D_INFO, "SDHC::SDHCFlushBlocks is called\n")); - return EFI_SUCCESS; -} - - -EFI_BLOCK_IO_PROTOCOL gBlockIo = { - EFI_BLOCK_IO_INTERFACE_REVISION, // Revision - &gSDHCMedia, // *Media - SDHCReset, // Reset - SDHCReadBlocks, // ReadBlocks - SDHCWriteBlocks, // WriteBlocks - SDHCFlushBlocks // FlushBlocks -}; - - -/** - - Timer callback to convert card present hardware into a boolean that indicates - - a media change event has happened. If you just check the GPIO you could see - - card 1 and then check again after card 1 was removed and card 2 was inserted - - and you would still see media present. Thus you need the timer tick to catch - - the toggle event. - - - - @param Event Event whose notification function is being invoked. - - @param Context The pointer to the notification function's context, - - which is implementation-dependent. Not used. - - - -**/ -VOID -EFIAPI -TimerCallback ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - BOOLEAN Present; - - DEBUG ((EFI_D_INFO, "SDHC::TimerCallBack is called\n")); - Present = CardPresent (); - if (gSDHCMedia.MediaPresent) { - if (!Present && !gMediaChange) { - gMediaChange = TRUE; - } - } else { - if (Present && !gMediaChange) { - gMediaChange = TRUE; - } - } -} - - -EFI_STATUS -EFIAPI -SDHCInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - ZeroMem (&gCardInfo, sizeof (CARD_INFO)); - - Status = gBS->CreateEvent (EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK, TimerCallback, NULL, &gTimerEvent); - ASSERT_EFI_ERROR (Status); - - Status = gBS->SetTimer (gTimerEvent, TimerPeriodic, 1000000); - ASSERT_EFI_ERROR (Status); - - //Publish BlockIO. - Status = gBS->InstallMultipleProtocolInterfaces ( - &ImageHandle, - &gEfiBlockIoProtocolGuid, &gBlockIo, - &gEfiDevicePathProtocolGuid, &gSDHCDevicePath, - NULL - ); - return Status; -} diff --git a/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.h b/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.h deleted file mode 100755 index 849a0e0cc..000000000 --- a/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.h +++ /dev/null @@ -1,293 +0,0 @@ -/** @file - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef _SDHCDXE_H_ -#define _SDHCDXE_H_ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -/* SDHC Register MAP */ -#define BLKSIZE_OFFSET (0x04) -#define BLKCNT_OFFSET (0x04) //only use [16:31] -#define BLEN_512BYTES (0x200UL << 0) - -#define ARGUMENT_OFFSET (0x08) -#define TRNMOD_OFFSET (0x0C) -#define CMDREG_OFFSET (0x0C) //only use [16:31] -#define ENDMA BIT0 -#define ENBLKCNT BIT1 -#define RD1WT0 BIT4 -#define MUL1SIN0 BIT5 -#define RSPTYP136 (0x1 << 16) -#define RSPTYP48 (0x2 << 16) -#define RSPTYP48B (0x3 << 16) -#define ENCMDCRC BIT19 -#define ENCMDIDX BIT20 -#define DATAPRNT BIT21 -#define INDX(CMD_INDX) ((CMD_INDX & 0x3F) << 24) - -#define RSPREG0_OFFSET (0x10) -#define RSPREG1_OFFSET (0x14) -#define RSPREG2_OFFSET (0x18) -#define RSPREG3_OFFSET (0x1C) -#define BDATA_OFFSET (0x20) -#define PRNSTS_OFFSET (0x24) -#define CMDINHCMD BIT0 -#define CMDINHDAT BIT1 -#define INSCARD BIT16 - -#define HOSTCTL_OFFSET (0x28) -#define PWRCON_OFFSET (0x28) //only use [8:15] -#define WIDE4 BIT1 -#define SDBP BIT8 -#define SDBV18 (0x5 << 9) -#define SDBV30 (0x6 << 9) -#define SDBV33 (0x7 << 9) - -#define CLKCON_OFFSET (0x2C) -#define TIMEOUTCON_OFFSET (0x2C) //only use [16:23] -#define SDHC_SWRST_OFFSET (0x2C) //only use [24:31] -#define ICE BIT0 -#define ICS BIT1 -#define CCE BIT2 -#define CCS BIT3 -#define SRA BIT24 -#define SRC BIT25 -#define SRD BIT26 - -#define INTSTS_OFFSET (0x30) -#define INTEN_OFFSET (0x34) -#define CMDCOMP BIT0 -#define TRNSCOMP BIT1 -#define RDYFORWT BIT4 -#define RDYFORRD BIT5 -#define CARDINSERT BIT6 -#define CARDREMOVE BIT7 -#define ERRINT BIT15 -#define CMDTOUTERR BIT16 -#define CMDCRCERR BIT17 -#define CMDEBITERR BIT18 -#define CMDIDXERR BIT19 -#define DATATOUTERR BIT20 -#define DATACRCERR BIT21 -#define DATAEBITERR BIT22 - -#define HosttoCard 0x1 -#define CardtoHost 0x0 - -/* Command Definitions */ -#define CMD0 INDX(0) -#define CMD0_INT_EN (CMDCOMP | CMDEBITERR) - -#define CMD1 (INDX(1) | RSPTYP48) -#define CMD1_INT_EN (CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD2 (INDX(2) | ENCMDCRC | RSPTYP136) -#define CMD2_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD3 (INDX(3) | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD3_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD5 (INDX(5) | RSPTYP48) -#define CMD5_INT_EN (CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD7 (INDX(7) | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD7_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD8 (INDX(8) | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD8_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) -//Reserved(0)[12:31], Supply voltage(1)[11:8], check pattern(0xCE)[7:0] = 0x1CE -#define CMD8_ARG (0x0UL << 12 | BIT8 | 0xCEUL << 0) - -#define CMD9 (INDX(9) | ENCMDCRC | RSPTYP136) -#define CMD9_INT_EN (CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD16 (INDX(16) | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD16_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD17 (INDX(17) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48 | RD1WT0) -#define CMD17_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORRD | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) - -#define CMD18 (INDX(18) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48 | MUL1SIN0 | RD1WT0 | ENBLKCNT | ENDMA) -#define CMD18_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORRD | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) - -#define CMD23 (INDX(23) | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD23_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define CMD24 (INDX(24) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD24_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORWT | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) - -#define CMD25 (INDX(25) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48 | MUL1SIN0 | ENBLKCNT | ENDMA) -#define CMD25_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORWT | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) - -#define CMD55 (INDX(55) | ENCMDIDX | ENCMDCRC | RSPTYP48) -#define CMD55_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define ACMD41 (INDX(41) | RSPTYP48) -#define ACMD41_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - -#define ACMD6 (INDX(6) | RSPTYP48) -#define ACMD6_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) - - -#define HCS BIT30 //Host capacity support/1 = Supporting high capacity - -#define MAX_RETRY_COUNT (100000) -#define MMC_REFERENCE_CLK (96000000) - -typedef struct { - UINT32 Reserved0: 7; // 0 - UINT32 V170_V195: 1; // 1.70V - 1.95V - UINT32 V200_V260: 7; // 2.00V - 2.60V - UINT32 V270_V360: 9; // 2.70V - 3.60V - UINT32 RESERVED_1: 5; // Reserved - UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode) - UINT32 Busy: 1; // This bit is set to LOW if the card has not finished the power up routine -}OCR; - -typedef struct { - UINT32 NOT_USED; // 1 [0:0] - UINT32 CRC; // CRC7 checksum [7:1] - UINT32 MDT; // Manufacturing date [19:8] - UINT32 RESERVED_1; // Reserved [23:20] - UINT32 PSN; // Product serial number [55:24] - UINT8 PRV; // Product revision [63:56] - UINT8 PNM[5]; // Product name [64:103] - UINT16 OID; // OEM/Application ID [119:104] - UINT8 MID; // Manufacturer ID [127:120] -}CID; - -typedef struct { - UINT8 NOT_USED: 1; // Not used, always 1 [0:0] - UINT8 CRC: 7; // CRC [7:1] - - UINT8 RESERVED_1: 2; // Reserved [9:8] - UINT8 FILE_FORMAT: 2; // File format [11:10] - UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12] - UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13] - UINT8 COPY: 1; // Copy flag (OTP) [14:14] - UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15] - - UINT16 RESERVED_2: 5; // Reserved [20:16] - UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21] - UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22] - UINT16 R2W_FACTOR: 3; // Write speed factor [28:26] - UINT16 RESERVED_3: 2; // Reserved [30:29] - UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31] - - UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32] - UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39] - UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46] - UINT32 C_SIZE_MULT: 3; // Device size multiplier [49:47] - UINT32 VDD_W_CURR_MAX: 3; // Max. write current @ VDD max [52:50] - UINT32 VDD_W_CURR_MIN: 3; // Max. write current @ VDD min [55:53] - UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56] - UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59] - UINT32 C_SIZELow2: 2; // Device size [63:62] - - UINT32 C_SIZEHigh10: 10;// Device size [73:64] - UINT32 RESERVED_4: 2; // Reserved [75:74] - UINT32 DSR_IMP: 1; // DSR implemented [76:76] - UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77] - UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78] - UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79] - UINT32 READ_BL_LEN: 4; // Max. read data block length [83:80] - UINT32 CCC: 12;// Card command classes [95:84] - - UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96] - UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104] - UINT8 TAAC ; // Data read access-time 1 [119:112] - - UINT8 RESERVED_5: 6; // Reserved [125:120] - UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126] -}CSD; - -typedef struct { - UINT8 NOT_USED: 1; // Not used, always 1 [0:0] - UINT8 CRC: 7; // CRC [7:1] - UINT8 RESERVED_1: 2; // Reserved [9:8] - UINT8 FILE_FORMAT: 2; // File format [11:10] - UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12] - UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13] - UINT8 COPY: 1; // Copy flag (OTP) [14:14] - UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15] - UINT16 RESERVED_2: 5; // Reserved [20:16] - UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21] - UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22] - UINT16 R2W_FACTOR: 3; // Write speed factor [28:26] - UINT16 RESERVED_3: 2; // Reserved [30:29] - UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31] - UINT16 WP_GRP_SIZE: 7; // Write protect group size [38:32] - UINT16 SECTOR_SIZE: 7; // Erase sector size [45:39] - UINT16 ERASE_BLK_EN: 1; // Erase single block enable [46:46] - UINT16 RESERVED_4: 1; // Reserved [47:47] - UINT32 C_SIZELow16: 16;// Device size [69:48] - UINT32 C_SIZEHigh6: 6; // Device size [69:48] - UINT32 RESERVED_5: 6; // Reserved [75:70] - UINT32 DSR_IMP: 1; // DSR implemented [76:76] - UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77] - UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78] - UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79] - UINT16 READ_BL_LEN: 4; // Max. read data block length [83:80] - UINT16 CCC: 12;// Card command classes [95:84] - UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96] - UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104] - UINT8 TAAC ; // Data read access-time 1 [119:112] - UINT8 RESERVED_6: 6; // 0 [125:120] - UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126] -}CSD_SDV2; - -typedef enum { - UNKNOWN_CARD, - MMC_CARD, //MMC card - SD_CARD, //SD 1.1 card - SD_CARD_2, //SD 2.0 or above standard card - SD_CARD_2_HIGH //SD 2.0 or above high capacity card -} CARD_TYPE; - -typedef enum { - READ, - WRITE -} OPERATION_TYPE; - -typedef struct { - UINT16 RCA; - UINTN BlockSize; - UINTN NumBlocks; - UINTN ClockFrequencySelect; - CARD_TYPE CardType; - OCR OCRData; - CID CIDData; - CSD CSDData; -} CARD_INFO; - -EFI_STATUS -DetectCard ( - VOID - ); - -extern EFI_BLOCK_IO_PROTOCOL gBlockIo; - -#endif diff --git a/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf b/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf deleted file mode 100755 index 70ac23011..000000000 --- a/SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf +++ /dev/null @@ -1,49 +0,0 @@ -#/** @file -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = SDHCDxe - FILE_GUID = e7c3d754-8688-4586-b38f-4ae9b74b8ff1 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = SDHCInitialize - - -[Sources.common] - SDHCDxe.c - -[Packages] - MdePkg/MdePkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - SamsungPlatformPkg/SamsungPlatformPkg.dec - -[LibraryClasses] - UefiDriverEntryPoint - IoLib - TimerLib - -[Guids] - -[Protocols] - gEfiBlockIoProtocolGuid - gEfiDevicePathProtocolGuid - gSamsungPlatformGpioProtocolGuid ## GPIO Protocol - -[FixedPcd] - gExynosPkgTokenSpaceGuid.PcdCmuBase - gExynosPkgTokenSpaceGuid.PcdSdMmcBase - -[Depex] - TRUE diff --git a/SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.c b/SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.c deleted file mode 100755 index ea245343d..000000000 --- a/SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.c +++ /dev/null @@ -1,432 +0,0 @@ -/** @file - Template for Timer Architecture Protocol driver of the ARM flavor - - Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include - -// The notification function to call on every timer interrupt. -volatile EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL; -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; - -// The current period of the timer interrupt -volatile UINT64 mTimerPeriod = 0; - -// Cached copy of the Hardware Interrupt protocol instance -EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; - -// Cached interrupt vector -UINTN gVector; - -UINT32 mLastTickCount; - -/** - - C Interrupt Handler called in the interrupt context when Source interrupt is active. - - - @param Source Source of the interrupt. Hardware routing off a specific platform defines - what source means. - - @param SystemContext Pointer to system register context. Mostly used by debuggers and will - update the system context after the return from the interrupt if - modified. Don't change these values unless you know what you are doing - -**/ -VOID -EFIAPI -TimerInterruptHandler ( - IN HARDWARE_INTERRUPT_SOURCE Source, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - EFI_TPL OriginalTPL; - UINT32 IntStatus; - UINT32 PWMTimerBase; - EFI_STATUS Status; - - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - // - // DXE core uses this callback for the EFI timer tick. The DXE core uses locks - // that raise to TPL_HIGH and then restore back to current level. Thus we need - // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. - // - OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); - - // clear the interrupt - IntStatus = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); - if(IntStatus & TIMER_STATUS_MASK(TIMER_0)){ - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_0))); - Status = RETURN_SUCCESS; - DEBUG ((EFI_D_INFO, "\nTimer 0 ISR\n")); - } - if(IntStatus & TIMER_STATUS_MASK(TIMER_1)){ - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_1))); - Status = RETURN_SUCCESS; - DEBUG ((EFI_D_INFO, "\nTimer 1 ISR\n")); - } - if(IntStatus & TIMER_STATUS_MASK(TIMER_2)){ - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_2))); - Status = RETURN_SUCCESS; - DEBUG ((EFI_D_INFO, "\nTimer 2 ISR\n")); - } - if(IntStatus & TIMER_STATUS_MASK(TIMER_3)){ - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_3))); - Status = RETURN_SUCCESS; - DEBUG ((EFI_D_INFO, "\nTimer 3 ISR\n")); - } - if(IntStatus & TIMER_STATUS_MASK(TIMER_4)){ - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_4))); - Status = RETURN_SUCCESS; - DEBUG ((EFI_D_INFO, "\nTimer 4 ISR\n")); - } - if(EFI_ERROR(Status)){ - Status = RETURN_UNSUPPORTED; - ASSERT_EFI_ERROR(FALSE); - } - // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers - gInterrupt->EndOfInterrupt (gInterrupt, Source); - - if (mTimerNotifyFunction) { - mTimerNotifyFunction (mTimerPeriod); - } - - gBS->RestoreTPL (OriginalTPL); -} - -/** - This function registers the handler NotifyFunction so it is called every time - the timer interrupt fires. It also passes the amount of time since the last - handler call to the NotifyFunction. If NotifyFunction is NULL, then the - handler is unregistered. If the handler is registered, then EFI_SUCCESS is - returned. If the CPU does not support registering a timer interrupt handler, - then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler - when a handler is already registered, then EFI_ALREADY_STARTED is returned. - If an attempt is made to unregister a handler when a handler is not registered, - then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to - register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR - is returned. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param NotifyFunction The function to call when a timer interrupt fires. This - function executes at TPL_HIGH_LEVEL. The DXE Core will - register a handler for the timer interrupt, so it can know - how much time has passed. This information is used to - signal timer based events. NULL will unregister the handler. - @retval EFI_SUCCESS The timer handler was registered. - @retval EFI_UNSUPPORTED The platform does not support timer interrupts. - @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already - registered. - @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not - previously registered. - @retval EFI_DEVICE_ERROR The timer handler could not be registered. - -**/ -EFI_STATUS -EFIAPI -TimerDriverRegisterHandler ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN EFI_TIMER_NOTIFY NotifyFunction - ) -{ - if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) { - return EFI_INVALID_PARAMETER; - } - - if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) { - return EFI_ALREADY_STARTED; - } - - DEBUG ((EFI_D_INFO, "Handler Registered Successfully\n")); - mTimerNotifyFunction = NotifyFunction; - - return EFI_SUCCESS; -} - -/** - Make sure all ArrmVe Timers are disabled -**/ -VOID -EFIAPI -ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - UINT32 PWMTimerBase; - - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - // All PWM timer is off - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), 0); - DEBUG ((EFI_D_INFO, "\nTimer Exit\n")); -} - -/** - - This function adjusts the period of timer interrupts to the value specified - by TimerPeriod. If the timer period is updated, then the selected timer - period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If - the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. - If an error occurs while attempting to update the timer period, then the - timer hardware will be put back in its state prior to this call, and - EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt - is disabled. This is not the same as disabling the CPU's interrupts. - Instead, it must either turn off the timer hardware, or it must adjust the - interrupt controller so that a CPU interrupt is not generated when the timer - interrupt fires. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If - the timer hardware is not programmable, then EFI_UNSUPPORTED is - returned. If the timer is programmable, then the timer period - will be rounded up to the nearest timer period that is supported - by the timer hardware. If TimerPeriod is set to 0, then the - timer interrupts will be disabled. - - - @retval EFI_SUCCESS The timer period was changed. - @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. - @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. - -**/ -EFI_STATUS -EFIAPI -TimerDriverSetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN UINT64 TimerPeriod - ) -{ - EFI_STATUS Status; - UINT64 TimerTicks; - UINT32 rwVal; - UINT32 PWMTimerBase; - - DEBUG ((EFI_D_INFO, "\nSetTimer called\n")); - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - // Stop PWM timer 0 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET),STOP_TIMER_VAL(TIMER_0)); - - if (TimerPeriod == 0) { - // leave timer disabled from above, and... - rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(rwVal & ~TIMER_INTR_MASK(TIMER_0))); - // disable timer 0/1 interrupt for a TimerPeriod of 0 - Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); - } else { - // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10) - TimerTicks = DivU64x32 (TimerPeriod, 10); - // if it's larger than 32-bits, pin to highest value - if (TimerTicks > 0xffffffff) { - TimerTicks = 0xffffffff; - } - - // PWM Timer 0 used by Period counter with Auto re-load mode - MmioWrite32 ((PWMTimerBase + PWM_TCNTB0_OFFSET), TimerTicks); - // Set and Clear PWM Manually update for Timer 0 - rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_0)); - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_0)); - - // Set Auto re-load and start Timer - MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | RELOAD_AND_START(TIMER_0)); - - //PWM Timer0 INT enable - rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); - MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET), rwVal | TIMER_INTR_MASK(TIMER_0) ); - - Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector); - } - - // Save the new timer period - mTimerPeriod = TimerPeriod; - return Status; -} - -/** - This function retrieves the period of timer interrupts in 100 ns units, - returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod - is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is - returned, then the timer is currently disabled. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If - 0 is returned, then the timer is currently disabled. - - - @retval EFI_SUCCESS The timer period was returned in TimerPeriod. - @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - OUT UINT64 *TimerPeriod - ) -{ - if (TimerPeriod == NULL) { - return EFI_INVALID_PARAMETER; - } - - *TimerPeriod = mTimerPeriod; - return EFI_SUCCESS; -} - -/** - This function generates a soft timer interrupt. If the platform does not support soft - timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. - If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() - service, then a soft timer interrupt will be generated. If the timer interrupt is - enabled when this service is called, then the registered handler will be invoked. The - registered handler should not be able to distinguish a hardware-generated timer - interrupt from a software-generated timer interrupt. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS The soft timer interrupt was generated. - @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGenerateSoftInterrupt ( - IN EFI_TIMER_ARCH_PROTOCOL *This - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Interface structure for the Timer Architectural Protocol. - - @par Protocol Description: - This protocol provides the services to initialize a periodic timer - interrupt, and to register a handler that is called each time the timer - interrupt fires. It may also provide a service to adjust the rate of the - periodic timer interrupt. When a timer interrupt occurs, the handler is - passed the amount of time that has passed since the previous timer - interrupt. - - @param RegisterHandler - Registers a handler that will be called each time the - timer interrupt fires. TimerPeriod defines the minimum - time between timer interrupts, so TimerPeriod will also - be the minimum time between calls to the registered - handler. - - @param SetTimerPeriod - Sets the period of the timer interrupt in 100 nS units. - This function is optional, and may return EFI_UNSUPPORTED. - If this function is supported, then the timer period will - be rounded up to the nearest supported timer period. - - - @param GetTimerPeriod - Retrieves the period of the timer interrupt in 100 nS units. - - @param GenerateSoftInterrupt - Generates a soft timer interrupt that simulates the firing of - the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for - a period of time. - -**/ -EFI_TIMER_ARCH_PROTOCOL gTimer = { - TimerDriverRegisterHandler, - TimerDriverSetTimerPeriod, - TimerDriverGetTimerPeriod, - TimerDriverGenerateSoftInterrupt -}; - - -/** - Initialize the state information for the Timer Architectural Protocol and - the Timer Debug support protocol that allows the debugger to break into a - running program. - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -EFIAPI -TimerInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_HANDLE Handle = NULL; - EFI_STATUS Status; - - UINT32 Tmp; - UINT32 PWMTimerBase; - - PWMTimerBase=PcdGet32(PcdPWMTimerBase); - // Find the interrupt controller protocol. ASSERT if not found. - Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt); - ASSERT_EFI_ERROR (Status); - - // PWM Input source clock is 100Mhz and Configure 1Mhz for PWM Timer - Tmp = MmioRead32 (PWMTimerBase + PWM_TCFG0_OFFSET); - Tmp &= ~(0xFF << PRESCALE_GRP0_START_POS); - Tmp |= (PRESCALE_TIMER_GRP0 << PRESCALE_GRP0_START_POS); - MmioWrite32 ((PWMTimerBase + PWM_TCFG0_OFFSET), Tmp); - MmioWrite32 ((PWMTimerBase + PWM_TCFG1_OFFSET), 0); - - // Disable the timer - Status = TimerDriverSetTimerPeriod (&gTimer, 0); - ASSERT_EFI_ERROR (Status); - - // Install interrupt handler - gVector = PWM_TIMER0_INTERRUPT_NUM; - Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); - ASSERT_EFI_ERROR (Status); - - // PWM Timer 0 used by Period counter with Auto re-load mode - MmioWrite32 ((PWMTimerBase + PWM_TCNTB0_OFFSET), FixedPcdGet32(PcdTimerPeriod)); - Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); - ASSERT_EFI_ERROR (Status); - - // Install the Timer Architectural Protocol onto a new handle - Status = gBS->InstallMultipleProtocolInterfaces( - &Handle, - &gEfiTimerArchProtocolGuid, &gTimer, - NULL - ); - ASSERT_EFI_ERROR(Status); - - // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf b/SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf deleted file mode 100755 index 1c17c2d38..000000000 --- a/SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf +++ /dev/null @@ -1,54 +0,0 @@ -#/** @file -# -# Component discription file for Timer module -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = TimerDxe - FILE_GUID = 494ffd22-3228-4b7e-ad40-7e780fa88301 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = TimerInitialize - -[Sources.common] - TimerDxe.c - -[Packages] - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - - -[LibraryClasses] - BaseLib - IoLib - UefiBootServicesTableLib - UefiDriverEntryPoint - TimerLib - -[Guids] - -[Protocols] - gEfiTimerArchProtocolGuid - gHardwareInterruptProtocolGuid - - -[Pcd.common] - gEmbeddedTokenSpaceGuid.PcdTimerPeriod - gExynosPkgTokenSpaceGuid.PcdPWMTimerBase -[Depex] - gHardwareInterruptProtocolGuid diff --git a/SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc b/SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc deleted file mode 100644 index 21b87c542..000000000 --- a/SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc +++ /dev/null @@ -1,479 +0,0 @@ -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -################################################################################ -# -# Defines Section - statements that will be processed to create a Makefile. -# -################################################################################ -[Defines] - PLATFORM_NAME = OrigenBoard-Exynos - PLATFORM_GUID = 66a5a01d-be0a-4398-9b74-5af4a261381f - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010005 - OUTPUT_DIRECTORY = Build/OrigenBoard-Exynos - SUPPORTED_ARCHITECTURES = ARM - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf - -[LibraryClasses.common] -!if $(TARGET) == RELEASE - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf -!else - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf -!endif - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf - ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf - ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf - BaseLib|MdePkg/Library/BaseLib/BaseLib.inf - BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf - DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf - EfiResetSystemLib|SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf - EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf - EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf - PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf - PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf - - # - # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window - # in the debugger will show load and unload commands for symbols. You can cut and paste this - # into the command window to load symbols. We should be able to use a script to do this, but - # the version of RVD I have does not support scripts accessing system memory. - # - CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf - DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf - IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf - PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf - SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - UefiLib|MdePkg/Library/UefiLib/UefiLib.inf - UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf - UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf - UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf - UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf - -# -# Assume everything is fixed at build -# - ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf - CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf - DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf - DebugAgentTimerLib|SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf - EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf - EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - SerialPortLib|SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf - TimerLib|SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf - UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf - - # Samsung specific - BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf - DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf - FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf - GdbSerialLib|SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf - - # iky for usb host - HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf - UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf - UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf - -[LibraryClasses.common.SEC] - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf - ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf - ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - ArmPlatformSecLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - # L2 Cache Driver - L2X0CacheLib|ArmPlatformPkg/Drivers/PL310L2Cache/PL310L2CacheSec.inf - -!if $(EDK2_SKIP_PEICORE)==1 - PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf - ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf - LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf - MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf - HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf - PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf - PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf - MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf -!endif - -[LibraryClasses.common.PEI_CORE] - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf - ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf - OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf - # note: this won't actually work since globals in PEI are not writeable - # need to generate an ARM PEI services table pointer implementation - PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf - PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf - PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - -[LibraryClasses.common.PEIM] - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf - ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf - OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf - # note: this won't actually work since globals in PEI are not writeable - # need to generate an ARM PEI services table pointer implementation - PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf - PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf - PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf - ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - -[LibraryClasses.common.DXE_CORE] - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf - DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf - ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf - HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf - MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - -[LibraryClasses.common.DXE_DRIVER] - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf - -[LibraryClasses.common.UEFI_APPLICATION] - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf - -[LibraryClasses.common.UEFI_DRIVER] - ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf -DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf -[LibraryClasses.common.DXE_RUNTIME_DRIVER] - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - -[LibraryClasses.ARM] - # - # It is not possible to prevent the ARM compiler for generic intrinsic functions. - # This library provides the instrinsic functions generate by a given compiler. - # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. - # - NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf - -[BuildOptions] - RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb --fpu=softvfp -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - GCC:*_*_ARM_CC_FLAGS = -Os -mword-relocations -mfpu=vfp -ffixed-r8 - GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - -################################################################################ -# -# Pcd Section - list of all EDK II PCD Entries defined by this Platform -# -################################################################################ - -[PcdsFeatureFlag.common] - gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE - gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE - gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE - gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE - -!if $(EDK2_SKIP_PEICORE) == 1 - gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE - gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE -!endif - -[PcdsFixedAtBuild.common] - gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ORIGEN %" - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32 - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 - gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 - gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 - gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 - gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 - gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF - gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 - gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 - gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 - -# DEBUG_ASSERT_ENABLED 0x01 -# DEBUG_PRINT_ENABLED 0x02 -# DEBUG_CODE_ENABLED 0x04 -# CLEAR_MEMORY_ENABLED 0x08 -# ASSERT_BREAKPOINT_ENABLED 0x10 -# ASSERT_DEADLOOP_ENABLED 0x20 - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f - -# DEBUG_INIT 0x00000001 // Initialization -# DEBUG_WARN 0x00000002 // Warnings -# DEBUG_LOAD 0x00000004 // Load events -# DEBUG_FS 0x00000008 // EFI File system -# DEBUG_POOL 0x00000010 // Alloc & Free's -# DEBUG_PAGE 0x00000020 // Alloc & Free's -# DEBUG_INFO 0x00000040 // Verbose -# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers -# DEBUG_VARIABLE 0x00000100 // Variable -# DEBUG_BM 0x00000400 // Boot Manager -# DEBUG_BLKIO 0x00001000 // BlkIo Driver -# DEBUG_NET 0x00004000 // SNI Driver -# DEBUG_UNDI 0x00010000 // UNDI Driver -# DEBUG_LOADFILE 0x00020000 // UNDI Driver -# DEBUG_EVENT 0x00080000 // Event messages -# DEBUG_ERROR 0x80000000 // Error - gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F - gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 - gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|"" - gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07 - gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000 - -# -# Optional feature to help prevent EFI memory map fragments -# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob -# Values are in EFI Pages (4K). DXE Core will make sure that -# at least this much of each type of memory can be allocated -# from a single memory range. This way you only end up with -# maximum of two fragements for each type in the memory map -# (the memory used, and the free memory that was prereserved -# but not used). -# - gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000 - gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x01000000 - # Stacks for MPCores in Secure World - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World - gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x100 - - # Stacks for MPCores in Monitor Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x4A000000 # Top of SEC Stack for Monitor World - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x2000 # Stack for each of the 4 CPU cores - gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x48000000 - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 - - # Stacks for MPCores in Normal World - gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms - gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000 - gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000 - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x0f - gArmTokenSpaceGuid.PcdArmPrimaryCore|0x00 - gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE - # - # ARM Pcds - # - gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000 - # - # ARM EB PCDS - # - gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000 - gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0x13820000 - gExynosPkgTokenSpaceGuid.PcdCmuBase|0x10030000 - gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0x139d0000 - gExynosPkgTokenSpaceGuid.PcdPmuBase|0x10020000 - gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0x11400000 - gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0x11000000 - gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0x12530000 - gExynosPkgTokenSpaceGuid.PcdSysBase|0x10010000 - gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0x11C00000 - gExynosPkgTokenSpaceGuid.PcdGICBase|0x10500000 - gExynosPkgTokenSpaceGuid.PcdTZPCBase|0x10100000 - # - # ARM PL390 General Interrupt Controller - # - gArmTokenSpaceGuid.PcdGicDistributorBase|0x10490000 - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x10480000 - - # - # ARM OS Loader - # - #gArmTokenSpaceGuid.PcdArmMachineType|2925 - gArmTokenSpaceGuid.PcdArmMachineType |3455 - gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"SD-MMC Booting" - gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x0B917605,0x1002,0x8000)/uImage" - gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"root=/dev/mmcblk0p2 rw rootwait console=ttySAC2,115200n8 init=/linuxrc" - gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1 - gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|L"Samsung Origen Board" - - - -# Use the Serial console (ConIn & ConOut) and the Graphic driver (ConOut) - gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi();VenHw(c5deae31-fad2-4030-841b-cfc9644d2c5b)" - gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" - gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|10 - - # - # ARM L2x0 PCDs - # - gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x10502000 - -################################################################################ -# -# Components Section - list of all EDK II Modules needed by this Platform -# -################################################################################ -[Components.common] - -# -# SEC -# - ArmPlatformPkg/Sec/Sec.inf - -# -# PEI Phase modules -# -!if $(EDK2_SKIP_PEICORE) == 1 - ArmPlatformPkg/PrePi/PeiMPCore.inf { - - ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf - ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf - } -!else - ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf { - - ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf - } - MdeModulePkg/Core/Pei/PeiMain.inf - MdeModulePkg/Universal/PCD/Pei/Pcd.inf { - - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - } - ArmPlatformPkg/PlatformPei/PlatformPeim.inf - ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf - ArmPkg/Drivers/CpuPei/CpuPei.inf - IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf - Nt32Pkg/BootModePei/BootModePei.inf - MdeModulePkg/Universal/Variable/Pei/VariablePei.inf - MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { - - NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf - } -!endif - -# -# DXE -# - MdeModulePkg/Core/Dxe/DxeMain.inf { - - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf - } - - # - # Architectural Protocols - # - ArmPkg/Drivers/CpuDxe/CpuDxe.inf - EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf - EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - EmbeddedPkg/SerialDxe/SerialDxe.inf - - MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf - SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf - SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf - - # - # Samsung specific Driver - # - ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf - SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf - SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf{ - - ExynosLib|SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf - } - - # - # Semi-hosting filesystem - # - ArmPkg/Filesystem/SemihostFs/SemihostFs.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - FatPkg/EnhancedFatDxe/Fat.inf - MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - # - # Application - # - EmbeddedPkg/Ebl/Ebl.inf - - # - # Bds - # - MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - ArmPlatformPkg/Bds/Bds.inf - - MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf diff --git a/SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf b/SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf deleted file mode 100644 index 7b8d05f91..000000000 --- a/SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf +++ /dev/null @@ -1,354 +0,0 @@ -# FLASH layout file for ARM VE. -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -################################################################################ -# -# FD Section -# The [FD] Section is made up of the definition statements and a -# description of what goes into the Flash Device Image. Each FD section -# defines one flash "device" image. A flash device image may be one of -# the following: Removable media bootable image (like a boot floppy -# image,) an Option ROM image (that would be "flashed" into an add-in -# card,) a System "Flash" image (that would be burned into a system's -# flash) or an Update ("Capsule") image that will be used to update and -# existing system flash. -# -################################################################################ - - -[FD.OrigenBoard_EFI] -BaseAddress = 0x43E00000|gArmTokenSpaceGuid.PcdFdBaseAddress -Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize -ErasePolarity = 1 -BlockSize = 0x00010000 -NumBlocks = 0x20 - -################################################################################ -# -# Following are lists of FD Region layout which correspond to the locations of different -# images within the flash device. -# -# Regions must be defined in ascending order and may not overlap. -# -# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -# the pipe "|" character, followed by the size of the region, also in hex with the leading -# "0x" characters. Like: -# Offset|Size -# PcdOffsetCName|PcdSizeCName -# RegionType -# -################################################################################ - -0x0000000|0x00010000 -gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize -FV = FVMAIN_SEC - -0x00010000|0x00100000 -gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -FV = FVMAIN_COMPACT - -0x00110000|0x00010000 -gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize -#NV_VARIABLE_STORE -DATA = { - ## This is the EFI_FIRMWARE_VOLUME_HEADER - # ZeroVector [] - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - # FileSystemGuid: gEfiSystemNvDataFvGuid = - # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} - 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, - 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, - # FvLength: 0x20000 - 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - #Signature "_FVH" #Attributes - 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, - #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision - 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02, - #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, - #Blockmap[1]: End - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - ## This is the VARIABLE_STORE_HEADER - #Signature: gEfiVariableGuid = - # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} - 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, - 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, - #Size: 0x10000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xFFB8 - # This can speed up the Variable Dispatch a bit. - 0xB8, 0xFF, 0x00, 0x00, - #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 - 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -} - -################################################################################ -# -# FV Section -# -# [FV] section is used to define what components or modules are placed within a flash -# device file. This section also defines order the components and modules are positioned -# within the image. The [FV] section consists of define statements, set statements and -# module statements. -# -################################################################################ - -[FV.FVMAIN_SEC] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF ArmPlatformPkg/Sec/Sec.inf - - -[FV.FVMAIN] -BlockSize = 0x40 -NumBlocks = 0 # This FV gets compressed so make it just big enough -FvAlignment = 8 # FV alignment and FV attributes setting. -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF MdeModulePkg/Core/Dxe/DxeMain.inf - - # - # PI DXE Drivers producing Architectural Protocols (EFI Services) - # - INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf - - INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - INF EmbeddedPkg/SerialDxe/SerialDxe.inf - - - INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf - INF SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf - - # - # ACPI Support - # - - # - # Samsung specific Driver - # - INF SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf - INF SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf - # - # PCI EMULATION - # - # - # Semi-hosting filesystem - # - INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - # - # USB HOST STACK - # - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - - # - # UEFI application (Shell Embedded Boot Loader) - # - INF EmbeddedPkg/Ebl/Ebl.inf - - - # - # Bds - # - INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - INF ArmPlatformPkg/Bds/Bds.inf - -[FV.FVMAIN_COMPACT] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - -!if $(EDK2_SKIP_PEICORE) == 1 - INF ArmPlatformPkg/PrePi/PeiMPCore.inf -!else - INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf - INF MdeModulePkg/Core/Pei/PeiMain.inf - INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf - INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf - INF ArmPkg/Drivers/CpuPei/CpuPei.inf - INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf - INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf - INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf - INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf -!endif - - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN - } - } - - -################################################################################ -# -# Rules are use with the [FV] section's module INF type to define -# how an FFS file is created for a given INF file. The following Rule are the default -# rules for the different module type. User can add the customized rules to define the -# content of the FFS file. -# -################################################################################ - - -############################################################################ -# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # -############################################################################ -# -#[Rule.Common.DXE_DRIVER] -# FILE DRIVER = $(NAMED_GUID) { -# DXE_DEPEX DXE_DEPEX Optional |.depex -# COMPRESS PI_STD { -# GUIDED { -# PE32 PE32 |.efi -# UI STRING="$(MODULE_NAME)" Optional -# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) -# } -# } -# } -# -############################################################################ - -[Rule.Common.SEC] - FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { - TE TE Align = 32 |.efi - } - -[Rule.Common.PEI_CORE] - FILE PEI_CORE = $(NAMED_GUID) { - TE TE |.efi - UI STRING ="$(MODULE_NAME)" Optional - } - -[Rule.Common.PEIM] - FILE PEIM = $(NAMED_GUID) { - PEI_DEPEX PEI_DEPEX Optional |.depex - TE TE |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.PEIM.TIANOCOMPRESSED] - FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { - PEI_DEPEX PEI_DEPEX Optional |.depex - GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - } - -[Rule.Common.DXE_CORE] - FILE DXE_CORE = $(NAMED_GUID) { - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.UEFI_DRIVER] - FILE DRIVER = $(NAMED_GUID) { - DXE_DEPEX DXE_DEPEX Optional |.depex - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.DXE_DRIVER] - FILE DRIVER = $(NAMED_GUID) { - DXE_DEPEX DXE_DEPEX Optional |.depex - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.DXE_RUNTIME_DRIVER] - FILE DRIVER = $(NAMED_GUID) { - DXE_DEPEX DXE_DEPEX Optional |.depex - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.USER_DEFINED.ACPITABLE] - FILE FREEFORM = $(NAMED_GUID) { - RAW ACPI |.acpi - RAW ASL |.aml - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.UEFI_APPLICATION] - FILE APPLICATION = $(NAMED_GUID) { - PE32 PE32 |.efi - UI STRING ="$(MODULE_NAME)" Optional - } - -[Rule.Common.UEFI_APPLICATION.BINARY] - FILE APPLICATION = $(NAMED_GUID) { - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) - } diff --git a/SamsungPlatformPkg/README b/SamsungPlatformPkg/README deleted file mode 100644 index b34c1baea..000000000 --- a/SamsungPlatformPkg/README +++ /dev/null @@ -1,67 +0,0 @@ - -=== SmdkBoard OVERVIEW === - -The SMDK project aims to support firmware for Exynos 4210 Soc using the edk2 -code base. - -=== STATUS === - -Current status: Alpha - -Current capabilities: -* Uefi Boot from SDMMC card - -=== FUTURE PLANS === - -* SUpport for USB - - KeyBoard, Mouse and MassStorage - -=== BUILDING SMDK Board === - -Pre-requisites: -* Build environment capable of build the edk2 MdeModulePkg. -* A properly configured ASL compiler: - - Intel ASL compiler: Available from http://www.acpica.org - - Microsoft ASL compiler: Available from http://www.acpi.info - -Building the iRam_Bl: -The iRam_Bl is the 1st stage bootloader which is executed by the IROM code. -This code is reused from the u-boot project. this image has to be a plane binary image -which will not have any header format. After generating the binary image the checksum is generated -and stored in the same file at a particular offset. that is done by the executable generated with -the iRam_Bl source files. - -To generate the iRAM_Bl image -* Download the u-boot source from git://git.denx.de/u-boot.git by running below command - git clone git://git.denx.de/u-boot.git -* Run following commands - - export ARCH=arm - - export CROSS_COMPILE=/usr/local/arm/gcc-linaro-4.5-2011.03-0/bin/arm-linux-gnueabi- or respective toolchain path - - make smdkv310_config - - make mmc_spl -* the binary "u-boot-mmc-spl.bin" will be generated in the spl directory. -* copy the generated u-boot-mmc-spl.bin to the Uefi Workspace Build/SmdkBoard-Exynos/RELEASE_ARMGCC/FV/ - - -Build the SdmkBoardPkg by running from the Workspace - build -p SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc -a ARM -t ARMGCC -b RELEASE for release version - -Following the edk2 build process, you will find the SMDK binaries -under the $WORKSPACE/Build/*/*/FV directory. You can find the below -mentioned binary image. -* SMDKBOARD_EFI.FD -* u-boot-mmc-spl.bin - -=== RUNNING SmdkBoardPkg on the SMDK v310 board === -* need to be in Linux Environment to do the below procedure -* After inserting the SD card. unmount the card by using the command umount /media/XXXXX. -* copy the u-boot-mmc-spl.bin to the SD/MMC card by using the comand - sudo dd if=Build/SmdkBoard-Exynos/RELEASE_ARMGCC/FV/u-boot-mmc-spl.bin of=/dev/sdc bs=512 seek=1 -* Copy the Uefi Image to SD/MMC with below command from the Workspace. - sudo dd if=Build/SmdkBoard-Exynos/RELEASE_ARMGCC/FV/SMDKBOARD_EFI.fd of=/dev/sdc bs=512 seek=65 -* Now the booting device is ready to be used. -* Insert the SDMMC card in the v310 board reader slot MMC Ch2. -* Connect the Uart cable from the v310 device to the PC terminal. -* POwer ON the Device. -* The boot message should be visible on the termial. -* use option 1 to enter the Embedded Boot loader. diff --git a/SamsungPlatformPkg/SamsungPlatformPkg.dec b/SamsungPlatformPkg/SamsungPlatformPkg.dec deleted file mode 100644 index 35bceeccc..000000000 --- a/SamsungPlatformPkg/SamsungPlatformPkg.dec +++ /dev/null @@ -1,40 +0,0 @@ -#/** @file -# Arm RealView EB package. -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# -# This program and the accompanying materials are licensed and made available under -# the terms and conditions of the BSD License which accompanies this distribution. -# The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - DEC_SPECIFICATION = 0x00010005 - PACKAGE_NAME = SamsungPlatformPkg - PACKAGE_GUID = ec1a4982-4a00-47e7-8df5-69c8ce895427 - PACKAGE_VERSION = 0.1 - -################################################################################ -# -# Include Section - list of Include Paths that are provided by this package. -# Comments are used for Keywords and Module Types. -# -# Supported Module Types: -# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION -# -################################################################################ -[Includes.common] - -[Guids.common] - -[PcdsFeatureFlag.common] - -[PcdsFixedAtBuild.common] - -[Protocols.common] - gSamsungPlatformGpioProtocolGuid = { 0x82b4b2f7, 0x8c18, 0x4dbe, { 0xb7, 0x2e, 0x6a, 0x59, 0xd4, 0x23, 0x0c, 0x40 }} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/AcpiTables.inf b/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/AcpiTables.inf deleted file mode 100644 index a40aac687..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/AcpiTables.inf +++ /dev/null @@ -1,37 +0,0 @@ -## @file -# Component description file for PlatformAcpiTables module. -# -# ACPI table data and ASL sources required to boot the platform. -# -# Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD -# License which accompanies this distribution. The full text of the license -# may be found at http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = PlatformAcpiTables - FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD - MODULE_TYPE = USER_DEFINED - VERSION_STRING = 1.0 -# -# The following information is for reference only and not required by the -# build tools. -# -# VALID_ARCHITECTURES = -# - -[Sources] - Platform.h - Madt.aslc - Facp.aslc - Facs.aslc - Dsdt.asl -[Packages] - MdePkg/MdePkg.dec diff --git a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Dsdt.asl b/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Dsdt.asl deleted file mode 100644 index ca2b17275..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Dsdt.asl +++ /dev/null @@ -1,446 +0,0 @@ -/** @file - Contains root level name space objects for the platform - - Copyright (c) 2008, Intel Corporation. All rights reserved.
- This program and the accompanying materials are - licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be - found at http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -DefinitionBlock ("Dsdt.aml", "DSDT", 1, "EXYNOS", "4210 ", 3) { - // - // System Sleep States - // - Name (\_S0, Package () {5, 0, 0, 0}) - Name (\_S4, Package () {1, 0, 0, 0}) - Name (\_S5, Package () {0, 0, 0, 0}) - - // - // System Bus - // - Scope (\_SB) { - // - // PCI Root Bridge - // - Device (PCI0) { - Name (_HID, EISAID ("PNP0A03")) - Name (_ADR, 0x00000000) - Name (_BBN, 0x00) - Name (_UID, 0x00) - - // - // BUS, I/O, and MMIO resources - // - Name (_CRS, ResourceTemplate () { - // Bus number resource (0); the bridge produces bus numbers for its - // subsequent buses - WORDBusNumber ( - ResourceProducer, // bit 0 of general flags is 1 - MinFixed, // Range is fixed - MaxFixed, // Range is fixed - PosDecode, // PosDecode - 0x0000, // Granularity - 0x0000, // Min - 0x00FF, // Max - 0x0000, // Translation - 0x0100 // Range Length = Max-Min+1 - ) - - //Consumed resource (0xCF8-0xCFF) - IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) - - // Consumed-and-produced resource (all I/O below CF8) - WORDIO ( - ResourceProducer, // bit 0 of general flags is 0 - MinFixed, // Range is fixed - MaxFixed, // Range is fixed - PosDecode, - EntireRange, - 0x0000, // Granularity - 0x0000, // Min - 0x0CF7, // Max - 0x0000, // Translation - 0x0CF8 // Range Length - ) - - WORDIO ( // Consumed-and-produced resource - // (all I/O above CFF) - ResourceProducer, // bit 0 of general flags is 0 - MinFixed, // Range is fixed - MaxFixed, // Range is fixed - PosDecode, - EntireRange, - 0x0000, // Granularity - 0x0D00, // Min - 0xFFFF, // Max - 0x0000, // Translation - 0xF300 // Range Length - ) - - DWORDMEMORY ( // Descriptor for legacy VGA video RAM - ResourceProducer, // bit 0 of general flags is 0 - PosDecode, - MinFixed, // Range is fixed - MaxFixed, // Range is Fixed - Cacheable, - ReadWrite, - 0x00000000, // Granularity - 0x000A0000, // Min - 0x000BFFFF, // Max - 0x00000000, // Translation - 0x00020000 // Range Length - ) - - DWORDMEMORY ( // Descriptor for linear frame buffer video RAM - ResourceProducer, // bit 0 of general flags is 0 - PosDecode, - MinFixed, // Range is fixed - MaxFixed, // Range is Fixed - Cacheable, - ReadWrite, - 0x00000000, // Granularity - 0xF8000000, // Min - 0xFFFBFFFF, // Max - 0x00000000, // Translation - 0x07FC0000 // Range Length - ) - }) - - // - // PCI Interrupt Routing Table - PIC Mode Only - // - Method (_PRT, 0, NotSerialized) { - Return ( - Package () { - // - // Bus 0, Device 1 - // - Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, - Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, - Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, - Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, - // - // Bus 0, Device 3 - // - Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, - Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, - Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, - Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, - } - ) - } - - // - // PCI to ISA Bridge (Bus 0, Device 1, Function 0) - // - Device (LPC) { - Name (_ADR, 0x00010000) - - // - // PCI Interrupt Routing Configuration Registers - // - OperationRegion (PRR0, PCI_Config, 0x60, 0x04) - Field (PRR0, ANYACC, NOLOCK, PRESERVE) { - PIRA, 8, - PIRB, 8, - PIRC, 8, - PIRD, 8 - } - - // - // _STA method for LNKA, LNKB, LNKC, LNKD - // - Method (PSTA, 1, NotSerialized) { - If (And (Arg0, 0x80)) { - Return (0x9) - } Else { - Return (0xB) - } - } - - // - // _DIS method for LNKA, LNKB, LNKC, LNKD - // - Method (PDIS, 1, NotSerialized) { - Or (Arg0, 0x80, Arg0) - } - - // - // _CRS method for LNKA, LNKB, LNKC, LNKD - // - Method (PCRS, 1, NotSerialized) { - Name (BUF0, ResourceTemplate () {IRQ (Level, ActiveLow, Shared){0}}) - // - // Define references to buffer elements - // - CreateWordField (BUF0, 0x01, IRQW) // IRQ low - // - // Write current settings into IRQ descriptor - // - If (And (Arg0, 0x80)) { - Store (Zero, Local0) - } Else { - Store (One, Local0) - } - // - // Shift 1 by value in register 70 - // - ShiftLeft (Local0, And (Arg0, 0x0F), IRQW) // Save in buffer - Return (BUF0) // Return Buf0 - } - - // - // _PRS resource for LNKA, LNKB, LNKC, LNKD - // - Name (PPRS, ResourceTemplate () { - IRQ (Level, ActiveLow, Shared) {3, 4, 5, 7, 9, 10, 11, 12, 14, 15} - }) - - // - // _SRS method for LNKA, LNKB, LNKC, LNKD - // - Method (PSRS, 2, NotSerialized) { - CreateWordField (Arg1, 0x01, IRQW) // IRQ low - FindSetRightBit (IRQW, Local0) // Set IRQ - If (LNotEqual (IRQW, Zero)) { - And (Local0, 0x7F, Local0) - Decrement (Local0) - } Else { - Or (Local0, 0x80, Local0) - } - Store (Local0, Arg0) - } - - // - // PCI IRQ Link A - // - Device (LNKA) { - Name (_HID, EISAID("PNP0C0F")) - Name (_UID, 1) - - Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRA) } - Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) } - Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRA, Arg0) } - } - - // - // PCI IRQ Link B - // - Device (LNKB) { - Name (_HID, EISAID("PNP0C0F")) - Name (_UID, 2) - - Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRB) } - Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) } - Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRB, Arg0) } - } - - // - // PCI IRQ Link C - // - Device (LNKC) { - Name (_HID, EISAID("PNP0C0F")) - Name (_UID, 3) - - Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRC) } - Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) } - Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRC, Arg0) } - } - - // - // PCI IRQ Link D - // - Device (LNKD) { - Name (_HID, EISAID("PNP0C0F")) - Name (_UID, 1) - - Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) } - Method (_DIS, 0, NotSerialized) { PDIS (PIRD) } - Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) } - Method (_PRS, 0, NotSerialized) { Return (PPRS) } - Method (_SRS, 1, NotSerialized) { PSRS (PIRD, Arg0) } - } - - // - // Programmable Interrupt Controller (PIC) - // - Device(PIC) { - Name (_HID, EISAID ("PNP0000")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x020, 0x020, 0x00, 0x02) - IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02) - IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02) - IRQNoFlags () {2} - }) - } - - // - // ISA DMA - // - Device (DMAC) { - Name (_HID, EISAID ("PNP0200")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x00, 0x00, 0, 0x10) - IO (Decode16, 0x81, 0x81, 0, 0x03) - IO (Decode16, 0x87, 0x87, 0, 0x01) - IO (Decode16, 0x89, 0x89, 0, 0x03) - IO (Decode16, 0x8f, 0x8f, 0, 0x01) - IO (Decode16, 0xc0, 0xc0, 0, 0x20) - DMA (Compatibility, NotBusMaster, Transfer8) {4} - }) - } - - // - // 8254 Timer - // - Device(TMR) { - Name(_HID,EISAID("PNP0100")) - Name(_CRS, ResourceTemplate () { - IO (Decode16, 0x40, 0x40, 0x00, 0x04) - IRQNoFlags () {0} - }) - } - - // - // Real Time Clock - // - Device (RTC) { - Name (_HID, EISAID ("PNP0B00")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x70, 0x70, 0x00, 0x02) - IRQNoFlags () {8} - }) - } - - // - // PCAT Speaker - // - Device(SPKR) { - Name (_HID, EISAID("PNP0800")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x61, 0x61, 0x01, 0x01) - }) - } - - // - // Floating Point Coprocessor - // - Device(FPU) { - Name (_HID, EISAID("PNP0C04")) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0xF0, 0xF0, 0x00, 0x10) - IRQNoFlags () {13} - }) - } - - // - // Generic motherboard devices and pieces that don't fit anywhere else - // - Device(XTRA) { - Name (_HID, EISAID ("PNP0C02")) - Name (_UID, 0x01) - Name (_CRS, ResourceTemplate () { - IO (Decode16, 0x010, 0x010, 0x00, 0x10) - IO (Decode16, 0x022, 0x022, 0x00, 0x1E) - IO (Decode16, 0x044, 0x044, 0x00, 0x1C) - IO (Decode16, 0x062, 0x062, 0x00, 0x02) - IO (Decode16, 0x065, 0x065, 0x00, 0x0B) - IO (Decode16, 0x072, 0x072, 0x00, 0x0E) - IO (Decode16, 0x080, 0x080, 0x00, 0x01) - IO (Decode16, 0x084, 0x084, 0x00, 0x03) - IO (Decode16, 0x088, 0x088, 0x00, 0x01) - IO (Decode16, 0x08c, 0x08c, 0x00, 0x03) - IO (Decode16, 0x090, 0x090, 0x00, 0x10) - IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E) - IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10) - IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10) - IO (Decode16, 0x160, 0x160, 0x00, 0x10) - IO (Decode16, 0x278, 0x278, 0x00, 0x08) - IO (Decode16, 0x370, 0x370, 0x00, 0x02) - IO (Decode16, 0x378, 0x378, 0x00, 0x08) - IO (Decode16, 0x400, 0x400, 0x00, 0x40) // PMBLK1 - IO (Decode16, 0x440, 0x440, 0x00, 0x10) - IO (Decode16, 0x678, 0x678, 0x00, 0x08) - IO (Decode16, 0x778, 0x778, 0x00, 0x08) - Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC - Memory32Fixed (ReadOnly, 0xFEE00000, 0x1000) - }) - } - - // - // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102 - // - Device (PS2K) { - Name (_HID, EISAID ("PNP0303")) - Name (_CID, EISAID ("PNP030B")) - Name(_CRS,ResourceTemplate() { - IO (Decode16, 0x60, 0x60, 0x00, 0x01) - IO (Decode16, 0x64, 0x64, 0x00, 0x01) - IRQNoFlags () {1} - }) - } - - // - // PS/2 Mouse and Microsoft Mouse - // - Device (PS2M) { // PS/2 stype mouse port - Name (_HID, EISAID ("PNP0F03")) - Name (_CID, EISAID ("PNP0F13")) - Name (_CRS, ResourceTemplate() { - IRQNoFlags () {12} - }) - } - - // - // UART Serial Port - COM1 - // - Device (UAR1) { - Name (_HID, EISAID ("PNP0501")) - Name (_DDN, "COM1") - Name (_UID, 0x01) - Name(_CRS,ResourceTemplate() { - IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08) - IRQ (Edge, ActiveHigh, Exclusive, ) {4} - }) - } - - // - // UART Serial Port - COM2 - // - Device (UAR2) { - Name (_HID, EISAID ("PNP0501")) - Name (_DDN, "COM2") - Name (_UID, 0x02) - Name(_CRS,ResourceTemplate() { - IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08) - IRQ (Edge, ActiveHigh, Exclusive, ) {3} - }) - } - - // - // Floppy Disk Controller - // - Device (FDC) { - Name (_HID, EISAID ("PNP0700")) - Name (_CRS,ResourceTemplate() { - IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06) - IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01) - IRQNoFlags () {6} - DMA (Compatibility, NotBusMaster, Transfer8) {2} - }) - } - } - } - } -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facp.aslc b/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facp.aslc deleted file mode 100644 index 593861eb6..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facp.aslc +++ /dev/null @@ -1,79 +0,0 @@ -/** @file - FACP Table - - Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
- This program and the accompanying materials are - licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be - found at http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "Platform.h" - -EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { - EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, - sizeof (EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE), - EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, - 0, // to make sum of entire table == 0 - EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field - EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) - EFI_ACPI_OEM_REVISION, // OEM revision number - EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID - EFI_ACPI_CREATOR_REVISION, // ASL compiler revision number - 0, // Physical addesss of FACS - 0, // Physical address of DSDT - INT_MODEL, // System Interrupt Model - RESERVED, // reserved - SCI_INT_VECTOR, // System vector of SCI interrupt - SMI_CMD_IO_PORT, // Port address of SMI command port - ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI - ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI - S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state - 0xE2, // PState control - PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk - PM1b_EVT_BLK, // Port address of Power Mgt 1b Event Reg Blk - PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk - PM1b_CNT_BLK, // Port address of Power Mgt 1b Ctrl Reg Blk - PM2_CNT_BLK, // Port address of Power Mgt 2 Ctrl Reg Blk - PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk - GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk - GPE1_BLK, // Port addr of General Purpose Event 1 Reg Blk - PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk - PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk - PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk - PM_TM_LEN, // Byte Length of ports at pm_tm_blk - GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk - GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk - GPE1_BASE, // offset in gpe model where gpe1 events start - 0xE3, // _CST support - P_LVL2_LAT, // worst case HW latency to enter/exit C2 state - P_LVL3_LAT, // worst case HW latency to enter/exit C3 state - FLUSH_SIZE, // Size of area read to flush caches - FLUSH_STRIDE, // Stride used in flushing caches - DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg - DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg - DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM - MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM - CENTURY, // index to century in RTC CMOS RAM - 0x03, // Boot architecture flag - 0x00, // Boot architecture flag - RESERVED, // reserved - FLAG -}; - - -VOID* -ReferenceAcpiTable ( - VOID - ) -{ - // - // Reference the table being generated to prevent the optimizer from - // removing the data structure from the exeutable - // - return (VOID*)&FACP; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facs.aslc b/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facs.aslc deleted file mode 100644 index 2d2129c42..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Facs.aslc +++ /dev/null @@ -1,81 +0,0 @@ -/** @file - FACS Table - - Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
- This program and the accompanying materials are - licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be - found at http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE FACS = { - EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE, - sizeof (EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE), - - // - // Hardware Signature will be updated at runtime - // - 0x00000000, - 0x00, - 0x00, - 0x00, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE, - EFI_ACPI_RESERVED_BYTE -}; - - -VOID* -ReferenceAcpiTable ( - VOID - ) -{ - // - // Reference the table being generated to prevent the optimizer from - // removing the data structure from the exeutable - // - return (VOID*)&FACS; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Madt.aslc b/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Madt.aslc deleted file mode 100644 index 7e360dd69..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Madt.aslc +++ /dev/null @@ -1,158 +0,0 @@ -/** @file - MADT Table - - This file contains a structure definition for the ACPI 1.0 Multiple APIC - Description Table (MADT). - - Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
- This program and the accompanying materials are - licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be - found at http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -// -// MADT Definitions -// -#define EFI_ACPI_OEM_MADT_REVISION 0x00000000 // TBD - -// -// Local APIC address -// -#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000 // TBD - -// -// Multiple APIC Flags are defined in AcpiX.0.h -// -#define EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_1_0_PCAT_COMPAT) - -// -// Define the number of each table type. -// This is where the table layout is modified. -// -#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 1 -#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2 -#define EFI_ACPI_IO_APIC_COUNT 1 - -// -// Ensure proper structure formats -// -#pragma pack (1) - -// -// ACPI 1.0 MADT structure -// -typedef struct { - EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; - -#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0 - EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE \ - LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT]; -#endif - -#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 - EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE \ - Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT]; -#endif - -#if EFI_ACPI_IO_APIC_COUNT > 0 - EFI_ACPI_1_0_IO_APIC_STRUCTURE \ - IoApic[EFI_ACPI_IO_APIC_COUNT]; -#endif - -} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE; - -#pragma pack () - -// -// Multiple APIC Description Table -// -EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { - EFI_ACPI_1_0_APIC_SIGNATURE, - sizeof (EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE), - EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, - - // - // Checksum will be updated at runtime - // - 0x00, - - // - // It is expected that these values will be programmed at runtime - // - 'E', 'X', 'Y', 'N', 'O', 'S', - - 0x30313234, - EFI_ACPI_OEM_MADT_REVISION, - 0, - 0, - - // - // MADT specific fields - // - EFI_ACPI_LOCAL_APIC_ADDRESS, - EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS, - - // - // Processor Local APIC Structure - // - - EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC, // Type - sizeof (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length - 0x01, // Processor ID - 0x00, // Local APIC ID - 0x00000001, // Flags - Enabled by default - - // - // Interrupt Source Override Structure - // - - // - // IRQ0=>IRQ2 Interrupt Source Override Structure - // - EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE, // Type - sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length - 0x00, // Bus - ISA - 0x00, // Source - IRQ0 - 0x00000002, // Global System Interrupt - IRQ2 - 0x0000, // Flags - Conforms to specifications of the bus - - // - // ISO (SCI Active High) Interrupt Source Override Structure - // - EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE, // Type - sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length - 0x00, // Bus - ISA - 0x09, // Source - IRQ0 - 0x00000009, // Global System Interrupt - IRQ2 - 0x000D, // Flags - Level-tiggered, Active High - - // - // IO APIC Structure - // - EFI_ACPI_1_0_IO_APIC, // Type - sizeof (EFI_ACPI_1_0_IO_APIC_STRUCTURE), // Length - 0x02, // IO APIC ID - EFI_ACPI_RESERVED_BYTE, // Reserved - 0xFEC00000, // IO APIC Address (physical) - 0x00000000 // Global System Interrupt Base -}; - - -VOID* -ReferenceAcpiTable ( - VOID - ) -{ - // - // Reference the table being generated to prevent the optimizer from - // removing the data structure from the exeutable - // - return (VOID*)&Madt; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Platform.h b/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Platform.h deleted file mode 100644 index 307983933..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/AcpiTables/Platform.h +++ /dev/null @@ -1,66 +0,0 @@ -/** @file - Platform specific defines for constructing ACPI tables - - Copyright (c) 2008, Intel Corporation. All rights reserved.
- This program and the accompanying materials are - licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be - found at http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef _Platform_h_INCLUDED_ -#define _Platform_h_INCLUDED_ - -#include -#include - -// -// ACPI table information used to initialize tables. -// -#define EFI_ACPI_OEM_ID 'E','X','Y','N','O','S' // OEMID 6 bytes long -// OEM table id 8 bytes long -#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('4','2','1','0',' ',' ',' ',' ') -#define EFI_ACPI_OEM_REVISION 0x02000820 -#define EFI_ACPI_CREATOR_ID SIGNATURE_32('S','M','D','K') -#define EFI_ACPI_CREATOR_REVISION 0x00000097 - -#define INT_MODEL 0x01 -#define SCI_INT_VECTOR 0x0009 -#define SMI_CMD_IO_PORT 0 // If SMM was supported, then this would be 0xB2 -#define ACPI_ENABLE 0x0E1 -#define ACPI_DISABLE 0x01E -#define S4BIOS_REQ 0x00 -#define PM1a_EVT_BLK 0x00000400 -#define PM1b_EVT_BLK 0x00000000 -#define PM1a_CNT_BLK 0x00000404 -#define PM1b_CNT_BLK 0x00000000 -#define PM2_CNT_BLK 0x00000022 -#define PM_TMR_BLK 0x00000408 -#define GPE0_BLK 0x0000040C -#define GPE1_BLK 0x00000000 -#define PM1_EVT_LEN 0x04 -#define PM1_CNT_LEN 0x02 -#define PM2_CNT_LEN 0x01 -#define PM_TM_LEN 0x04 -#define GPE0_BLK_LEN 0x04 -#define GPE1_BLK_LEN 0x00 -#define GPE1_BASE 0x00 -#define RESERVED 0x00 -#define P_LVL2_LAT 0x0065 -#define P_LVL3_LAT 0x03E9 -#define FLUSH_SIZE 0x0400 -#define FLUSH_STRIDE 0x0010 -#define DUTY_OFFSET 0x00 -#define DUTY_WIDTH 0x00 -#define DAY_ALRM 0x0D -#define MON_ALRM 0x00 -#define CENTURY 0x00 -#define FLAG EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | \ - EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4 | \ - EFI_ACPI_1_0_TMR_VAL_EXT - -#endif diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc deleted file mode 100644 index 281c99b4a..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc +++ /dev/null @@ -1,15 +0,0 @@ -// returns the base address of the SEC FV in flash on the EB board -// change this address for where your platform's SEC FV is located -// (or make it more intelligent to search for it) -define /r FindFv() -{ - return 0x40000000; -} -. - -include /s 'ZZZZZZ/EfiFuncs.inc' -error=continue -unload ,all -error=abort -LoadPeiSec() -include C:\loadfiles.inc diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc deleted file mode 100644 index 014d09440..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc +++ /dev/null @@ -1,463 +0,0 @@ -error=abort - -// NOTE: THIS MAY NEED TO BE ADJUSTED -// change to reflect the total amount of ram in your system -define /r GetMaxMem() -{ - return 0x10000000; // 256 MB -} -. - -define /r GetWord(Addr) -{ - unsigned long data; - - if( (Addr & 0x2) == 0 ) - { - data = dword(Addr); - data = data & 0xffff; - //$printf "getword data is %x\n", data$; - return data; - } - else - { - data = dword(Addr & 0xfffffffc); - //data = data >> 16; - data = data / 0x10000; - //$printf "getword data is %x (1)\n", data$; - return data; - } -} -. - -define /r ProcessPE32(imgstart) -unsigned long imgstart; -{ - unsigned long filehdrstart; - unsigned long debugdirentryrva; - unsigned long debugtype; - unsigned long debugrva; - unsigned long dwarfsig; - unsigned long baseofcode; - unsigned long baseofdata; - unsigned long elfbase; - char *elfpath; - - $printf "PE32 image found at %x",imgstart$; - - //$printf "PE file hdr offset %x",dword(imgstart+0x3C)$; - - // offset from dos hdr to PE file hdr - filehdrstart = imgstart + dword(imgstart+0x3C); - - // offset to debug dir in PE hdrs - //$printf "debug dir is at %x",(filehdrstart+0xA8)$; - debugdirentryrva = dword(filehdrstart + 0xA8); - if(debugdirentryrva == 0) - { - $printf "no debug dir for image at %x",imgstart$; - return; - } - - //$printf "debug dir entry rva is %x",debugdirentryrva$; - - debugtype = dword(imgstart + debugdirentryrva + 0xc); - if( (debugtype != 0xdf) && (debugtype != 0x2) ) - { - $printf "debug type is not dwarf for image at %x",imgstart$; - $printf "debug type is %x",debugtype$; - return; - } - - debugrva = dword(imgstart + debugdirentryrva + 0x14); - dwarfsig = dword(imgstart + debugrva); - if(dwarfsig != 0x66727764) - { - $printf "dwarf debug signature not found for image at %x",imgstart$; - return; - } - - elfpath = (char *)(imgstart + debugrva + 0xc); - - baseofcode = imgstart + dword(filehdrstart + 0x28); - baseofdata = imgstart + dword(filehdrstart + 0x2c); - - if( (baseofcode < baseofdata) && (baseofcode != 0) ) - { - elfbase = baseofcode; - } - else - { - elfbase = baseofdata; - } - - $printf "found path %s",elfpath$; - $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$; -} -. - -define /r ProcessTE(imgstart) -unsigned long imgstart; -{ - unsigned long strippedsize; - unsigned long debugdirentryrva; - unsigned long debugtype; - unsigned long debugrva; - unsigned long dwarfsig; - unsigned long elfbase; - char *elfpath; - - $printf "TE image found at %x",imgstart$; - - // determine pe header bytes removed to account for in rva references - //strippedsize = word(imgstart + 0x6); - //strippedsize = (dword(imgstart + 0x4) & 0xffff0000) >> 16; - strippedsize = (dword(imgstart + 0x4) & 0xffff0000) / 0x10000; - strippedsize = strippedsize - 0x28; - - debugdirentryrva = dword(imgstart + 0x20); - if(debugdirentryrva == 0) - { - $printf "no debug dir for image at %x",imgstart$; - return; - } - debugdirentryrva = debugdirentryrva - strippedsize; - - //$printf "debug dir entry rva is %x",debugdirentryrva$; - - debugtype = dword(imgstart + debugdirentryrva + 0xc); - if( (debugtype != 0xdf) && (debugtype != 0x2) ) - { - $printf "debug type is not dwarf for image at %x",imgstart$; - $printf "debug type is %x",debugtype$; - return; - } - - debugrva = dword(imgstart + debugdirentryrva + 0x14); - debugrva = debugrva - strippedsize; - dwarfsig = dword(imgstart + debugrva); - if( (dwarfsig != 0x66727764) && (dwarfsig != 0x3031424e) ) - { - $printf "dwarf debug signature not found for image at %x",imgstart$; - $printf "found %x", dwarfsig$; - return; - } - - if( dwarfsig == 0x66727764 ) - { - elfpath = (char *)(imgstart + debugrva + 0xc); - $printf "looking for elf path at 0x%x", elfpath$; - } - else - { - elfpath = (char *)(imgstart + debugrva + 0x10); - $printf "looking for elf path at 0x%x", elfpath$; - } - - // elf base is baseofcode (we hope that for TE images it's not baseofdata) - elfbase = imgstart + dword(imgstart + 0xc) - strippedsize; - - $printf "found path %s",elfpath$; - $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$; -} -. - -define /r ProcessFvSection(secstart) -unsigned long secstart; -{ - unsigned long sectionsize; - unsigned char sectiontype; - - sectionsize = dword(secstart); - //sectiontype = (sectionsize & 0xff000000) >> 24; - sectiontype = (sectionsize & 0xff000000) / 0x1000000; - sectionsize = sectionsize & 0x00ffffff; - - $printf "fv section at %x size %x type %x",secstart,sectionsize,sectiontype$; - - if(sectiontype == 0x10) // PE32 - { - ProcessPE32(secstart+0x4); - } - else if(sectiontype == 0x12) // TE - { - ProcessTE(secstart+0x4); - } -} -. - -define /r ProcessFfsFile(ffsfilestart) -unsigned long ffsfilestart; -{ - unsigned long ffsfilesize; - unsigned long ffsfiletype; - unsigned long secoffset; - unsigned long secsize; - - //ffsfiletype = byte(ffsfilestart + 0x12); - ffsfilesize = dword(ffsfilestart + 0x14); - //ffsfiletype = (ffsfilesize & 0xff000000) >> 24; - ffsfiletype = (ffsfilesize & 0xff000000) / 0x1000000; - ffsfilesize = ffsfilesize & 0x00ffffff; - - if(ffsfiletype == 0xff) return; - - $printf "ffs file at %x size %x type %x",ffsfilestart,ffsfilesize,ffsfiletype$; - - secoffset = ffsfilestart + 0x18; - - // loop through sections in file - while(secoffset < (ffsfilestart + ffsfilesize)) - { - // process fv section and increment section offset by size - secsize = dword(secoffset) & 0x00ffffff; - ProcessFvSection(secoffset); - secoffset = secoffset + secsize; - - // align to next 4 byte boundary - if( (secoffset & 0x3) != 0 ) - { - secoffset = secoffset + (0x4 - (secoffset & 0x3)); - } - } // end section loop -} -. - -define /r LoadPeiSec() -{ - unsigned long fvbase; - unsigned long fvlen; - unsigned long fvsig; - unsigned long ffsoffset; - unsigned long ffsfilesize; - - fvbase = FindFv(); - $printf "fvbase %x",fvbase$; - - // get fv signature field - fvsig = dword(fvbase + 0x28); - if(fvsig != 0x4856465F) - { - $printf "FV does not have proper signature, exiting"$; - return 0; - } - - $printf "FV signature found"$; - - $fopen 50, 'C:\loadfiles.inc'$; - - fvlen = dword(fvbase + 0x20); - - // first ffs file is after fv header, use headerlength field - //ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) >> 16; - ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) / 0x10000; - ffsoffset = fvbase + GetWord(fvbase + 0x30); - - // loop through ffs files - while(ffsoffset < (fvbase+fvlen)) - { - // process ffs file and increment by ffs file size field - ProcessFfsFile(ffsoffset); - ffsfilesize = (dword(ffsoffset + 0x14) & 0x00ffffff); - if(ffsfilesize == 0) - { - break; - } - ffsoffset = ffsoffset + ffsfilesize; - - - // align to next 8 byte boundary - if( (ffsoffset & 0x7) != 0 ) - { - ffsoffset = ffsoffset + (0x8 - (ffsoffset & 0x7)); - } - - } // end fv ffs loop - - $vclose 50$; - -} -. - -define /r FindSystemTable(TopOfRam) -unsigned long TopOfRam; -{ - unsigned long offset; - - $printf "FindSystemTable"$; - $printf "top of mem is %x",TopOfRam$; - - offset = TopOfRam; - - // align to highest 4MB boundary - offset = offset & 0xFFC00000; - - // start at top and look on 4MB boundaries for system table ptr structure - while(offset > 0) - { - //$printf "checking %x",offset$; - //$printf "value is %x",dword(offset)$; - - // low signature match - if(dword(offset) == 0x20494249) - { - // high signature match - if(dword(offset+4) == 0x54535953) - { - // less than 4GB? - if(dword(offset+0x0c) == 0) - { - // less than top of ram? - if(dword(offset+8) < TopOfRam) - { - return(dword(offset+8)); - } - } - } - - } - - if(offset < 0x400000) break; - offset = offset - 0x400000; - } - - return 0; -} -. - -define /r ProcessImage(ImageBase) -unsigned long ImageBase; -{ - $printf "ProcessImage %x", ImageBase$; -} -. - -define /r FindDebugInfo(SystemTable) -unsigned long SystemTable; -{ - unsigned long CfgTableEntries; - unsigned long ConfigTable; - unsigned long i; - unsigned long offset; - unsigned long dbghdr; - unsigned long dbgentries; - unsigned long dbgptr; - unsigned long dbginfo; - unsigned long loadedimg; - - $printf "FindDebugInfo"$; - - dbgentries = 0; - CfgTableEntries = dword(SystemTable + 0x40); - ConfigTable = dword(SystemTable + 0x44); - - $printf "config table is at %x (%d entries)", ConfigTable, CfgTableEntries$; - - // now search for debug info entry with guid 49152E77-1ADA-4764-B7A2-7AFEFED95E8B - // 0x49152E77 0x47641ADA 0xFE7AA2B7 0x8B5ED9FE - for(i=0; i -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -error = continue -unload -error = abort - -setreg @CP15_CONTROL = 0x0005107E -setreg @pc=0x80008208 -setreg @cpsr=0x000000D3 -dis/D -readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000 diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh deleted file mode 100644 index 46dd65cf3..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh +++ /dev/null @@ -1,22 +0,0 @@ -#!/bin/sh -# -# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http:#opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - - -IN=`/usr/bin/cygpath -u $1` -OUT=`/usr/bin/cygpath -u $2` - -/usr/bin/sed -e "s/\/cygdrive\/\(.\)/load\/a\/ni\/np \"\1:/g" \ - -e 's:\\:/:g' \ - -e "s/^/load\/a\/ni\/np \"/g" \ - -e "s/dll /dll\" \&/g" \ - $IN | /usr/bin/sort.exe --key=3 --output=$OUT diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc deleted file mode 100644 index c03a443e8..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc +++ /dev/null @@ -1,67 +0,0 @@ -// -// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// - -error = continue -unload -error = abort - -setreg @CP15_CONTROL = 0x0005107E -setreg @cpsr=0x000000D3 - -; General clock settings. -setmem /32 0x48307270=0x00000080 -setmem /32 0x48306D40=0x00000003 -setmem /32 0x48005140=0x03020A50 - -;Clock configuration -setmem /32 0x48004A40=0x0000030A -setmem /32 0x48004C40=0x00000015 - -;DPLL3 (Core) settings -setmem /32 0x48004D00=0x00370037 -setmem /32 0x48004D30=0x00000000 -setmem /32 0x48004D40=0x094C0C00 - -;DPLL4 (Peripheral) settings -setmem /32 0x48004D00=0x00370037 -setmem /32 0x48004D30=0x00000000 -setmem /32 0x48004D44=0x0001B00C -setmem /32 0x48004D48=0x00000009 - -;DPLL1 (MPU) settings -setmem /32 0x48004904=0x00000037 -setmem /32 0x48004934=0x00000000 -setmem /32 0x48004940=0x0011F40C -setmem /32 0x48004944=0x00000001 -setmem /32 0x48004948=0x00000000 - -;RAM setup. -setmem /16 0x6D000010=0x0000 -setmem /16 0x6D000040=0x0001 -setmem /16 0x6D000044=0x0100 -setmem /16 0x6D000048=0x0000 -setmem /32 0x6D000060=0x0000000A -setmem /32 0x6D000070=0x00000081 -setmem /16 0x6D000040=0x0003 -setmem /32 0x6D000080=0x02D04011 -setmem /16 0x6D000084=0x0032 -setmem /16 0x6D00008C=0x0000 -setmem /32 0x6D00009C=0xBA9DC4C6 -setmem /32 0x6D0000A0=0x00012522 -setmem /32 0x6D0000A4=0x0004E201 -setmem /16 0x6D000040=0x0003 -setmem /32 0x6D0000B0=0x02D04011 -setmem /16 0x6D0000B4=0x0032 -setmem /16 0x6D0000BC=0x0000 -setmem /32 0x6D0000C4=0xBA9DC4C6 -setmem /32 0x6D0000C8=0x00012522 -setmem /32 0x6D0000D4=0x0004E201 \ No newline at end of file diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc deleted file mode 100644 index a8f98433d..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc +++ /dev/null @@ -1,21 +0,0 @@ -// -// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// - -include 'ZZZZZZ/rvi_symbols_macros.inc' - -macro write_symbols_file("ZZZZZZ/rvi_symbols.tmp", 0x00000000, 0x10000000) - -host "bash -o igncr ZZZZZZ/rvi_convert_symbols.sh ZZZZZZ/rvi_symbols.tmp ZZZZZZ/rvi_symbols.inc" -include 'ZZZZZZ/rvi_symbols.inc' -load /NI /NP 'ZZZZZZ/rvi_dummy.axf' ;.constdata -unload rvi_dummy.axf -delfile rvi_dummy.axf diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc deleted file mode 100644 index 6f7377cbb..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc +++ /dev/null @@ -1,193 +0,0 @@ -// -// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// - -define /R int compare_guid(guid1, guid2) - unsigned char *guid1; - unsigned char *guid2; -{ - return strncmp(guid1, guid2, 16); -} -. - -define /R unsigned char * find_system_table(mem_start, mem_size) - unsigned char *mem_start; - unsigned long mem_size; -{ - unsigned char *mem_ptr; - - mem_ptr = mem_start + mem_size; - - do - { - mem_ptr -= 0x400000; // 4 MB - - if (strncmp(mem_ptr, "IBI SYST", 8) == 0) - { - return *(unsigned long *)(mem_ptr + 8); // EfiSystemTableBase - } - - } while (mem_ptr > mem_start); - - return 0; -} -. - -define /R unsigned char * find_debug_info_table_header(system_table) - unsigned char *system_table; -{ - unsigned long configuration_table_entries; - unsigned char *configuration_table; - unsigned long index; - unsigned char debug_table_guid[16]; - - // Fill in the debug table's guid - debug_table_guid[ 0] = 0x77; - debug_table_guid[ 1] = 0x2E; - debug_table_guid[ 2] = 0x15; - debug_table_guid[ 3] = 0x49; - debug_table_guid[ 4] = 0xDA; - debug_table_guid[ 5] = 0x1A; - debug_table_guid[ 6] = 0x64; - debug_table_guid[ 7] = 0x47; - debug_table_guid[ 8] = 0xB7; - debug_table_guid[ 9] = 0xA2; - debug_table_guid[10] = 0x7A; - debug_table_guid[11] = 0xFE; - debug_table_guid[12] = 0xFE; - debug_table_guid[13] = 0xD9; - debug_table_guid[14] = 0x5E; - debug_table_guid[15] = 0x8B; - - configuration_table_entries = *(unsigned long *)(system_table + 64); - configuration_table = *(unsigned long *)(system_table + 68); - - for (index = 0; index < configuration_table_entries; index++) - { - if (compare_guid(configuration_table, debug_table_guid) == 0) - { - return *(unsigned long *)(configuration_table + 16); - } - - configuration_table += 20; - } - - return 0; -} -. - -define /R int valid_pe_header(header) - unsigned char *header; -{ - if ((header[0x00] == 'M') && - (header[0x01] == 'Z') && - (header[0x80] == 'P') && - (header[0x81] == 'E')) - { - return 1; - } - - return 0; -} -. - -define /R unsigned long pe_headersize(header) - unsigned char *header; -{ - unsigned long *size; - - size = header + 0x00AC; - - return *size; -} -. - -define /R unsigned char *pe_filename(header) - unsigned char *header; -{ - unsigned long *debugOffset; - unsigned char *stringOffset; - - if (valid_pe_header(header)) - { - debugOffset = header + 0x0128; - stringOffset = header + *debugOffset + 0x002C; - - return stringOffset; - } - - return 0; -} -. - -define /R int char_is_valid(c) - unsigned char c; -{ - if (c >= 32 && c < 127) - return 1; - - return 0; -} -. - -define /R write_symbols_file(filename, mem_start, mem_size) - unsigned char *filename; - unsigned char *mem_start; - unsigned long mem_size; -{ - unsigned char *system_table; - unsigned char *debug_info_table_header; - unsigned char *debug_info_table; - unsigned long debug_info_table_size; - unsigned long index; - unsigned char *debug_image_info; - unsigned char *loaded_image_protocol; - unsigned char *image_base; - unsigned char *debug_filename; - unsigned long header_size; - int status; - - system_table = find_system_table(mem_start, mem_size); - if (system_table == 0) - { - return; - } - - status = fopen(88, filename, "w"); - - debug_info_table_header = find_debug_info_table_header(system_table); - - debug_info_table = *(unsigned long *)(debug_info_table_header + 8); - debug_info_table_size = *(unsigned long *)(debug_info_table_header + 4); - - for (index = 0; index < (debug_info_table_size * 4); index += 4) - { - debug_image_info = *(unsigned long *)(debug_info_table + index); - - if (debug_image_info == 0) - { - break; - } - - loaded_image_protocol = *(unsigned long *)(debug_image_info + 4); - - image_base = *(unsigned long *)(loaded_image_protocol + 32); - - debug_filename = pe_filename(image_base); - header_size = pe_headersize(image_base); - - $fprintf 88, "%s 0x%08x\n", debug_filename, image_base + header_size$; - } - - - fclose(88); -} -. diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc b/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc deleted file mode 100644 index 4a7e12b81..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc +++ /dev/null @@ -1,118 +0,0 @@ -// -// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
-// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// - -error = continue - -unload - -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 -delfile 1 - -error = abort diff --git a/SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.c b/SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.c deleted file mode 100644 index 2e13d1a42..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.c +++ /dev/null @@ -1,414 +0,0 @@ -/*++ -RealView EB FVB DXE Driver - -Copyright (c) 2010, Apple Inc. All rights reserved.
-This program and the accompanying materials -are licensed and made available under the terms and conditions of the -BSD License which accompanies this distribution. The full text of the -license may be found at http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - ---*/ - -#include - -#include -#include -#include -#include -#include -#include - -#include - - - -/** - The GetAttributes() function retrieves the attributes and - current settings of the block. - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. - - @param Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the - attributes and current settings are - returned. Type EFI_FVB_ATTRIBUTES_2 is defined - in EFI_FIRMWARE_VOLUME_HEADER. - - @retval EFI_SUCCESS The firmware volume attributes were - returned. - -**/ - -EFI_STATUS -EFIAPI -FvbGetAttributes ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ) -{ - return EFI_UNSUPPORTED; -} - - -/** - The SetAttributes() function sets configurable firmware volume - attributes and returns the new settings of the firmware volume. - - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. - - @param Attributes On input, Attributes is a pointer to - EFI_FVB_ATTRIBUTES_2 that contains the - desired firmware volume settings. On - successful return, it contains the new - settings of the firmware volume. Type - EFI_FVB_ATTRIBUTES_2 is defined in - EFI_FIRMWARE_VOLUME_HEADER. - - @retval EFI_SUCCESS The firmware volume attributes were returned. - - @retval EFI_INVALID_PARAMETER The attributes requested are in - conflict with the capabilities - as declared in the firmware - volume header. - -**/ -EFI_STATUS -EFIAPI -FvbSetAttributes ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes - ) -{ - return EFI_UNSUPPORTED; -} - - -/** - The GetPhysicalAddress() function retrieves the base address of - a memory-mapped firmware volume. This function should be called - only for memory-mapped firmware volumes. - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. - - @param Address Pointer to a caller-allocated - EFI_PHYSICAL_ADDRESS that, on successful - return from GetPhysicalAddress(), contains the - base address of the firmware volume. - - @retval EFI_SUCCESS The firmware volume base address was returned. - - @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped. - -**/ -EFI_STATUS -EFIAPI -FvbGetPhysicalAddress ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - OUT EFI_PHYSICAL_ADDRESS *Address - ) -{ - return EFI_UNSUPPORTED; -} - - -/** - The GetBlockSize() function retrieves the size of the requested - block. It also returns the number of additional blocks with - the identical size. The GetBlockSize() function is used to - retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER). - - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. - - @param Lba Indicates the block for which to return the size. - - @param BlockSize Pointer to a caller-allocated UINTN in which - the size of the block is returned. - - @param NumberOfBlocks Pointer to a caller-allocated UINTN in - which the number of consecutive blocks, - starting with Lba, is returned. All - blocks in this range have a size of - BlockSize. - - - @retval EFI_SUCCESS The firmware volume base address was returned. - - @retval EFI_INVALID_PARAMETER The requested LBA is out of range. - -**/ -EFI_STATUS -EFIAPI -FvbGetBlockSize ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - IN EFI_LBA Lba, - OUT UINTN *BlockSize, - OUT UINTN *NumberOfBlocks - ) -{ - return EFI_UNSUPPORTED; -} - - - -/** - Reads the specified number of bytes into a buffer from the specified block. - - The Read() function reads the requested number of bytes from the - requested block and stores them in the provided buffer. - Implementations should be mindful that the firmware volume - might be in the ReadDisabled state. If it is in this state, - the Read() function must return the status code - EFI_ACCESS_DENIED without modifying the contents of the - buffer. The Read() function must also prevent spanning block - boundaries. If a read is requested that would span a block - boundary, the read must read up to the boundary but not - beyond. The output parameter NumBytes must be set to correctly - indicate the number of bytes actually read. The caller must be - aware that a read may be partially completed. - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. - - @param Lba The starting logical block index - from which to read. - - @param Offset Offset into the block at which to begin reading. - - @param NumBytes Pointer to a UINTN. At entry, *NumBytes - contains the total size of the buffer. At - exit, *NumBytes contains the total number of - bytes read. - - @param Buffer Pointer to a caller-allocated buffer that will - be used to hold the data that is read. - - @retval EFI_SUCCESS The firmware volume was read successfully, - and contents are in Buffer. - - @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA - boundary. On output, NumBytes - contains the total number of bytes - returned in Buffer. - - @retval EFI_ACCESS_DENIED The firmware volume is in the - ReadDisabled state. - - @retval EFI_DEVICE_ERROR The block device is not - functioning correctly and could - not be read. - -**/ -EFI_STATUS -EFIAPI -FvbRead ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - IN EFI_LBA Lba, - IN UINTN Offset, - IN OUT UINTN *NumBytes, - IN OUT UINT8 *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - - -/** - Writes the specified number of bytes from the input buffer to the block. - - The Write() function writes the specified number of bytes from - the provided buffer to the specified block and offset. If the - firmware volume is sticky write, the caller must ensure that - all the bits of the specified range to write are in the - EFI_FVB_ERASE_POLARITY state before calling the Write() - function, or else the result will be unpredictable. This - unpredictability arises because, for a sticky-write firmware - volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY - state but cannot flip it back again. Before calling the - Write() function, it is recommended for the caller to first call - the EraseBlocks() function to erase the specified block to - write. A block erase cycle will transition bits from the - (NOT)EFI_FVB_ERASE_POLARITY state back to the - EFI_FVB_ERASE_POLARITY state. Implementations should be - mindful that the firmware volume might be in the WriteDisabled - state. If it is in this state, the Write() function must - return the status code EFI_ACCESS_DENIED without modifying the - contents of the firmware volume. The Write() function must - also prevent spanning block boundaries. If a write is - requested that spans a block boundary, the write must store up - to the boundary but not beyond. The output parameter NumBytes - must be set to correctly indicate the number of bytes actually - written. The caller must be aware that a write may be - partially completed. All writes, partial or otherwise, must be - fully flushed to the hardware before the Write() service - returns. - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. - - @param Lba The starting logical block index to write to. - - @param Offset Offset into the block at which to begin writing. - - @param NumBytes The pointer to a UINTN. At entry, *NumBytes - contains the total size of the buffer. At - exit, *NumBytes contains the total number of - bytes actually written. - - @param Buffer The pointer to a caller-allocated buffer that - contains the source for the write. - - @retval EFI_SUCCESS The firmware volume was written successfully. - - @retval EFI_BAD_BUFFER_SIZE The write was attempted across an - LBA boundary. On output, NumBytes - contains the total number of bytes - actually written. - - @retval EFI_ACCESS_DENIED The firmware volume is in the - WriteDisabled state. - - @retval EFI_DEVICE_ERROR The block device is malfunctioning - and could not be written. - - -**/ -EFI_STATUS -EFIAPI -FvbWrite ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - IN EFI_LBA Lba, - IN UINTN Offset, - IN OUT UINTN *NumBytes, - IN UINT8 *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - - -/** - Erases and initializes a firmware volume block. - - The EraseBlocks() function erases one or more blocks as denoted - by the variable argument list. The entire parameter list of - blocks must be verified before erasing any blocks. If a block is - requested that does not exist within the associated firmware - volume (it has a larger index than the last block of the - firmware volume), the EraseBlocks() function must return the - status code EFI_INVALID_PARAMETER without modifying the contents - of the firmware volume. Implementations should be mindful that - the firmware volume might be in the WriteDisabled state. If it - is in this state, the EraseBlocks() function must return the - status code EFI_ACCESS_DENIED without modifying the contents of - the firmware volume. All calls to EraseBlocks() must be fully - flushed to the hardware before the EraseBlocks() service - returns. - - @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL - instance. - - @param ... The variable argument list is a list of tuples. - Each tuple describes a range of LBAs to erase - and consists of the following: - - An EFI_LBA that indicates the starting LBA - - A UINTN that indicates the number of blocks to - erase. - - The list is terminated with an - EFI_LBA_LIST_TERMINATOR. For example, the - following indicates that two ranges of blocks - (5-7 and 10-11) are to be erased: EraseBlocks - (This, 5, 3, 10, 2, EFI_LBA_LIST_TERMINATOR); - - @retval EFI_SUCCESS The erase request successfully - completed. - - @retval EFI_ACCESS_DENIED The firmware volume is in the - WriteDisabled state. - @retval EFI_DEVICE_ERROR The block device is not functioning - correctly and could not be written. - The firmware device may have been - partially erased. - @retval EFI_INVALID_PARAMETER One or more of the LBAs listed - in the variable argument list do - not exist in the firmware volume. - -**/ -EFI_STATUS -EFIAPI -FvbEraseBlocks ( - IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, - ... - ) -{ - return EFI_UNSUPPORTED; -} - - -// -// Making this global saves a few bytes in image size -// -EFI_HANDLE gFvbHandle = NULL; - - -/// -/// The Firmware Volume Block Protocol is the low-level interface -/// to a firmware volume. File-level access to a firmware volume -/// should not be done using the Firmware Volume Block Protocol. -/// Normal access to a firmware volume must use the Firmware -/// Volume Protocol. Typically, only the file system driver that -/// produces the Firmware Volume Protocol will bind to the -/// Firmware Volume Block Protocol. -/// -EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL gFvbProtocol = { - FvbGetAttributes, - FvbSetAttributes, - FvbGetPhysicalAddress, - FvbGetBlockSize, - FvbRead, - FvbWrite, - FvbEraseBlocks, - /// - /// The handle of the parent firmware volume. - /// - NULL -}; - - -/** - Initialize the state information for the CPU Architectural Protocol - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -EFIAPI -FvbDxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - - Status = gBS->InstallMultipleProtocolInterfaces ( - &gFvbHandle, - &gEfiFirmwareVolumeBlockProtocolGuid, &gFvbProtocol, - NULL - ); - ASSERT_EFI_ERROR (Status); - - // SetVertAddressEvent () - - // GCD Map NAND as RT - - return Status; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf b/SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf deleted file mode 100644 index b3243e6f0..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf +++ /dev/null @@ -1,53 +0,0 @@ -#/** @file -# -# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD -# License which accompanies this distribution. The full text of the license -# may be found at http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = FvbDxe - FILE_GUID = 43ECE281-D9E2-4DD0-B304-E6A5689256F4 - MODULE_TYPE = DXE_RUNTIME_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = FvbDxeInitialize - - -[Sources.common] - FvbDxe.c - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec - -[LibraryClasses] - BaseLib - UefiLib - UefiBootServicesTableLib - DebugLib - PrintLib - UefiDriverEntryPoint - IoLib - -[Guids] - - -[Protocols] - gEfiFirmwareVolumeBlockProtocolGuid - -[FixedPcd.common] - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize - gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase - -[depex] - TRUE diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c b/SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c deleted file mode 100644 index 2fd2b8353..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c +++ /dev/null @@ -1,78 +0,0 @@ -/** @file - Template for ArmEb DebugAgentLib. - - For ARM we reserve FIQ for the Debug Agent Timer. We don't care about - laytency as we only really need the timer to run a few times a second - (how fast can some one type a ctrl-c?), but it works much better if - the interrupt we are using to break into the debugger is not being - used, and masked, by the system. - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -#include - -#include - - -/** - Setup all the hardware needed for the debug agents timer. - - This function is used to set up debug enviroment. - -**/ -VOID -EFIAPI -DebugAgentTimerIntialize ( - VOID - ) -{ - // Map Timer to FIQ -} - - -/** - Set the period for the debug agent timer. Zero means disable the timer. - - @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer. - -**/ -VOID -EFIAPI -DebugAgentTimerSetPeriod ( - IN UINT32 TimerPeriodMilliseconds - ) -{ - if (TimerPeriodMilliseconds == 0) { - // Disable timer and Disable FIQ - return; - } - - // Set timer period and unmask FIQ -} - - -/** - Perform End Of Interrupt for the debug agent timer. This is called in the - interrupt handler after the interrupt has been processed. - -**/ -VOID -EFIAPI -DebugAgentTimerEndOfInterrupt ( - VOID - ) -{ - // EOI Timer interrupt for FIQ -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf b/SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf deleted file mode 100644 index ee5438d2a..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf +++ /dev/null @@ -1,37 +0,0 @@ -#/** @file -# Component description file for Base PCI Cf8 Library. -# -# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles. -# Layers on top of an I/O Library instance. -# Copyright (c) 2007, Intel Corporation. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmEbDebugAgentTimerLib - FILE_GUID = 80949BBB-68EE-4a4c-B434-D5DB5A232F0C - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = DebugAgentTimerLib|SEC BASE DXE_CORE - - -[Sources.common] - DebugAgentTimerLib.c - - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec - -[LibraryClasses] - IoLib diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c deleted file mode 100644 index 2f734f692..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c +++ /dev/null @@ -1,210 +0,0 @@ -/** @file -* -* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include -#include -#include -#include - -ARM_CORE_INFO mExynosMpCoreInfo[] = { - { - // Cluster 0, Core 0 - 0x0, 0x0, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - }, - { - // Cluster 0, Core 1 - 0x0, 0x1, - - // MP Core MailBox Set/Get/Clear Addresses and Clear Value - (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG, - (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG, - (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG, - (UINT64)0xFFFFFFFF - } -}; -/** - Return if Trustzone is supported by your platform - - A non-zero value must be returned if you want to support a Secure World on your platform. - ArmPlatformTrustzoneInit() will later set up the secure regions. - This function can return 0 even if Trustzone is supported by your processor. In this case, - the platform will continue to run in Secure World. - - @return A non-zero value if Trustzone supported. - -**/ -UINTN ArmPlatformTrustzoneSupported(VOID) { - // There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM - return TRUE; -} - -/** - Initialize the Secure peripherals and memory regions - - If Trustzone is supported by your platform then this function makes the required initialization - of the secure peripherals and memory regions. - -**/ -VOID ArmPlatformTrustzoneInit(VOID) { - UINT32 TZPCBase; - TZPCBase = PcdGet32(PcdTZPCBase) + TZPC0_OFFSET; - MmioWrite32((TZPCBase + 0x00),0x00); - MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); - - TZPCBase = PcdGet32(PcdTZPCBase) + TZPC1_OFFSET; - MmioWrite32((TZPCBase + 0x00),0x00); - MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); - - TZPCBase = PcdGet32(PcdTZPCBase) + TZPC2_OFFSET; - MmioWrite32((TZPCBase + 0x00),0x00); - MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); - - TZPCBase = PcdGet32(PcdTZPCBase) + TZPC3_OFFSET; - MmioWrite32((TZPCBase + 0x00),0x00); - MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); - - TZPCBase = PcdGet32(PcdTZPCBase) + TZPC4_OFFSET; - MmioWrite32((TZPCBase + 0x00),0x00); - MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); - - - TZPCBase = PcdGet32(PcdTZPCBase) + TZPC5_OFFSET; - MmioWrite32((TZPCBase + 0x00),0x00); - MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); - MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); -} - -/** - Remap the memory at 0x0 - - Some platform requires or gives the ability to remap the memory at the address 0x0. - This function can do nothing if this feature is not relevant to your platform. - -**/ -VOID ArmPlatformBootRemapping(VOID) { - // Disable memory remapping and return to normal mapping - MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE -} - - -/** - Return the current Boot Mode - - This function returns the boot reason on the platform - - @return Return the current Boot Mode of the platform - -**/ -EFI_BOOT_MODE -ArmPlatformGetBootMode ( - VOID - ) -{ - return BOOT_WITH_FULL_CONFIGURATION; -} - -/** - Initialize the system (or sometimes called permanent) memory - - This memory is generally represented by the DRAM. - -**/ -VOID ArmPlatformInitializeSystemMemory(VOID) { - // We do not need to initialize the System Memory on RTSM -} - -RETURN_STATUS -ArmPlatformInitialize ( - IN UINTN MpId - ) -{ -return RETURN_SUCCESS; -} - - -VOID -ArmPlatformNormalInitialize ( - VOID - ) { - -} - -VOID -ArmPlatformSecExtraAction ( - IN UINTN CoreId, - OUT UINTN* JumpAddress - ) -{ - *JumpAddress = PcdGet32(PcdFvBaseAddress); -} - -EFI_STATUS -PrePeiCoreGetMpCoreInfo ( - OUT UINTN *CoreCount, - OUT ARM_CORE_INFO **ArmCoreTable - ) -{ - *CoreCount = sizeof(mExynosMpCoreInfo) / sizeof(ARM_CORE_INFO); - *ArmCoreTable = mExynosMpCoreInfo; - - return EFI_SUCCESS; -} - -// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore -EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; -ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; - -EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { - { - EFI_PEI_PPI_DESCRIPTOR_PPI, - &mArmMpCoreInfoPpiGuid, - &mMpCoreInfoPpi - } -}; - -VOID -ArmPlatformGetPlatformPpiList ( - OUT UINTN *PpiListSize, - OUT EFI_PEI_PPI_DESCRIPTOR **PpiList - ) -{ - *PpiListSize = sizeof(gPlatformPpiTable); - *PpiList = gPlatformPpiTable; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S deleted file mode 100644 index 9dc7abdf9..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S +++ /dev/null @@ -1,635 +0,0 @@ -/* - * Copyright (c) 2011, Samsung Electronics Co. All rights reserved. - * - * This program and the accompanying materials - * are licensed and made available under the terms and conditions of the BSD License - * which accompanies this distribution. The full text of the license may be found at - * http://opensource.org/licenses/bsd-license.php - * - * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - */ - -#include -#include -#include -#include -#include - -/* Start of Code section */ -.text -.align 3 - -GCC_ASM_IMPORT(_SetupPrimaryCoreStack) -GCC_ASM_EXPORT(ArmPlatformTZPCInitialized) -GCC_ASM_EXPORT(ArmPlatformUARTInitialized) -GCC_ASM_EXPORT(ArmPlatformIsClockInitialized) -GCC_ASM_EXPORT(ArmPlatformIsMemoryInitialized) -GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory) -GCC_ASM_EXPORT(ArmPlatformSecBootAction) -GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit) - -ASM_PFX(ArmPlatformTZPCInitialized): - ldr r0, =Exynos4210_TZPC0_BASE - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC1_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC2_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC3_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC4_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC5_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - bx lr - -ASM_PFX(ArmPlatformUARTInitialized): - ldr r0, =0x11400000 - ldr r1, =0x22222222 - str r1, [r0] - ldr r0, =0x11400020 - ldr r1, =0x222222 - str r1, [r0] - - ldr r0, =Exynos4210_CMU_BASE - ldr r1, =CLK_SRC_PERIL0_VAL - ldr r2, =CLK_SRC_PERIL0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_DIV_PERIL0_VAL - ldr r2, =CLK_DIV_PERIL0_OFFSET - str r1, [r0, r2] - - ldr r0, =Exynos4210_UART_BASE - ldr r1, =0x111 - str r1, [r0, #UFCON_OFFSET] - - mov r1, #0x3 - str r1, [r0, #ULCON_OFFSET] - - ldr r1, =0x3c5 - str r1, [r0, #UCON_OFFSET] - - ldr r1, =UART_UBRDIV_VAL - str r1, [r0, #UBRDIV_OFFSET] - - ldr r1, =UART_UDIVSLOT_VAL - str r1, [r0, #UDIVSLOT_OFFSET] - - ldr r1, =0x4c4c4c4c - str r1, [r0, #UTXH_OFFSET] // 'L' - - ldr r1, =0x4a4a4a4a - str r1, [r0, #UTXH_OFFSET] // 'J' - - ldr r1, =0x50505050 - str r1, [r0, #UTXH_OFFSET] // 'P' - - bx lr - - -ASM_PFX(ArmPlatformIsClockInitialized): - ldr r0, =Exynos4210_CMU_BASE - - ldr r1, =0x0 - ldr r2, =CLK_SRC_CPU_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_1: - subs r1, r1, #1 - bne cmu_1 - - ldr r1, =CLK_DIV_CPU0_VAL - ldr r2, =CLK_DIV_CPU0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_DIV_CPU1_VAL - ldr r2, =CLK_DIV_CPU1_OFFSET - str r1, [r0, r2] - - ldr r1, =0x10000 - ldr r2, =CLK_SRC_DMC_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_2: - subs r1, r1, #1 - bne cmu_2 - - ldr r1, =CLK_DIV_DMC0_VAL - ldr r2, =CLK_DIV_DMC0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_DIV_DMC1_VAL - ldr r2, =CLK_DIV_DMC1_OFFSET - str r1, [r0, r2] - - ldr r1, =CLK_SRC_TOP0_VAL - ldr r2, =CLK_SRC_TOP0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_SRC_TOP1_VAL - ldr r2, =CLK_SRC_TOP1_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY - -cmu_3: - subs r1, r1, #1 - bne cmu_3 - - ldr r1, =CLK_DIV_TOP_VAL - ldr r2, =CLK_DIV_TOP_OFFSET - str r1, [r0, r2] - - ldr r1, =CLK_SRC_LEFTBUS_VAL - ldr r2, =CLK_SRC_LEFTBUS_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_4: - subs r1, r1, #1 - bne cmu_4 - - ldr r1, =CLK_DIV_LEFRBUS_VAL - ldr r2, =CLK_DIV_LEFTBUS_OFFSET - str r1, [r0, r2] - - ldr r1, =CLK_SRC_RIGHTBUS_VAL - ldr r2, =CLK_SRC_RIGHTBUS_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_5: - subs r1, r1, #1 - bne cmu_5 - - ldr r1, =CLK_DIV_RIGHTBUS_VAL - ldr r2, =CLK_DIV_RIGHTBUS_OFFSET - str r1, [r0, r2] - - ldr r1, =APLL_LOCK_VAL - ldr r2, =APLL_LOCK_OFFSET - str r1, [r0, r2] - ldr r1, =MPLL_LOCK_VAL - ldr r2, =MPLL_LOCK_OFFSET - str r1, [r0, r2] - ldr r1, =EPLL_LOCK_VAL - ldr r2, =EPLL_LOCK_OFFSET - str r1, [r0, r2] - ldr r1, =VPLL_LOCK_VAL - ldr r2, =VPLL_LOCK_OFFSET - str r1, [r0, r2] - - ldr r1, =APLL_CON1_VAL - ldr r2, =APLL_CON1_OFFSET - str r1, [r0, r2] - - ldr r1, =APLL_CON0_VAL - ldr r2, =APLL_CON0_OFFSET - str r1, [r0, r2] - - ldr r1, =MPLL_CON1_VAL - ldr r2, =MPLL_CON1_OFFSET - str r1, [r0, r2] - ldr r1, =MPLL_CON0_VAL - ldr r2, =MPLL_CON0_OFFSET - str r1, [r0, r2] - - ldr r1, =EPLL_CON1_VAL - ldr r2, =EPLL_CON1_OFFSET - str r1, [r0, r2] - ldr r1, =EPLL_CON0_VAL - ldr r2, =EPLL_CON0_OFFSET - str r1, [r0, r2] - - ldr r1, =VPLL_CON1_VAL - ldr r2, =VPLL_CON1_OFFSET - str r1, [r0, r2] - ldr r1, =VPLL_CON0_VAL - ldr r2, =VPLL_CON0_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_6: - subs r1, r1, #1 - bne cmu_6 - - ldr r1, =CLK_SRC_CPU_VAL_MOUTMPLLFOUT - ldr r2, =CLK_SRC_CPU_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_7: - subs r1, r1, #1 - bne cmu_7 - - ldr r0, =Exynos4210_DMC_0_BASE - - ldr r1, =0x6910100A - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - ldr r1, =0x6910100B - - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_8: - subs r1, r1, #1 - bne cmu_8 - - ldr r1, =0x0000008C - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_9: - subs r1, r1, #1 - bne cmu_9 - - ldr r0, =Exynos4210_DMC_1_BASE - - ldr r1, =0xe910100A - - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - ldr r1, =0xe910100B - - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_10: - subs r1, r1, #1 - bne cmu_10 - - ldr r1, =0x0000008C - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_11: - subs r1, r1, #1 - bne cmu_11 - - ldr r0, =Exynos4210_DMC_0_BASE - ldr r1, =0x0FFF30fa - ldr r2, =DMC_CONCONTROL - str r1, [r0, r2] - ldr r0, =Exynos4210_DMC_1_BASE - ldr r1, =0x0FFF30fa - ldr r2, =DMC_CONCONTROL - str r1, [r0, r2] - - ldr r0, =Exynos4210_DMC_0_BASE - ldr r1, =0x00202537 - ldr r2, =DMC_MEMCONTROL - str r1, [r0, r2] - ldr r0, =Exynos4210_DMC_1_BASE - ldr r1, =0x00202537 - ldr r2, =DMC_MEMCONTROL - str r1, [r0, r2] - - bx lr - -/* - * Call at the beginning of the platform boot up - * - * This function allows the firmware platform to do extra actions at the early - * stage of the platform power up. - * - * Note: This function must be implemented in assembler - * as there is no stack set up yet - */ -ASM_PFX(ArmPlatformSecBootAction): - bx lr - - -ASM_PFX(ArmPlatformSecBootMemoryInit): - bx lr - -/* - * Called at the early stage of the Boot phase to know if the memory has - * already been initialized. Running the code from the reset vector does - * not mean we start from cold boot. In some case, we can go through this - * code with the memory already initialized. - * Because this function is called at the early stage, the implementation - * must not use the stack. Its implementation must probably done in - * assembly to ensure this requirement. - * - * @return Return the condition value into the 'Z' flag - */ -ASM_PFX(ArmPlatformIsMemoryInitialized): - /* - * Check if the memory has been already mapped, - * if so skipped the memory initialization - */ - LoadConstantToReg (Exynos4210_DMC_0_BASE, r0) - ldr r0, [r0, #0] - and r0, r0, #0x20 - cmp r0, #0x00 - bx lr - -/* - * Initialize the memory where the initial stacks will reside - * - * This memory can contain the initial stacks (Secure and Secure Monitor - * stacks). In some platform, this region is already initialized and the - * implementation of this function can do nothing. This memory can also - * represent the Secure RAM. - * This function is called before the satck has been set up. Its - * implementation must ensure the stack pointer is not used (probably - * required to use assembly language) - */ -ASM_PFX(ArmPlatformInitializeBootMemory): -/* - * Check if the Memory is already Initialized. - * If Initialized goto Stack setup - */ - mov r10, lr - bl ASM_PFX(ArmPlatformIsMemoryInitialized) - bne skip_initmem - - ldr r0, =0x10010350 - mov r1, #1 - str r1, [r0] - -/* CLK_DIV_DMC0 on iROM DMC=50MHz for Init DMC */ - ldr r0, =Exynos4210_CMU_BASE - ldr r1, =0x13113113 - ldr r2, =Exynos4210_CMU_DIV_DMC0 - str r1, [r0, r2] - -/* MIU Setting */ - ldr r0, =Exynos4210_MIU_BASE - - ldr r1, =0x20001507 - str r1, [r0, #0x400] - ldr r1, =0x00000001 - str r1, [r0, #0xc00] - -/*****************************************************************/ -/*DREX0***********************************************************/ -/*****************************************************************/ - - ldr r0, =Exynos4210_DMC_0_BASE - - ldr r1, =0xE3855503 - str r1, [r0, #DMC_PHYZQCONTROL] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x7110100A - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000000 - str r1, [r0, #DMC_PHYCONTROL2] - - ldr r1, =0x0FFF30da - str r1, [r0, #DMC_CONCONTROL] - - ldr r1, =0x00202500 - str r1, [r0, #DMC_MEMCONTROL] - - ldr r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] - - ldr r1, =0xff000000 - str r1, [r0, #DMC_PRECHCONFIG] - - ldr r1, =0x0000005D - str r1, [r0, #DMC_TIMINGAREF] - - ldr r1, =0x34498691 - str r1, [r0, #DMC_TIMINGROW] - - ldr r1, =0x36330306 - str r1, [r0, #DMC_TIMINGDATA] - - ldr r1, =0x50380365 - str r1, [r0, #DMC_TIMINGPOWER] - - mov r2, #Exynos4210_DMC_DELAY - -loop_2: - subs r2, r2, #1 - bne loop_2 - ldr r1, =0x07000000 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_3: - subs r2, r2, #1 - bne loop_3 - ldr r1, =0x00071C00 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_4: - subs r2, r2, #1 - bne loop_4 - - ldr r1, =0x00010BFC - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_5: - subs r2, r2, #1 - bne loop_5 - ldr r1, =0x00000488 - str r1, [r0, #DMC_DIRECTCMD] - ldr r1, =0x00000810 - str r1, [r0, #DMC_DIRECTCMD] - ldr r1, =0x00000C08 - str r1, [r0, #DMC_DIRECTCMD] - -/* get DMC density information */ - ldr r1, =0x09010000 - mov r3, #10 -loop_6: - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_7: - subs r2, r2, #1 - bne loop_7 - ldr r6, [r0, #DMC_MRSTATUS] - subs r3, r3, #1 - bne loop_6 - and r6, r6, #0x3c - lsr r6, r6, #2 - cmp r6, #6 - ldreq r1, =0x20e01323 - ldrne r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] - -/*****************************************************************/ -/*DREX1***********************************************************/ -/*****************************************************************/ - ldr r0, =Exynos4210_DMC_1_BASE - ldr r1, =0xE3855503 - str r1, [r0, #DMC_PHYZQCONTROL] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x7110100A - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000000 - str r1, [r0, #DMC_PHYCONTROL2] - - ldr r1, =0x0FFF30da - str r1, [r0, #DMC_CONCONTROL] - - ldr r1, =0x00202500 - str r1, [r0, #DMC_MEMCONTROL] - - ldr r1, =0x40f01223 - str r1, [r0, #DMC_MEMCONFIG0] - - ldr r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] - - ldr r1, =0xff000000 - str r1, [r0, #DMC_PRECHCONFIG] - - ldr r1, =0x0000005D - str r1, [r0, #DMC_TIMINGAREF] - - ldr r1, =0x34498691 - str r1, [r0, #DMC_TIMINGROW] - - ldr r1, =0x36330306 - str r1, [r0, #DMC_TIMINGDATA] - - ldr r1, =0x50380365 - str r1, [r0, #DMC_TIMINGPOWER] - - mov r2, #Exynos4210_DMC_DELAY -loop_8: - subs r2, r2, #1 - bne loop_8 - ldr r1, =0x07000000 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_9: - subs r2, r2, #1 - bne loop_9 - ldr r1, =0x00071C00 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_10: - subs r2, r2, #1 - bne loop_10 - - ldr r1, =0x00010BFC - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_11: - subs r2, r2, #1 - bne loop_11 - ldr r1, =0x00000488 - str r1, [r0, #DMC_DIRECTCMD] - - ldr r1, =0x00000810 - str r1, [r0, #DMC_DIRECTCMD] - - ldr r1, =0x00000C08 - str r1, [r0, #DMC_DIRECTCMD] - -/* get DMC density information */ - ldr r1, =0x09010000 - mov r3, #10 -loop_12: - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_13: - subs r2, r2, #1 - bne loop_13 - ldr r7, [r0, #DMC_MRSTATUS] - subs r3, r3, #1 - bne loop_12 - and r7, r7, #0x3c - lsr r7, r7, #2 - cmp r7, #6 - ldreq r1, =0x20e01323 - ldrne r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] -skip_initmem: - mov lr, r10 - bx lr - -.end diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm deleted file mode 100644 index 7960f22ee..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm +++ /dev/null @@ -1,609 +0,0 @@ -// -// Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -// -// This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// - -#include -#include -#include -#include -#include - - INCLUDE AsmMacroIoLib.inc - - EXPORT ArmPlatformTZPCInitialized - EXPORT ArmPlatformUARTInitialized - EXPORT ArmPlatformIsClockInitialized - EXPORT ArmPlatformIsMemoryInitialized - EXPORT ArmPlatformInitializeBootMemory - - PRESERVE8 - AREA ArmRealViewEbHelper, CODE, READONLY - -ArmPlatformTZPCInitialized - ldr r0, =Exynos4210_TZPC0_BASE - mov r1, #0x0 - str r1, [r0] - mov r1, #0xff - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC1_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC2_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC3_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC4_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - ldr r0, =Exynos4210_TZPC5_BASE - str r1, [r0, #TZPC_DECPROT0SET_OFFSET] - str r1, [r0, #TZPC_DECPROT1SET_OFFSET] - str r1, [r0, #TZPC_DECPROT2SET_OFFSET] - str r1, [r0, #TZPC_DECPROT3SET_OFFSET] - - bx lr - -ArmPlatformUARTInitialized - ldr r0, =0x11400000 - ldr r1, =0x22222222 - str r1, [r0] - ldr r0, =0x11400020 - ldr r1, =0x222222 - str r1, [r0] - - ldr r0, =Exynos4210_CMU_BASE - ldr r1, =CLK_SRC_PERIL0_VAL - ldr r2, =CLK_SRC_PERIL0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_DIV_PERIL0_VAL - ldr r2, =CLK_DIV_PERIL0_OFFSET - str r1, [r0, r2] - - ldr r0, =Exynos4210_UART_BASE - ldr r1, =0x111 - str r1, [r0, #UFCON_OFFSET] - - mov r1, #0x3 - str r1, [r0, #ULCON_OFFSET] - - ldr r1, =0x3c5 - str r1, [r0, #UCON_OFFSET] - - ldr r1, =UART_UBRDIV_VAL - str r1, [r0, #UBRDIV_OFFSET] - - ldr r1, =UART_UDIVSLOT_VAL - str r1, [r0, #UDIVSLOT_OFFSET] - - ldr r1, =0x4c4c4c4c - str r1, [r0, #UTXH_OFFSET] // 'L' - - ldr r1, =0x4a4a4a4a - str r1, [r0, #UTXH_OFFSET] // 'J' - - ldr r1, =0x50505050 - str r1, [r0, #UTXH_OFFSET] // 'P' - - bx lr - -ArmPlatformIsClockInitialized - ldr r0, =Exynos4210_CMU_BASE - - ldr r1, =0x0 - ldr r2, =CLK_SRC_CPU_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_1 - subs r1, r1, #1 - bne cmu_1 - - ldr r1, =CLK_DIV_CPU0_VAL - ldr r2, =CLK_DIV_CPU0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_DIV_CPU1_VAL - ldr r2, =CLK_DIV_CPU1_OFFSET - str r1, [r0, r2] - - ldr r1, =0x10000 - ldr r2, =CLK_SRC_DMC_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_2 - subs r1, r1, #1 - bne cmu_2 - - ldr r1, =CLK_DIV_DMC0_VAL - ldr r2, =CLK_DIV_DMC0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_DIV_DMC1_VAL - ldr r2, =CLK_DIV_DMC1_OFFSET - str r1, [r0, r2] - - ldr r1, =CLK_SRC_TOP0_VAL - ldr r2, =CLK_SRC_TOP0_OFFSET - str r1, [r0, r2] - ldr r1, =CLK_SRC_TOP1_VAL - ldr r2, =CLK_SRC_TOP1_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_3 - subs r1, r1, #1 - bne cmu_3 - - ldr r1, =CLK_DIV_TOP_VAL - ldr r2, =CLK_DIV_TOP_OFFSET - str r1, [r0, r2] - - ldr r1, =CLK_SRC_LEFTBUS_VAL - ldr r2, =CLK_SRC_LEFTBUS_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_4 - subs r1, r1, #1 - bne cmu_4 - - ldr r1, =CLK_DIV_LEFRBUS_VAL - ldr r2, =CLK_DIV_LEFTBUS_OFFSET - str r1, [r0, r2] - - ldr r1, =CLK_SRC_RIGHTBUS_VAL - ldr r2, =CLK_SRC_RIGHTBUS_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_5 - subs r1, r1, #1 - bne cmu_5 - - ldr r1, =CLK_DIV_RIGHTBUS_VAL - ldr r2, =CLK_DIV_RIGHTBUS_OFFSET - str r1, [r0, r2] - - ldr r1, =APLL_LOCK_VAL - ldr r2, =APLL_LOCK_OFFSET - str r1, [r0, r2] - ldr r1, =MPLL_LOCK_VAL - ldr r2, =MPLL_LOCK_OFFSET - str r1, [r0, r2] - ldr r1, =EPLL_LOCK_VAL - ldr r2, =EPLL_LOCK_OFFSET - str r1, [r0, r2] - ldr r1, =VPLL_LOCK_VAL - ldr r2, =VPLL_LOCK_OFFSET - str r1, [r0, r2] - - ldr r1, =APLL_CON1_VAL - ldr r2, =APLL_CON1_OFFSET - str r1, [r0, r2] - - ldr r1, =APLL_CON0_VAL - ldr r2, =APLL_CON0_OFFSET - str r1, [r0, r2] - - ldr r1, =MPLL_CON1_VAL - ldr r2, =MPLL_CON1_OFFSET - str r1, [r0, r2] - ldr r1, =MPLL_CON0_VAL - ldr r2, =MPLL_CON0_OFFSET - str r1, [r0, r2] - - ldr r1, =EPLL_CON1_VAL - ldr r2, =EPLL_CON1_OFFSET - str r1, [r0, r2] - ldr r1, =EPLL_CON0_VAL - ldr r2, =EPLL_CON0_OFFSET - str r1, [r0, r2] - - ldr r1, =VPLL_CON1_VAL - ldr r2, =VPLL_CON1_OFFSET - str r1, [r0, r2] - ldr r1, =VPLL_CON0_VAL - ldr r2, =VPLL_CON0_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_6 - subs r1, r1, #1 - bne cmu_6 - - ldr r1, =CLK_SRC_CPU_VAL_MOUTMPLLFOUT - ldr r2, =CLK_SRC_CPU_OFFSET - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_7 - subs r1, r1, #1 - bne cmu_7 - - ldr r0, =Exynos4210_DMC_0_BASE - - ldr r1, =0x6910100A - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - ldr r1, =0x6910100B - - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_8 - subs r1, r1, #1 - bne cmu_8 - - ldr r1, =0x0000008C - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_9 - subs r1, r1, #1 - bne cmu_9 - - ldr r0, =Exynos4210_DMC_1_BASE - - ldr r1, =0xe910100A - - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - ldr r1, =0xe910100B - - ldr r2, =DMC_PHYCONTROL0 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_10 - subs r1, r1, #1 - bne cmu_10 - - ldr r1, =0x0000008C - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - ldr r1, =0x00000084 - ldr r2, =DMC_PHYCONTROL1 - str r1, [r0, r2] - - mov r1, #Exynos4210_CMU_DELAY -cmu_11 - subs r1, r1, #1 - bne cmu_11 - - ldr r0, =Exynos4210_DMC_0_BASE - ldr r1, =0x0FFF30fa - ldr r2, =DMC_CONCONTROL - str r1, [r0, r2] - ldr r0, =Exynos4210_DMC_1_BASE - ldr r1, =0x0FFF30fa - ldr r2, =DMC_CONCONTROL - str r1, [r0, r2] - - ldr r0, =Exynos4210_DMC_0_BASE - ldr r1, =0x00202537 - ldr r2, =DMC_MEMCONTROL - str r1, [r0, r2] - ldr r0, =Exynos4210_DMC_1_BASE - ldr r1, =0x00202537 - ldr r2, =DMC_MEMCONTROL - str r1, [r0, r2] - - bx lr - -/** - Called at the early stage of the Boot phase to know if the memory has already been initialized - - Running the code from the reset vector does not mean we start from cold boot. In some case, we - can go through this code with the memory already initialized. - Because this function is called at the early stage, the implementation must not use the stack. - Its implementation must probably done in assembly to ensure this requirement. - - @return Return the condition value into the 'Z' flag - -**/ -ArmPlatformIsMemoryInitialized - // Check if the memory has been already mapped, if so skipped the memory initialization - LoadConstantToReg (Exynos4210_DMC_0_BASE, r0) - ldr r0, [r0, #0] - // Check Controller register is initialized or not by Auto-refresh bit - and r0, r0, #0x20 - cmp r0, #0x20 - bx lr -/** - Initialize the memory where the initial stacks will reside - - This memory can contain the initial stacks (Secure and Secure Monitor stacks). - In some platform, this region is already initialized and the implementation of this function can - do nothing. This memory can also represent the Secure RAM. - This function is called before the satck has been set up. Its implementation must ensure the stack - pointer is not used (probably required to use assembly language) - -**/ -ArmPlatformInitializeBootMemory - -//Async bridge configuration at CPU_core(1: half_sync 0: full_sync) - ldr r0, =0x10010350 - mov r1, #1 - str r1, [r0] - -//CLK_DIV_DMC0 on iROM DMC=50MHz for Init DMC - ldr r0, =Exynos4210_CMU_BASE - ldr r1, =0x13113113 - ldr r2, =Exynos4210_CMU_DIV_DMC0 - str r1, [r0, r2] - -//MIU Setting - ldr r0, =Exynos4210_MIU_BASE - - ldr r1, =0x20001507 - str r1, [r0, #0x400] - ldr r1, =0x00000001 - str r1, [r0, #0xc00] - -/*****************************************************************/ -/*DREX0***********************************************************/ -/*****************************************************************/ - - ldr r0, =Exynos4210_DMC_0_BASE - - ldr r1, =0xE3855503 - str r1, [r0, #DMC_PHYZQCONTROL] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x7110100A - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000000 - str r1, [r0, #DMC_PHYCONTROL2] - - ldr r1, =0x0FFF30da - str r1, [r0, #DMC_CONCONTROL] - - ldr r1, =0x00202500 - str r1, [r0, #DMC_MEMCONTROL] - - ldr r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] - - ldr r1, =0xff000000 - str r1, [r0, #DMC_PRECHCONFIG] - - ldr r1, =0x0000005D - str r1, [r0, #DMC_TIMINGAREF] - - ldr r1, =0x34498691 - str r1, [r0, #DMC_TIMINGROW] - - ldr r1, =0x36330306 - str r1, [r0, #DMC_TIMINGDATA] - - ldr r1, =0x50380365 - str r1, [r0, #DMC_TIMINGPOWER] - - mov r2, #Exynos4210_DMC_DELAY - -loop_2 - subs r2, r2, #1 - bne loop_2 - ldr r1, =0x07000000 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_3 - subs r2, r2, #1 - bne loop_3 - ldr r1, =0x00071C00 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_4 - subs r2, r2, #1 - bne loop_4 - - ldr r1, =0x00010BFC - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_5 - subs r2, r2, #1 - bne loop_5 - ldr r1, =0x00000488 - str r1, [r0, #DMC_DIRECTCMD] - ldr r1, =0x00000810 - str r1, [r0, #DMC_DIRECTCMD] - ldr r1, =0x00000C08 - str r1, [r0, #DMC_DIRECTCMD] -#if 1 -//get DMC density information - ldr r1, =0x09010000 - mov r3, #10 -loop_6 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_7 - subs r2, r2, #1 - bne loop_7 - ldr r6, [r0, #DMC_MRSTATUS] - subs r3, r3, #1 - bne loop_6 - and r6, r6, #0x3c - lsr r6, r6, #2 - cmp r6, #6 - ldreq r1, =0x20e01323 - ldrne r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] -#endif - -/*****************************************************************/ -/*DREX1***********************************************************/ -/*****************************************************************/ - ldr r0, =Exynos4210_DMC_1_BASE - ldr r1, =0xE3855503 - str r1, [r0, #DMC_PHYZQCONTROL] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x7110100A - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x71101008 - str r1, [r0, #DMC_PHYCONTROL0] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x0000008C - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000084 - str r1, [r0, #DMC_PHYCONTROL1] - - ldr r1, =0x00000000 - str r1, [r0, #DMC_PHYCONTROL2] - - ldr r1, =0x0FFF30da - str r1, [r0, #DMC_CONCONTROL] - - ldr r1, =0x00202500 - str r1, [r0, #DMC_MEMCONTROL] - - ldr r1, =0x40f01223 - str r1, [r0, #DMC_MEMCONFIG0] - - ldr r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] - - ldr r1, =0xff000000 - str r1, [r0, #DMC_PRECHCONFIG] - - ldr r1, =0x0000005D - str r1, [r0, #DMC_TIMINGAREF] - - ldr r1, =0x34498691 - str r1, [r0, #DMC_TIMINGROW] - - ldr r1, =0x36330306 - str r1, [r0, #DMC_TIMINGDATA] - - ldr r1, =0x50380365 - str r1, [r0, #DMC_TIMINGPOWER] - - mov r2, #Exynos4210_DMC_DELAY -loop_8 - subs r2, r2, #1 - bne loop_8 - ldr r1, =0x07000000 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_9 - subs r2, r2, #1 - bne loop_9 - ldr r1, =0x00071C00 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_10 - subs r2, r2, #1 - bne loop_10 - - ldr r1, =0x00010BFC - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_11 - subs r2, r2, #1 - bne loop_11 - ldr r1, =0x00000488 - str r1, [r0, #DMC_DIRECTCMD] - - ldr r1, =0x00000810 - str r1, [r0, #DMC_DIRECTCMD] - - ldr r1, =0x00000C08 - str r1, [r0, #DMC_DIRECTCMD] - -#if 1 -// get DMC density information - ldr r1, =0x09010000 - mov r3, #10 -loop_12 - str r1, [r0, #DMC_DIRECTCMD] - mov r2, #Exynos4210_DMC_DELAY -loop_13 - subs r2, r2, #1 - bne loop_13 - ldr r7, [r0, #DMC_MRSTATUS] - subs r3, r3, #1 - bne loop_12 - and r7, r7, #0x3c - lsr r7, r7, #2 - cmp r7, #6 - ldreq r1, =0x20e01323 - ldrne r1, =0x20f01223 - str r1, [r0, #DMC_MEMCONFIG0] -#endif - - bx lr - - END diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf deleted file mode 100644 index 0ef5c8818..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf +++ /dev/null @@ -1,49 +0,0 @@ -#/* @file -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = SmdkBoardLib - FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmPlatformLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - -[LibraryClasses] - IoLib - ArmLib - - -[Sources.common] - SmdkBoard.c - SmdkBoardMem.c - -[Protocols] - -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - gArmPlatformTokenSpaceGuid.PcdStandalone -[FixedPcd] - gArmTokenSpaceGuid.PcdFvBaseAddress - gArmTokenSpaceGuid.PcdSystemMemoryBase - gArmTokenSpaceGuid.PcdSystemMemorySize - gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize - gExynosPkgTokenSpaceGuid.PcdTZPCBase diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c deleted file mode 100644 index db1a163c8..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c +++ /dev/null @@ -1,210 +0,0 @@ -/** @file -* -* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include - -// DDR attributes -#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK -#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED -#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK -#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED - -#if 0 -/** - Return the information about the memory region in permanent memory used by PEI - - One of the PEI Module must install the permament memory used by PEI. This function returns the - information about this region for your platform to this PEIM module. - - @param[out] PeiMemoryBase Base of the memory region used by PEI core and modules - @param[out] PeiMemorySize Size of the memory region used by PEI core and modules - -**/ -VOID ArmPlatformGetPeiMemory ( - OUT UINTN* PeiMemoryBase, - OUT UINTN* PeiMemorySize - ) { - ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL)); - - // *PeiMemoryBase = ARM_EB_DRAM_BASE + ARM_EB_EFI_FIX_ADDRESS_REGION_SZ; - // *PeiMemorySize = ARM_EB_EFI_MEMORY_REGION_SZ; - *PeiMemoryBase = PcdGet32(PcdSystemMemoryBase) + PcdGet32(PcdSystemMemoryFixRegionSize); - *PeiMemorySize = PcdGet32(PcdSystemMemoryUefiRegionSize); -} -#endif -/** - Return the Virtual Memory Map of your platform - - This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform. - - @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- - Virtual Memory mapping. This array must be ended by a zero-filled - entry - -**/ -VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) { -// UINT32 val32; - UINT32 CacheAttributes; - ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; - - ASSERT(VirtualMemoryMap != NULL); - - VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 5); - if (VirtualMemoryTable == NULL) { - return; - } - - if (FeaturePcdGet(PcdCacheEnable) == TRUE) { - CacheAttributes = DDR_ATTRIBUTES_CACHED; - } else { - CacheAttributes = DDR_ATTRIBUTES_UNCACHED; - } - - // SFR - VirtualMemoryTable[0].PhysicalBase = 0x00000000; - VirtualMemoryTable[0].VirtualBase = 0x00000000; - VirtualMemoryTable[0].Length = 0x20000000; - VirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; - - // DDR - VirtualMemoryTable[1].PhysicalBase = 0x40000000; - VirtualMemoryTable[1].VirtualBase = 0x40000000; - VirtualMemoryTable[1].Length = 0x0e000000; - VirtualMemoryTable[1].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes; - - // framebuffer - VirtualMemoryTable[2].PhysicalBase = 0x4e000000; - VirtualMemoryTable[2].VirtualBase = 0x4e000000; - VirtualMemoryTable[2].Length = 0x02000000; - VirtualMemoryTable[2].Attributes = DDR_ATTRIBUTES_UNCACHED; - - VirtualMemoryTable[3].PhysicalBase = 0x50000000; - VirtualMemoryTable[3].VirtualBase = 0x50000000; - VirtualMemoryTable[3].Length = 0xb0000000; - VirtualMemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes; - - // End of Table - VirtualMemoryTable[4].PhysicalBase = 0; - VirtualMemoryTable[4].VirtualBase = 0; - VirtualMemoryTable[4].Length = 0; - VirtualMemoryTable[4].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; - - *VirtualMemoryMap = VirtualMemoryTable; -} - - - -#if 0 -/** - Return the EFI Memory Map of your platform - - This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource - Descriptor HOBs used by DXE core. - - @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an - EFI Memory region. This array must be ended by a zero-filled entry - -**/ -VOID ArmPlatformGetEfiMemoryMap ( - OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap -) { - EFI_RESOURCE_ATTRIBUTE_TYPE Attributes; - UINT64 MemoryBase; - UINTN Index = 0; - ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR *EfiMemoryTable; - - ASSERT(EfiMemoryMap != NULL); - - EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6); - - Attributes = - ( - EFI_RESOURCE_ATTRIBUTE_PRESENT | - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | - EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | - EFI_RESOURCE_ATTRIBUTE_TESTED - ); - MemoryBase = PcdGet32(PcdSystemMemoryBase);//ARM_EB_DRAM_BASE; - - // Memory Reserved for fixed address allocations (such as Exception Vector Table) - EfiMemoryTable[Index].ResourceAttribute = Attributes; - EfiMemoryTable[Index].PhysicalStart = MemoryBase; - EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdSystemMemoryFixRegionSize);//ARM_EB_EFI_FIX_ADDRESS_REGION_SZ; - - MemoryBase += PcdGet32(PcdSystemMemoryFixRegionSize);//ARM_EB_EFI_FIX_ADDRESS_REGION_SZ; - - // Memory declared to PEI as permanent memory for PEI and DXE - EfiMemoryTable[++Index].ResourceAttribute = Attributes; - EfiMemoryTable[Index].PhysicalStart = MemoryBase; - EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdSystemMemoryUefiRegionSize);//ARM_EB_EFI_MEMORY_REGION_SZ; - - MemoryBase += PcdGet32(PcdSystemMemoryUefiRegionSize);//ARM_EB_EFI_MEMORY_REGION_SZ; - - // We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000 - if (!PcdGet32(PcdStandalone)) { - // Chunk between the EFI Memory region and the firmware - EfiMemoryTable[++Index].ResourceAttribute = Attributes; - EfiMemoryTable[Index].PhysicalStart = MemoryBase; - //EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase; - EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase; - - // Chunk reserved by the firmware in DRAM - EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT); - //EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress); - EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress); - //EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize); - EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize); - - //MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize); - MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize); - } - - // We allocate all the remain memory as untested system memory - EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED); - EfiMemoryTable[Index].PhysicalStart = MemoryBase; - EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdSystemMemorySize) - (MemoryBase-PcdGet32(PcdSystemMemoryBase)); - - EfiMemoryTable[++Index].ResourceAttribute = 0; - EfiMemoryTable[Index].PhysicalStart = 0; - EfiMemoryTable[Index].NumberOfBytes = 0; - - *EfiMemoryMap = EfiMemoryTable; -} -#endif - -/** - Return the EFI Memory Map of your platform - - This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource - Descriptor HOBs used by DXE core. - - @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an - EFI Memory region. This array must be ended by a zero-filled entry - -**/ -EFI_STATUS -ArmPlatformGetAdditionalSystemMemory ( - OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap -) { - -// ArmPlatformGetEfiMemoryMap(EfiMemoryMap); - //return EFI_SUCCESS; - return EFI_UNSUPPORTED; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c deleted file mode 100644 index 9471df2fb..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c +++ /dev/null @@ -1,57 +0,0 @@ -/** @file -* -* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include -#include -#include - - -/** - Initialize controllers that must setup at the early stage - - Some peripherals must be initialized in Secure World. - For example, some L2x0 requires to be initialized in Secure World - ============ added by girish to resolve compile error================= -**/ - -VOID -ArmPlatformSecInitialize ( - VOID - ) { - // The L2x0 controller must be intialize in Secure World - L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase), - PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES), - PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES), - 0,~0, // Use default setting for the Auxiliary Control Register - FALSE); - -} - -/** - Initialize the Secure peripherals and memory regions - - If Trustzone is supported by your platform then this function makes the required initialization - of the secure peripherals and memory regions. - -**/ -VOID -ArmPlatformSecTrustzoneInit ( - IN UINTN MpId - ) -{ -return; -} diff --git a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf b/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf deleted file mode 100644 index f8f7228db..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf +++ /dev/null @@ -1,50 +0,0 @@ -#/* @file -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = SmdkBoardSecLib - FILE_GUID = 6e02ebe0-1d96-11e0-b9cb-0002a5d5c51b - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmPlatformLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec - -[LibraryClasses] - IoLib - ArmLib - L2X0CacheLib - -[Sources.common] - SmdkBoard.c - SmdkBoardSec.c - SmdkBoardHelper.asm | RVCT - SmdkBoardHelper.S | GCC - -[Protocols] - -[FeaturePcd] - gEmbeddedTokenSpaceGuid.PcdCacheEnable - gArmPlatformTokenSpaceGuid.PcdStandalone - -[FixedPcd] - gArmTokenSpaceGuid.PcdFvBaseAddress - gArmTokenSpaceGuid.PcdL2x0ControllerBase - gExynosPkgTokenSpaceGuid.PcdTZPCBase diff --git a/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc b/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc deleted file mode 100644 index 846fddce6..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc +++ /dev/null @@ -1,475 +0,0 @@ -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -################################################################################ -# -# Defines Section - statements that will be processed to create a Makefile. -# -################################################################################ -[Defines] - PLATFORM_NAME = SmdkBoard-Exynos - PLATFORM_GUID = 66a5a01d-be0a-4398-9b74-5af4a261381f - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010005 - OUTPUT_DIRECTORY = Build/SmdkBoard-Exynos - SUPPORTED_ARCHITECTURES = ARM - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - FLASH_DEFINITION = SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf - -[LibraryClasses.common] -!if $(TARGET) == RELEASE - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf -!else - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf -!endif - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf - ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf - ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf - BaseLib|MdePkg/Library/BaseLib/BaseLib.inf - BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf - DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf - EfiResetSystemLib|SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf - EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf - EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf - PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf - PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - - # - # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window - # in the debugger will show load and unload commands for symbols. You can cut and paste this - # into the command window to load symbols. We should be able to use a script to do this, but - # the version of RVD I have does not support scripts accessing system memory. - # - CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf - DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf - IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf - PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf - SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - UefiLib|MdePkg/Library/UefiLib/UefiLib.inf - UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf - UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf - UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf - UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf - -# -# Assume everything is fixed at build -# - ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf - CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf - DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf - DebugAgentTimerLib|SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf - EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf - EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - SerialPortLib|SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf - TimerLib|SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf - UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf - - # Samsung specific - BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf - DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf - GdbSerialLib|SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf - - # iky for usb host - HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf - UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf - UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf - -[LibraryClasses.common.SEC] - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf - ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf - ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - # L2 Cache Driver - L2X0CacheLib|ArmPlatformPkg/Drivers/PL310L2Cache/PL310L2CacheSec.inf - -!if $(EDK2_SKIP_PEICORE)==1 - PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf - ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf - LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf - MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf - HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf - PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf - PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf - MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf -!endif - -[LibraryClasses.common.PEI_CORE] - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf - ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf - OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf - # note: this won't actually work since globals in PEI are not writeable - # need to generate an ARM PEI services table pointer implementation - PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf - PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf - PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - -[LibraryClasses.common.PEIM] - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf - ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf - OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf - # note: this won't actually work since globals in PEI are not writeable - # need to generate an ARM PEI services table pointer implementation - PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf - PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf - PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf - ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - -[LibraryClasses.common.DXE_CORE] - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf - DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf - ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf - HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf - MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf - -[LibraryClasses.common.DXE_DRIVER] - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf - DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf - -[LibraryClasses.common.UEFI_APPLICATION] - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf - -[LibraryClasses.common.UEFI_DRIVER] - ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf - -[LibraryClasses.common.DXE_RUNTIME_DRIVER] - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf - -[LibraryClasses.ARM] - # - # It is not possible to prevent the ARM compiler for generic intrinsic functions. - # This library provides the instrinsic functions generate by a given compiler. - # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. - # - NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf - -[BuildOptions] - RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb --fpu=softvfp -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - GCC:*_*_ARM_CC_FLAGS = -Os -mword-relocations -mfpu=vfp -ffixed-r8 - GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform - XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - - -################################################################################ -# -# Pcd Section - list of all EDK II PCD Entries defined by this Platform -# -################################################################################ - -[PcdsFeatureFlag.common] - gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE - gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE - gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE - gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE - gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE - gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE - gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE - -!if $(EDK2_SKIP_PEICORE) == 1 - gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE - gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE -!endif - gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE - -[PcdsFixedAtBuild.common] - gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"SMDK4210" - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32 - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 - gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 - gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 - gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 - gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 - gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF - gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 - gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 - gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 - -# DEBUG_ASSERT_ENABLED 0x01 -# DEBUG_PRINT_ENABLED 0x02 -# DEBUG_CODE_ENABLED 0x04 -# CLEAR_MEMORY_ENABLED 0x08 -# ASSERT_BREAKPOINT_ENABLED 0x10 -# ASSERT_DEADLOOP_ENABLED 0x20 - gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f - -# DEBUG_INIT 0x00000001 // Initialization -# DEBUG_WARN 0x00000002 // Warnings -# DEBUG_LOAD 0x00000004 // Load events -# DEBUG_FS 0x00000008 // EFI File system -# DEBUG_POOL 0x00000010 // Alloc & Free's -# DEBUG_PAGE 0x00000020 // Alloc & Free's -# DEBUG_INFO 0x00000040 // Verbose -# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers -# DEBUG_VARIABLE 0x00000100 // Variable -# DEBUG_BM 0x00000400 // Boot Manager -# DEBUG_BLKIO 0x00001000 // BlkIo Driver -# DEBUG_NET 0x00004000 // SNI Driver -# DEBUG_UNDI 0x00010000 // UNDI Driver -# DEBUG_LOADFILE 0x00020000 // UNDI Driver -# DEBUG_EVENT 0x00080000 // Event messages -# DEBUG_ERROR 0x80000000 // Error - gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F - gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 - gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|"" - gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07 - gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000 - -# -# Optional feature to help prevent EFI memory map fragments -# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob -# Values are in EFI Pages (4K). DXE Core will make sure that -# at least this much of each type of memory can be allocated -# from a single memory range. This way you only end up with -# maximum of two fragements for each type in the memory map -# (the memory used, and the free memory that was prereserved -# but not used). -# - gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000 - gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x01000000 - # Stacks for MPCores in Secure World - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World - - # Stacks for MPCores in Monitor Mode - gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x4A000000 # Top of SEC Stack for Monitor World - gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x2000 # Stack for each of the 4 CPU cores - gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x48000000 - gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 - - # Stacks for MPCores in Normal World - gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms - gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000 - gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000 - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x0f - gArmTokenSpaceGuid.PcdArmPrimaryCore|0x00 - gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE - # - # ARM Pcds - # - gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000 - # - # ARM EB PCDS - # - gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000 - gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0x13810000 - gExynosPkgTokenSpaceGuid.PcdCmuBase|0x10030000 - gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0x139d0000 - gExynosPkgTokenSpaceGuid.PcdPmuBase|0x10020000 - gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0x11400000 - gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0x11000000 - gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0x12530000 - gExynosPkgTokenSpaceGuid.PcdSysBase|0x10010000 - gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0x11C00000 - gExynosPkgTokenSpaceGuid.PcdGICBase|0x10500000 - gExynosPkgTokenSpaceGuid.PcdTZPCBase|0x10100000 - # - # ARM PL390 General Interrupt Controller - # - gArmTokenSpaceGuid.PcdGicDistributorBase|0x10490000 - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x10480000 - - # - # ARM OS Loader - # - #gArmTokenSpaceGuid.PcdArmMachineType|2925 - gArmTokenSpaceGuid.PcdArmMachineType|2456 - gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"SD-MMC Booting" - gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x6F20736B,0x1D6E74,0x58A400)/zImage" - gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"root=/dev/mmcblk0p2 rw rootwait console=ttySAC1,115200 init=/linuxrc" - gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1 - gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|L"Samsung Exynos4210-SMDK Board" - -# Use the Serial console (ConIn & ConOut) and the Graphic driver (ConOut) - gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi();VenHw(c5deae31-fad2-4030-841b-cfc9644d2c5b)" - gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" - gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|10 - - # - # ARM L2x0 PCDs - # - gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x10502000 - -################################################################################ -# -# Components Section - list of all EDK II Modules needed by this Platform -# -################################################################################ -[Components.common] - -# -# SEC -# - ArmPlatformPkg/Sec/Sec.inf - -# -# PEI Phase modules -# -!if $(EDK2_SKIP_PEICORE) == 1 - ArmPlatformPkg/PrePi/PeiMPCore.inf { - - ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf - ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf - ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf - ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf - } -!else - ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf { - - ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf - } - MdeModulePkg/Core/Pei/PeiMain.inf - MdeModulePkg/Universal/PCD/Pei/Pcd.inf { - - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - } - ArmPlatformPkg/PlatformPei/PlatformPeim.inf - ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf - ArmPkg/Drivers/CpuPei/CpuPei.inf - IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf - Nt32Pkg/BootModePei/BootModePei.inf - MdeModulePkg/Universal/Variable/Pei/VariablePei.inf - MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { - - NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf - } -!endif - -# -# DXE -# - MdeModulePkg/Core/Dxe/DxeMain.inf { - - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf - } - - # - # Architectural Protocols - # - ArmPkg/Drivers/CpuDxe/CpuDxe.inf - EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf - EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - EmbeddedPkg/SerialDxe/SerialDxe.inf - - MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf - SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf - SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf - - # - # Samsung specific Driver - # - ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf - SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf - SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf{ - - ExynosLib|SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf - } - - # - # Semi-hosting filesystem - # - ArmPkg/Filesystem/SemihostFs/SemihostFs.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - FatPkg/EnhancedFatDxe/Fat.inf - MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - # - # Application - # - EmbeddedPkg/Ebl/Ebl.inf - - # - # Bds - # - MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - ArmPlatformPkg/Bds/Bds.inf - - MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf diff --git a/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf b/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf deleted file mode 100644 index 73f845552..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf +++ /dev/null @@ -1,316 +0,0 @@ -# FLASH layout file for ARM VE. -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -################################################################################ -# -# FD Section -# The [FD] Section is made up of the definition statements and a -# description of what goes into the Flash Device Image. Each FD section -# defines one flash "device" image. A flash device image may be one of -# the following: Removable media bootable image (like a boot floppy -# image,) an Option ROM image (that would be "flashed" into an add-in -# card,) a System "Flash" image (that would be burned into a system's -# flash) or an Update ("Capsule") image that will be used to update and -# existing system flash. -# -################################################################################ - - -[FD.SmdkBoard_EFI] -BaseAddress = 0x43E00000|gArmTokenSpaceGuid.PcdFdBaseAddress -Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize -ErasePolarity = 1 -BlockSize = 0x00010000 -NumBlocks = 0x20 - -################################################################################ -# -# Following are lists of FD Region layout which correspond to the locations of different -# images within the flash device. -# -# Regions must be defined in ascending order and may not overlap. -# -# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by -# the pipe "|" character, followed by the size of the region, also in hex with the leading -# "0x" characters. Like: -# Offset|Size -# PcdOffsetCName|PcdSizeCName -# RegionType -# -################################################################################ - -0x00000000|0x00100000 -gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize -FV = FVMAIN_COMPACT - -0x00110000|0x00010000 -gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize -#NV_VARIABLE_STORE -DATA = { - ## This is the EFI_FIRMWARE_VOLUME_HEADER - # ZeroVector [] - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - # FileSystemGuid: gEfiSystemNvDataFvGuid = - # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} - 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, - 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, - # FvLength: 0x20000 - 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, - #Signature "_FVH" #Attributes - 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, - #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision - 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02, - #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block - 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, - #Blockmap[1]: End - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - ## This is the VARIABLE_STORE_HEADER - #Signature: gEfiVariableGuid = - # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} - 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, - 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, - #Size: 0x10000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xFFB8 - # This can speed up the Variable Dispatch a bit. - 0xB8, 0xFF, 0x00, 0x00, - #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 - 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 -} - -################################################################################ -# -# FV Section -# -# [FV] section is used to define what components or modules are placed within a flash -# device file. This section also defines order the components and modules are positioned -# within the image. The [FV] section consists of define statements, set statements and -# module statements. -# -################################################################################ - -[FV.FVMAIN] -BlockSize = 0x40 -NumBlocks = 0 # This FV gets compressed so make it just big enough -FvAlignment = 8 # FV alignment and FV attributes setting. -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF MdeModulePkg/Core/Dxe/DxeMain.inf - - # - # PI DXE Drivers producing Architectural Protocols (EFI Services) - # - INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf - INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf - INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf - INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf - INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf - INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf - - INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf - INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf - INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf - INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf - INF EmbeddedPkg/SerialDxe/SerialDxe.inf - - - INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf - INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf - INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf - INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf - - INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf - INF SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf - - # - # ACPI Support - # - - # - # Samsung specific Driver - # - INF SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf - INF SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf - # - # PCI EMULATION - # - # - # Semi-hosting filesystem - # - INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf - - # - # FAT filesystem + GPT/MBR partitioning - # - INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf - INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf - INF FatPkg/EnhancedFatDxe/Fat.inf - INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf - - # - # USB HOST STACK - # - INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf - - # - # UEFI application (Shell Embedded Boot Loader) - # - INF EmbeddedPkg/Ebl/Ebl.inf - - - # - # Bds - # - INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf - INF ArmPlatformPkg/Bds/Bds.inf - -[FV.FVMAIN_COMPACT] -FvAlignment = 8 -ERASE_POLARITY = 1 -MEMORY_MAPPED = TRUE -STICKY_WRITE = TRUE -LOCK_CAP = TRUE -LOCK_STATUS = TRUE -WRITE_DISABLED_CAP = TRUE -WRITE_ENABLED_CAP = TRUE -WRITE_STATUS = TRUE -WRITE_LOCK_CAP = TRUE -WRITE_LOCK_STATUS = TRUE -READ_DISABLED_CAP = TRUE -READ_ENABLED_CAP = TRUE -READ_STATUS = TRUE -READ_LOCK_CAP = TRUE -READ_LOCK_STATUS = TRUE - - INF ArmPlatformPkg/PrePi/PeiMPCore.inf - FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { - SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { - SECTION FV_IMAGE = FVMAIN - } - } - - -################################################################################ -# -# Rules are use with the [FV] section's module INF type to define -# how an FFS file is created for a given INF file. The following Rule are the default -# rules for the different module type. User can add the customized rules to define the -# content of the FFS file. -# -################################################################################ - - -############################################################################ -# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # -############################################################################ -# -#[Rule.Common.DXE_DRIVER] -# FILE DRIVER = $(NAMED_GUID) { -# DXE_DEPEX DXE_DEPEX Optional |.depex -# COMPRESS PI_STD { -# GUIDED { -# PE32 PE32 |.efi -# UI STRING="$(MODULE_NAME)" Optional -# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) -# } -# } -# } -# -############################################################################ - -[Rule.Common.SEC] - FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { - TE TE Align = 32 |.efi - } - -[Rule.Common.PEI_CORE] - FILE PEI_CORE = $(NAMED_GUID) { - TE TE |.efi - UI STRING ="$(MODULE_NAME)" Optional - } - -[Rule.Common.PEIM] - FILE PEIM = $(NAMED_GUID) { - PEI_DEPEX PEI_DEPEX Optional |.depex - TE TE |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.PEIM.TIANOCOMPRESSED] - FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { - PEI_DEPEX PEI_DEPEX Optional |.depex - GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - } - -[Rule.Common.DXE_CORE] - FILE DXE_CORE = $(NAMED_GUID) { - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.UEFI_DRIVER] - FILE DRIVER = $(NAMED_GUID) { - DXE_DEPEX DXE_DEPEX Optional |.depex - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.DXE_DRIVER] - FILE DRIVER = $(NAMED_GUID) { - DXE_DEPEX DXE_DEPEX Optional |.depex - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.DXE_RUNTIME_DRIVER] - FILE DRIVER = $(NAMED_GUID) { - DXE_DEPEX DXE_DEPEX Optional |.depex - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.USER_DEFINED.ACPITABLE] - FILE FREEFORM = $(NAMED_GUID) { - RAW ACPI |.acpi - RAW ASL |.aml - UI STRING="$(MODULE_NAME)" Optional - } - -[Rule.Common.UEFI_APPLICATION] - FILE APPLICATION = $(NAMED_GUID) { - PE32 PE32 |.efi - UI STRING ="$(MODULE_NAME)" Optional - } - -[Rule.Common.UEFI_APPLICATION.BINARY] - FILE APPLICATION = $(NAMED_GUID) { - PE32 PE32 |.efi - UI STRING="$(MODULE_NAME)" Optional - VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) - } diff --git a/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec b/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec deleted file mode 100644 index f4afba182..000000000 --- a/SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec +++ /dev/null @@ -1,43 +0,0 @@ -#/** @file -# Arm RealView EB package. -# -# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
-# -# This program and the accompanying materials are licensed and made -# available under the terms and conditions of the BSD License which -# accompanies this distribution. -# The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - DEC_SPECIFICATION = 0x00010005 - PACKAGE_NAME = SmdkBoardPkg - PACKAGE_GUID = 4c9e432c-b84e-44fd-a796-f4545deec144 - PACKAGE_VERSION = 0.1 - -################################################################################ -# -# Include Section - list of Include Paths that are provided by this package. -# Comments are used for Keywords and Module Types. -# -# Supported Module Types: -# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER -# DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION -# -################################################################################ -[Includes.common] -# Include # Root include for the package - -[Guids.common] #bc92b024-79f8-11e0-a039-0026b9733e2c - gSmdkBoardPkgTokenSpaceGuid = { 0xbc92b024, 0x79f8, 0x11e0, { 0xa0, 0x39, 0x00, 0x26, 0xb9, 0x73, 0x3e, 0x2c} } - -[PcdsFeatureFlag.common] - -[PcdsFixedAtBuild.common] - -[Protocols.common] diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dec b/SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dec new file mode 100644 index 000000000..dee89469c --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dec @@ -0,0 +1,55 @@ +#/** @file +# Arm RealView EB package. +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# +# This program and the accompanying materials are licensed and made available under +# the terms and conditions of the BSD License which accompanies this distribution. +# The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + DEC_SPECIFICATION = 0x00010005 + PACKAGE_NAME = ExynosPkg + PACKAGE_GUID = ec1a4982-4a00-47e7-8df5-69c8ce895427 + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes.common] + Include # Root include for the package + +[Guids.common] + gExynosPkgTokenSpaceGuid = { 0x70b6655a, 0x7a03, 0x11e0, { 0xbe, 0x19, 0x00, 0x26, 0xb9, 0x73, 0x3e, 0x2c} } + +[PcdsFeatureFlag.common] + +[PcdsFixedAtBuild.common] + gExynosPkgTokenSpaceGuid.PcdPeiServicePtrAddr|0|UINT32|0x00000003 + gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0|UINT32|0x00000004 + gExynosPkgTokenSpaceGuid.PcdCmuBase|0|UINT32|0x00000005 + gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0|UINT32|0x00000006 + gExynosPkgTokenSpaceGuid.PcdPmuBase|0|UINT32|0x00000007 + gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0|UINT32|0x00000008 + gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0|UINT32|0x00000009 + gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0|UINT32|0x0000000a + gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0|UINT32|0x0000000b + gExynosPkgTokenSpaceGuid.PcdSysBase|0|UINT32|0x0000000c + gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0|UINT32|0x0000000d + gExynosPkgTokenSpaceGuid.PcdGICBase|0|UINT32|0x0000000e + gExynosPkgTokenSpaceGuid.PcdTZPCBase|0|UINT32|0x0000000f + +# Samsung specific GUID = be26dd4f-9d02-413c-aa4f-dcd4aa334122 +[Protocols.common] diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dsc b/SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dsc new file mode 100644 index 000000000..ef0a689b7 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/ExynosPkg.dsc @@ -0,0 +1,120 @@ +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = ExynosPkg + PLATFORM_GUID = 216e3ea0-f2b3-4d6f-a286-4d71431185c6 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/ExynosPkg + SUPPORTED_ARCHITECTURES = ARM + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + DEFINE TARGET_HACK = DEBUG + +[LibraryClasses.common] + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf + + DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf + TimerLib|SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf + UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf + + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + +[LibraryClasses.common.DXE_DRIVER] + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + ExynosLib|SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf + +[LibraryClasses.ARM] + # + # It is not possible to prevent the ARM compiler for generic intrinsic functions. + # This library provides the instrinsic functions generate by a given compiler. + # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. + # + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf + +[BuildOptions] + RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb --fpu=softvfp + RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 + RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb + GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 + XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 + XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 + XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + +[PcdsFixedAtBuild.common] + + gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000 + gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0x13810000 + gExynosPkgTokenSpaceGuid.PcdCmuBase|0x10030000 + gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0x139d0000 + gExynosPkgTokenSpaceGuid.PcdPmuBase|0x10020000 + gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0x11400000 + gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0x11000000 + gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0x12530000 + gExynosPkgTokenSpaceGuid.PcdSysBase|0x10010000 + gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0x11C00000 + gExynosPkgTokenSpaceGuid.PcdGICBase|0x10500000 + gExynosPkgTokenSpaceGuid.PcdTZPCBase|0x10100000 + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common] + SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf + SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf + SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf + SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf + + SamsungPlatformPkg/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf + SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf + SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.c b/SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.c new file mode 100644 index 000000000..68234c444 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.c @@ -0,0 +1,175 @@ +/** @file + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +#include +#include +#include +#include +#include +#include + + + +EFI_STATUS +Get ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + OUT UINTN *Value + ) +{ + UINTN Port; + UINTN Pin; + UINT32 DataInRegister; + + if (Value == NULL) + { + return EFI_UNSUPPORTED; + } + + Port = GPIO_PORT(Gpio); + Pin = GPIO_PIN(Gpio); + + DataInRegister = GpioBase(Port) + GPIO_DATAIN; + + if (MmioRead32 (DataInRegister) & GPIO_DATAIN_MASK(Pin)) { + *Value = 1; + } else { + *Value = 0; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +Set ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + IN EXYNOS_GPIO_MODE Mode + ) +{ + UINTN Port; + UINTN Pin; + UINT32 OutputRegister; + + Port = GPIO_PORT(Gpio); + Pin = GPIO_PIN(Gpio); + OutputRegister = GpioBase(Port) + GPIO_CON; + switch (Mode) + { + case GPIO_MODE_INPUT: + break; + case GPIO_MODE_OUTPUT_0: + MmioAndThenOr32(OutputRegister, ~GPIO_SFN_MASK(Pin), GPIO_OP_EN(Pin)); + MmioAndThenOr32((GpioBase(Port) + GPIO_DATAIN), ~GPIO_DATAIN_MASK(Pin), GPIO_DATA_LOW(Pin)); + break; + case GPIO_MODE_OUTPUT_1: + MmioAndThenOr32(OutputRegister, ~GPIO_SFN_MASK(Pin), GPIO_OP_EN(Pin)); + MmioAndThenOr32((GpioBase(Port) + GPIO_DATAIN), ~GPIO_DATAIN_MASK(Pin), GPIO_DATA_HIGH(Pin)); + break; + case GPIO_MODE_SPECIAL_FUNCTION_2: + MmioAndThenOr32(OutputRegister, ~GPIO_SFN_MASK(Pin), GPIO_SFN_EN(Pin)); + break; + default: + return EFI_UNSUPPORTED; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +GetMode ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + OUT EXYNOS_GPIO_MODE *Mode + ) +{ + return EFI_UNSUPPORTED; +} + +EFI_STATUS +SetPull ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + IN EXYNOS_GPIO_PULL Direction + ) +{ + UINTN Port; + UINTN Pin; + UINT32 OutputRegister; + + Port = GPIO_PORT(Gpio); + Pin = GPIO_PIN(Gpio); + OutputRegister = GpioBase(Port) + GPIO_PUD; + switch (Direction) + { + case GPIO_PULL_NONE: + MmioAndThenOr32(OutputRegister, ~GPIO_PUD_MASK(Pin), GPIO_PUD_DIS(Pin)); + break; + case GPIO_PULL_UP: + MmioAndThenOr32(OutputRegister, ~GPIO_PUD_MASK(Pin), GPIO_PUP_EN(Pin)); + break; + case GPIO_PULL_DOWN: + MmioAndThenOr32(OutputRegister, ~GPIO_PUD_MASK(Pin), GPIO_PDN_EN(Pin)); + break; + default: + return EFI_UNSUPPORTED; + } + + return EFI_SUCCESS; +} + + + +EFI_STATUS +SetStrength ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + IN EXYNOS_GPIO_STRN Strength + ) +{ + UINTN Port; + UINTN Pin; + UINT32 OutputRegister; + + Port = GPIO_PORT(Gpio); + Pin = GPIO_PIN(Gpio); + OutputRegister = GpioBase(Port) + GPIO_DRV; + MmioAndThenOr32(OutputRegister, ~GPIO_DRV_MASK(Pin), GPIO_DRV_SET(Strength,Pin)); + + return EFI_SUCCESS; +} + + + +EXYNOS_GPIO Gpio = { + Get, + Set, + GetMode, + SetPull, + SetStrength +}; + +EFI_STATUS +GpioInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = gBS->InstallMultipleProtocolInterfaces(&ImageHandle, &gSamsungPlatformGpioProtocolGuid, &Gpio, NULL); + return Status; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.inf b/SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.inf new file mode 100644 index 000000000..f1c4e8080 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Gpio/Gpio.inf @@ -0,0 +1,46 @@ +#/** @file +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = Gpio + FILE_GUID = E7D9CAE1-6930-46E3-BDF9-0027446E7DF2 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = GpioInitialize + + +[Sources.common] + Gpio.c + +[Packages] + MdePkg/MdePkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + SamsungPlatformPkg/SamsungPlatformPkg.dec + +[LibraryClasses] + IoLib + UefiDriverEntryPoint + ExynosLib + DebugLib + +[Guids] + +[Protocols] + gSamsungPlatformGpioProtocolGuid + +[Pcd] + +[depex] + TRUE diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ComponentName.c b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ComponentName.c new file mode 100755 index 000000000..1918cf862 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ComponentName.c @@ -0,0 +1,182 @@ +/** @file + UEFI Component Name(2) protocol implementation for GraphicsConsole driver. + +Copyright (c) 2006, Intel Corporation. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "GraphicsConsole.h" + +// +// EFI Component Name Protocol +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gGraphicsConsoleComponentName = { + GraphicsConsoleComponentNameGetDriverName, + GraphicsConsoleComponentNameGetControllerName, + "eng" +}; + +// +// EFI Component Name 2 Protocol +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gGraphicsConsoleComponentName2 = { + (EFI_COMPONENT_NAME2_GET_DRIVER_NAME) GraphicsConsoleComponentNameGetDriverName, + (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME) GraphicsConsoleComponentNameGetControllerName, + "en" +}; + + +GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mGraphicsConsoleDriverNameTable[] = { + { + "eng;en", + (CHAR16 *)L"UGA Console Driver" + }, + { + NULL, + NULL + } +}; + +/** + Retrieves a Unicode string that is the user readable name of the driver. + + This function retrieves the user readable name of a driver in the form of a + Unicode string. If the driver specified by This has a user readable name in + the language specified by Language, then a pointer to the driver name is + returned in DriverName, and EFI_SUCCESS is returned. If the driver specified + by This does not support the language specified by Language, + then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified + in RFC 4646 or ISO 639-2 language code format. + + @param DriverName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by + This and the language specified by Language was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ) +{ + return LookupUnicodeString2 ( + Language, + This->SupportedLanguages, + mGraphicsConsoleDriverNameTable, + DriverName, + (BOOLEAN)(This == &gGraphicsConsoleComponentName) + ); +} + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by a driver. + + This function retrieves the user readable name of the controller specified by + ControllerHandle and ChildHandle in the form of a Unicode string. If the + driver specified by This has a user readable name in the language specified by + Language, then a pointer to the controller name is returned in ControllerName, + and EFI_SUCCESS is returned. If the driver specified by This is not currently + managing the controller specified by ControllerHandle and ChildHandle, + then EFI_UNSUPPORTED is returned. If the driver specified by This does not + support the language specified by Language, then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param ControllerHandle[in] The handle of a controller that the driver + specified by This is managing. This handle + specifies the controller whose name is to be + returned. + + @param ChildHandle[in] The handle of the child controller to retrieve + the name of. This is an optional parameter that + may be NULL. It will be NULL for device + drivers. It will also be NULL for a bus drivers + that wish to retrieve the name of the bus + controller. It will not be NULL for a bus + driver that wishes to retrieve the name of a + child controller. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified in + RFC 4646 or ISO 639-2 language code format. + + @param ControllerName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + controller specified by ControllerHandle and + ChildHandle in the language specified by + Language from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in + the language specified by Language for the + driver specified by This was returned in + DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid + EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ) +{ + return EFI_UNSUPPORTED; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c new file mode 100755 index 000000000..72e9f8ac3 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.c @@ -0,0 +1,575 @@ +/** @file + Template for Timer Architecture Protocol driver of the ARM flavor + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "ExynosGop.h" +#include "GraphicsConsole.h" + + +//#define LCD_AMS369FG06 +#define LCD_WA101S + +#ifdef LCD_AMS369FG06 +#define LCD_WIDTH 480 +#define LCD_HEIGHT 800 +#define VCLK 24360000 +#endif + +#ifdef LCD_WA101S +#define LCD_WIDTH 1366 +#define LCD_HEIGHT 768 +#define VCLK 72332000 +#endif + +#define SRC_CLK 133333333 +#define FB_ADDR 0x4E000000 + +/** + This function configures the Power Domain of the LCD 0 Module to Normal Mode. +**/ +VOID ConfigureLcdPower(VOID) +{ + UINT32 PrevGateState; + + /* Enable LCD0 power domain */ + PrevGateState = MmioRead32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET)); + + MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET), \ + ~CLK_PPMULCD0_MASK,CLK_PPMULCD0_MASK); + MmioWrite32((PcdGet32(PcdPmuBase) + PMU_LCD0_CONF_OFFSET), \ + LCD0_PWR_NRML_MODE); + while( (MmioRead32((PcdGet32(PcdPmuBase) + PMU_LCD0_STAT_OFFSET)) \ + & LCD0_PWR_NRML_MODE) != LCD0_PWR_NRML_MODE); + + MmioWrite32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET), PrevGateState); +} + +/** + This function configures Clock Source,Clock gating,Clock Divider and Mask values for the + FIMD0 in the LCD0 Module + +**/ +VOID ConfigureLcd0Clk(VOID) +{ + MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKGATE_IP_LCD0_OFFSET), \ + ~CLKGATE_FIMD0_MASK,CLKGATE_FIMD0_MASK); + /* MPLL is the clock source of FIMD0 IP */ + MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKSRC_LCD0_OFFSET), \ + ~CLKSRC_FIMD0_MASK, CLKSRC_FIMD0_SEL(FIMD0_SCLKMPLL)); + + /* Considering MPLL=800000000(800 MHz), SCLK_FIMD0=133333333(133.33 MHz) => DIV => (800/133.33) => 6 + The DIV value to be programmed should be (6 -1) = 5 */ + MmioAndThenOr32((PcdGet32(PcdCmuBase) + CLKDIV_LCD0_OFFSET), \ + ~CLKDIV_FIMD0_MASK, CLKDIV_FIMD0_SEL(FIMD0_CLK_DIV)); + + MmioOr32((PcdGet32(PcdCmuBase) + CLKSRC_MASK_LCD0_OFFSET), FIMD0_UNMASK); +} + +/** + This function does the necessary GPIO configuration for the Initialization of the LCD + +**/ +#ifdef LCD_WA101S +VOID ConfigureLcdGpio(VOID) +{ + EFI_STATUS Status; + EXYNOS_GPIO *Gpio; + + Status = gBS->LocateProtocol(&gSamsungPlatformGpioProtocolGuid, NULL, (VOID **)&Gpio); + ASSERT_EFI_ERROR(Status); + +/******************************************************************************** + GPIO Control + Pull Up/Down + Driving strenght Setting of GPIO Port F0 for LCD +********************************************************************************/ + Gpio->Set(Gpio,LCD_HSYNC,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VSYNC,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VDEN,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VCLK,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_0,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_1,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_2,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_3,GPIO_MODE_SPECIAL_FUNCTION_2); + + Gpio->SetPull(Gpio,LCD_HSYNC,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VSYNC,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VDEN,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VCLK,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_0,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_1,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_2,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_3,GPIO_PULL_NONE); + + + Gpio->SetStrength(Gpio,LCD_HSYNC,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VSYNC,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VDEN,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VCLK,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_0,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_1,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_2,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_3,GPIO_DRV_4X); + +/******************************************************************************** + GPIO Control + Pull Up/Down + Driving strenght Setting of GPIO Port F1 for LCD +********************************************************************************/ + Gpio->Set(Gpio,LCD_VD_4,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_5,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_6,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_7,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_8,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_9,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_10,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_11,GPIO_MODE_SPECIAL_FUNCTION_2); + + Gpio->SetPull(Gpio,LCD_VD_4,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_5,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_6,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_7,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_8,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_9,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_10,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_11,GPIO_PULL_NONE); + + + Gpio->SetStrength(Gpio,LCD_VD_4,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_5,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_6,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_7,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_8,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_9,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_10,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_11,GPIO_DRV_4X); + +/******************************************************************************** + GPIO Control + Pull Up/Down + Driving strenght Setting of GPIO Port F2 for LCD +********************************************************************************/ + Gpio->Set(Gpio,LCD_VD_12,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_13,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_14,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_15,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_16,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_17,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_18,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_19,GPIO_MODE_SPECIAL_FUNCTION_2); + + Gpio->SetPull(Gpio,LCD_VD_12,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_13,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_14,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_15,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_16,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_17,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_18,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_19,GPIO_PULL_NONE); + + + Gpio->SetStrength(Gpio,LCD_VD_12,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_13,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_14,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_15,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_16,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_17,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_18,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_19,GPIO_DRV_4X); + +/******************************************************************************** + GPIO Control + Pull Up/Down + Driving strenght Setting of GPIO Port F3 for LCD +********************************************************************************/ + Gpio->Set(Gpio,LCD_VD_20,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_21,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_22,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,LCD_VD_23,GPIO_MODE_SPECIAL_FUNCTION_2); + + Gpio->SetPull(Gpio,LCD_VD_20,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_21,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_22,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,LCD_VD_23,GPIO_PULL_NONE); + + + Gpio->SetStrength(Gpio,LCD_VD_20,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_21,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_22,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,LCD_VD_23,GPIO_DRV_4X); + + /* Set FIMD0 bypass */ + MmioOr32((PcdGet32(PcdSysBase) + SYS_DISPLAY_CONTROL_OFFSET), FIMDBYPASS_LBLK0); + +} + +/** + This function configures POrt D0 Pin1 as the Output Pin to control the Enable/Disable of + LCD BackLight + +**/ +VOID EnableBackLight(VOID) +{ + EFI_STATUS Status; + EXYNOS_GPIO *Gpio; + + Status = gBS->LocateProtocol(&gSamsungPlatformGpioProtocolGuid, NULL, (VOID **)&Gpio); + ASSERT_EFI_ERROR(Status); + + Gpio->Set(Gpio,LCD_BACKLIGHT,GPIO_MODE_OUTPUT_1); +} + +VOID lcd_on(VOID) +{ +} +#endif + + +VOID LCD_Initialize(VOID) +{ + UINTN div; + UINT32 Fimd0BaseAddr; + gBS->SetMem((VOID *)FB_ADDR, (LCD_WIDTH*LCD_HEIGHT*4), 0x0); + + Fimd0BaseAddr = PcdGet32(PcdFIMD0Base); + ConfigureLcdPower(); + ConfigureLcdGpio(); + ConfigureLcd0Clk(); + + /* Configure FIMD */ + MmioAndThenOr32(Fimd0BaseAddr + VIDCON0_OFFSET, ~S5P_VIDCON0_VIDOUT_MASK, S5P_VIDCON0_VIDOUT_RGB); + + MmioAndThenOr32(Fimd0BaseAddr + VIDCON2_OFFSET, ~(S5P_VIDCON2_WB_MASK | S5P_VIDCON2_TVFORMATSEL_MASK | \ + S5P_VIDCON2_TVFORMATSEL_YUV_MASK), S5P_VIDCON2_WB_DISABLE); + + MmioAndThenOr32(Fimd0BaseAddr + VIDCON0_OFFSET, ~S5P_VIDCON0_PNRMODE_MASK, S5P_VIDCON0_PNRMODE_RGB_P); + +#ifdef LCD_WA101S + MmioOr32(Fimd0BaseAddr + VIDCON1_OFFSET, (S5P_VIDCON1_IVCLK_RISING_EDGE | S5P_VIDCON1_IHSYNC_INVERT | \ + S5P_VIDCON1_IVSYNC_INVERT | S5P_VIDCON1_IVDEN_NORMAL)); + + MmioOr32(Fimd0BaseAddr + VIDTCON0_OFFSET, (S5P_VIDTCON0_VBPDE(-1) | S5P_VIDTCON0_VBPD(13) | \ + S5P_VIDTCON0_VFPD(2) | S5P_VIDTCON0_VSPW(4))); + + MmioOr32(Fimd0BaseAddr + VIDTCON1_OFFSET, (S5P_VIDTCON1_VFPDE(-1) | S5P_VIDTCON1_HBPD(79) | \ + S5P_VIDTCON1_HFPD(47) | S5P_VIDTCON1_HSPW(31))); + +#endif + + MmioOr32(Fimd0BaseAddr + VIDTCON2_OFFSET, (S5P_VIDTCON2_HOZVAL(LCD_WIDTH - 1) | S5P_VIDTCON2_LINEVAL(LCD_HEIGHT - 1))); + + MmioAndThenOr32(Fimd0BaseAddr + WINCON_OFFSET(0), ~(S5P_WINCON_BITSWP_ENABLE | S5P_WINCON_BYTESWP_ENABLE | \ + S5P_WINCON_HAWSWP_ENABLE | S5P_WINCON_WSWP_ENABLE | S5P_WINCON_BURSTLEN_MASK | \ + S5P_WINCON_BPPMODE_MASK | S5P_WINCON_INRGB_MASK | S5P_WINCON_DATAPATH_MASK), \ + (S5P_WINCON_WSWP_ENABLE | S5P_WINCON_BURSTLEN_16WORD | \ + S5P_WINCON_BPPMODE_24BPP_888)); + + MmioOr32(Fimd0BaseAddr + WINSHMAP_OFFSET, S5P_WINSHMAP_PROTECT(0)); + MmioWrite32(Fimd0BaseAddr + VIDOSD_A_OFFSET(0), (S5P_VIDOSD_LEFT_X(0) | S5P_VIDOSD_TOP_Y(0))); + MmioWrite32(Fimd0BaseAddr + VIDOSD_B_OFFSET(0), (S5P_VIDOSD_RIGHT_X(LCD_WIDTH - 1) | \ + S5P_VIDOSD_BOTTOM_Y(LCD_HEIGHT - 1))); + MmioAnd32(Fimd0BaseAddr + WINSHMAP_OFFSET, ~(S5P_WINSHMAP_PROTECT(0))); + + MmioWrite32(Fimd0BaseAddr + VIDOSD_C_OFFSET(0), S5P_VIDOSD_SIZE(LCD_WIDTH * LCD_HEIGHT)); + + MmioOr32(Fimd0BaseAddr + WINSHMAP_OFFSET, S5P_WINSHMAP_PROTECT(0)); + MmioWrite32(Fimd0BaseAddr + VIDADDR_START0_OFFSET(0), FB_ADDR); + MmioWrite32(Fimd0BaseAddr + VIDADDR_END0_OFFSET(0), (FB_ADDR + (LCD_WIDTH * LCD_HEIGHT * 4))); + MmioAnd32(Fimd0BaseAddr + WINSHMAP_OFFSET, ~(S5P_WINSHMAP_PROTECT(0))); + + MmioWrite32(Fimd0BaseAddr + VIDADDR_SIZE_OFFSET(0), (S5P_VIDADDR_PAGEWIDTH(LCD_WIDTH * 4) | S5P_VIDADDR_OFFSIZE(0))); + + div = SRC_CLK / VCLK; + if(SRC_CLK % VCLK) + div++; + + MmioAndThenOr32(Fimd0BaseAddr + VIDCON0_OFFSET, ~(S5P_VIDCON0_CLKVALUP_MASK | S5P_VIDCON0_VCLKEN_MASK), \ + (S5P_VIDCON0_CLKVALUP_ALWAYS | S5P_VIDCON0_VCLKEN_NORMAL | \ + S5P_VIDCON0_CLKVAL_F(div - 1))); + + MmioOr32(Fimd0BaseAddr + WINCON_OFFSET(0), S5P_WINCON_ENWIN_ENABLE); + MmioOr32(Fimd0BaseAddr + WINSHMAP_OFFSET, S5P_WINSHMAP_CH_ENABLE(0)); + + MmioOr32(Fimd0BaseAddr + VIDCON0_OFFSET, (S5P_VIDCON0_ENVID_ENABLE | S5P_VIDCON0_ENVID_F_ENABLE)); + + EnableBackLight(); + + lcd_on(); +} + +EFI_STATUS +EFIAPI +DisplayQueryMode( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN UINT32 ModeNumber, + OUT UINTN *SizeOfInfo, + OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info + ); + +EFI_STATUS +EFIAPI +DisplaySetMode( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN UINT32 ModeNumber + ); + +EFI_STATUS +EFIAPI +DisplayBlt( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL + IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation, + IN UINTN SourceX, + IN UINTN SourceY, + IN UINTN DestinationX, + IN UINTN DestinationY, + IN UINTN Width, + IN UINTN Height, + IN UINTN Delta OPTIONAL + ); + +EFI_GRAPHICS_OUTPUT_PROTOCOL gDisplay = { + DisplayQueryMode, + DisplaySetMode, + DisplayBlt, + NULL +}; + + +EFI_STATUS +EFIAPI +DisplayQueryMode( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN UINT32 ModeNumber, + OUT UINTN *SizeOfInfo, + OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info + ) +{ + EFI_STATUS Status; + + Status = gBS->AllocatePool( + EfiBootServicesData, + sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION), + (VOID **)Info + ); + ASSERT_EFI_ERROR(Status); + + *SizeOfInfo = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION); + + (*Info)->Version = This->Mode->Info->Version; + (*Info)->HorizontalResolution = This->Mode->Info->HorizontalResolution; + (*Info)->VerticalResolution = This->Mode->Info->VerticalResolution; + (*Info)->PixelFormat = This->Mode->Info->PixelFormat; + (*Info)->PixelsPerScanLine = This->Mode->Info->PixelsPerScanLine; + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +DisplaySetMode( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN UINT32 ModeNumber + ) +{ + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +DisplayBlt( + IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This, + IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL + IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation, + IN UINTN SourceX, + IN UINTN SourceY, + IN UINTN DestinationX, + IN UINTN DestinationY, + IN UINTN Width, + IN UINTN Height, + IN UINTN Delta OPTIONAL + ) +{ + UINT8 *VidBuf, *BltBuf, *VidBuf1; + UINTN i, j; + + switch(BltOperation) { + case EfiBltVideoFill: + BltBuf = (UINT8 *)BltBuffer; + + for(i=0;iMode->FrameBufferBase + \ + (DestinationY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ + DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + + for(j=0;jCopyMem((VOID *)VidBuf, (VOID *)BltBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + } + } + break; + + case EfiBltVideoToBltBuffer: + if(Delta == 0) + Delta = Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + + for(i=0;iMode->FrameBufferBase + \ + (SourceY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ + SourceX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + BltBuf = (UINT8 *)((UINT32)BltBuffer + (DestinationY + i)*Delta + DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + + for(j=0;jCopyMem((VOID *)BltBuf, (VOID *)VidBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + BltBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + } + } + break; + + case EfiBltBufferToVideo: + if(Delta == 0) + Delta = Width * sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + + for(i=0;iMode->FrameBufferBase + \ + (DestinationY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ + DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + BltBuf = (UINT8 *)((UINT32)BltBuffer + (SourceY + i)*Delta + SourceX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + + for(j=0;jCopyMem((VOID *)VidBuf, (VOID *)BltBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + BltBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + } + } + break; + + case EfiBltVideoToVideo: + for(i=0;iMode->FrameBufferBase + \ + (SourceY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ + SourceX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + + VidBuf1 = (UINT8 *)((UINT32)This->Mode->FrameBufferBase + \ + (DestinationY + i)*This->Mode->Info->PixelsPerScanLine*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + \ + DestinationX*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + + for(j=0;jCopyMem((VOID *)VidBuf1, (VOID *)VidBuf, sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + VidBuf += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + VidBuf1 += sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + } + } + break; + + default: + ASSERT_EFI_ERROR(Status); + } + + return EFI_SUCCESS; +} + + + + +/** + Initialize the state information for the GOP Architectural Protocol + + @param ImageHandle of the loaded driver + @param SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Protocol registered + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Hardware problems + +**/ +EFI_STATUS +ExynosGopConstructor ( + IN GRAPHICS_CONSOLE_DEV *Private + ) +{ + EFI_STATUS Status; + + Status = EFI_SUCCESS; + /* Initialize Display */ + LCD_Initialize(); + if(Private->GraphicsOutput->Mode == NULL){ + Status = gBS->AllocatePool( + EfiBootServicesData, + sizeof(EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE), + (VOID **)&Private->GraphicsOutput->Mode + ); + ASSERT_EFI_ERROR(Status); + ZeroMem(Private->GraphicsOutput->Mode,sizeof(EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE)); + } + if(Private->GraphicsOutput->Mode->Info==NULL){ + Status = gBS->AllocatePool( + EfiBootServicesData, + sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION), + (VOID **)&Private->GraphicsOutput->Mode->Info + ); + ASSERT_EFI_ERROR(Status); + ZeroMem(Private->GraphicsOutput->Mode->Info,sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION)); + } + /* Fill out mode information */ + Private->GraphicsOutput->Mode->MaxMode = 1; + Private->GraphicsOutput->Mode->Mode = 0; + Private->GraphicsOutput->Mode->Info->Version = 0; + Private->GraphicsOutput->Mode->Info->HorizontalResolution = LCD_WIDTH; + Private->GraphicsOutput->Mode->Info->VerticalResolution = LCD_HEIGHT; + Private->GraphicsOutput->Mode->Info->PixelFormat = PixelBlueGreenRedReserved8BitPerColor; + Private->GraphicsOutput->Mode->Info->PixelsPerScanLine = LCD_WIDTH; + Private->GraphicsOutput->Mode->SizeOfInfo = sizeof(EFI_GRAPHICS_OUTPUT_MODE_INFORMATION); + Private->GraphicsOutput->Mode->FrameBufferBase = FB_ADDR; + Private->GraphicsOutput->Mode->FrameBufferSize = (LCD_WIDTH * LCD_HEIGHT * 4); + return Status; +} + +EFI_STATUS +ExynosGopDestructor ( + GRAPHICS_CONSOLE_DEV *Private + ) +{ + // + // Free graphics output protocol occupied resource + // + if(Private != NULL){ + if(Private->GraphicsOutput != NULL){ + if (Private->GraphicsOutput->Mode != NULL) { + if (Private->GraphicsOutput->Mode->Info != NULL) { + gBS->FreePool (Private->GraphicsOutput->Mode->Info); + Private->GraphicsOutput->Mode->Info =NULL; + } + gBS->FreePool (Private->GraphicsOutput->Mode); + Private->GraphicsOutput->Mode=NULL; + } + } + } + return EFI_SUCCESS; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h new file mode 100755 index 000000000..ebf30644a --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/ExynosGop.h @@ -0,0 +1,274 @@ +/** @file +* +* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + + +#ifndef _ExynosGop_H__ +#define _ExynosGop_H__ + +/* + * Bit Definitions +*/ + +/* VIDCON0 */ +#define S5P_VIDCON0_DSI_DISABLE (0 << 30) +#define S5P_VIDCON0_DSI_ENABLE (1 << 30) +#define S5P_VIDCON0_SCAN_PROGRESSIVE (0 << 29) +#define S5P_VIDCON0_SCAN_INTERLACE (1 << 29) +#define S5P_VIDCON0_SCAN_MASK (1 << 29) +#define S5P_VIDCON0_VIDOUT_RGB (0 << 26) +#define S5P_VIDCON0_VIDOUT_ITU (1 << 26) +#define S5P_VIDCON0_VIDOUT_I80LDI0 (2 << 26) +#define S5P_VIDCON0_VIDOUT_I80LDI1 (3 << 26) +#define S5P_VIDCON0_VIDOUT_WB_RGB (4 << 26) +#define S5P_VIDCON0_VIDOUT_WB_I80LDI0 (6 << 26) +#define S5P_VIDCON0_VIDOUT_WB_I80LDI1 (7 << 26) +#define S5P_VIDCON0_VIDOUT_MASK (7 << 26) +#define S5P_VIDCON0_PNRMODE_RGB_P (0 << 17) +#define S5P_VIDCON0_PNRMODE_BGR_P (1 << 17) +#define S5P_VIDCON0_PNRMODE_RGB_S (2 << 17) +#define S5P_VIDCON0_PNRMODE_BGR_S (3 << 17) +#define S5P_VIDCON0_PNRMODE_MASK (3 << 17) +#define S5P_VIDCON0_PNRMODE_SHIFT (17) +#define S5P_VIDCON0_CLKVALUP_ALWAYS (0 << 16) +#define S5P_VIDCON0_CLKVALUP_START_FRAME (1 << 16) +#define S5P_VIDCON0_CLKVALUP_MASK (1 << 16) +#define S5P_VIDCON0_CLKVAL_F(x) (((x) & 0xff) << 6) +#define S5P_VIDCON0_VCLKEN_NORMAL (0 << 5) +#define S5P_VIDCON0_VCLKEN_FREERUN (1 << 5) +#define S5P_VIDCON0_VCLKEN_MASK (1 << 5) +#define S5P_VIDCON0_CLKDIR_DIRECTED (0 << 4) +#define S5P_VIDCON0_CLKDIR_DIVIDED (1 << 4) +#define S5P_VIDCON0_CLKDIR_MASK (1 << 4) +#define S5P_VIDCON0_CLKSEL_HCLK (0 << 2) +#define S5P_VIDCON0_CLKSEL_SCLK (1 << 2) +#define S5P_VIDCON0_CLKSEL_MASK (1 << 2) +#define S5P_VIDCON0_ENVID_ENABLE (1 << 1) +#define S5P_VIDCON0_ENVID_DISABLE (0 << 1) +#define S5P_VIDCON0_ENVID_F_ENABLE (1 << 0) +#define S5P_VIDCON0_ENVID_F_DISABLE (0 << 0) + +/* VIDCON1 */ +#define S5P_VIDCON1_IVCLK_FALLING_EDGE (0 << 7) +#define S5P_VIDCON1_IVCLK_RISING_EDGE (1 << 7) +#define S5P_VIDCON1_IHSYNC_NORMAL (0 << 6) +#define S5P_VIDCON1_IHSYNC_INVERT (1 << 6) +#define S5P_VIDCON1_IVSYNC_NORMAL (0 << 5) +#define S5P_VIDCON1_IVSYNC_INVERT (1 << 5) +#define S5P_VIDCON1_IVDEN_NORMAL (0 << 4) +#define S5P_VIDCON1_IVDEN_INVERT (1 << 4) + +/* VIDCON2 */ +#define S5P_VIDCON2_EN601_DISABLE (0 << 23) +#define S5P_VIDCON2_EN601_ENABLE (1 << 23) +#define S5P_VIDCON2_EN601_MASK (1 << 23) +#define S5P_VIDCON2_WB_DISABLE (0 << 15) +#define S5P_VIDCON2_WB_ENABLE (1 << 15) +#define S5P_VIDCON2_WB_MASK (1 << 15) +#define S5P_VIDCON2_TVFORMATSEL_HW (0 << 14) +#define S5P_VIDCON2_TVFORMATSEL_SW (1 << 14) +#define S5P_VIDCON2_TVFORMATSEL_MASK (1 << 14) +#define S5P_VIDCON2_TVFORMATSEL_YUV422 (1 << 12) +#define S5P_VIDCON2_TVFORMATSEL_YUV444 (2 << 12) +#define S5P_VIDCON2_TVFORMATSEL_YUV_MASK (3 << 12) +#define S5P_VIDCON2_ORGYUV_YCBCR (0 << 8) +#define S5P_VIDCON2_ORGYUV_CBCRY (1 << 8) +#define S5P_VIDCON2_ORGYUV_MASK (1 << 8) +#define S5P_VIDCON2_YUVORD_CBCR (0 << 7) +#define S5P_VIDCON2_YUVORD_CRCB (1 << 7) +#define S5P_VIDCON2_YUVORD_MASK (1 << 7) + +/* PRTCON */ +#define S5P_PRTCON_UPDATABLE (0 << 11) +#define S5P_PRTCON_PROTECT (1 << 11) + +/* VIDTCON0 */ +#define S5P_VIDTCON0_VBPDE(x) (((x) & 0xff) << 24) +#define S5P_VIDTCON0_VBPD(x) (((x) & 0xff) << 16) +#define S5P_VIDTCON0_VFPD(x) (((x) & 0xff) << 8) +#define S5P_VIDTCON0_VSPW(x) (((x) & 0xff) << 0) + +/* VIDTCON1 */ +#define S5P_VIDTCON1_VFPDE(x) (((x) & 0xff) << 24) +#define S5P_VIDTCON1_HBPD(x) (((x) & 0xff) << 16) +#define S5P_VIDTCON1_HFPD(x) (((x) & 0xff) << 8) +#define S5P_VIDTCON1_HSPW(x) (((x) & 0xff) << 0) + +/* VIDTCON2 */ +#define S5P_VIDTCON2_LINEVAL(x) (((x) & 0x7ff) << 11) +#define S5P_VIDTCON2_HOZVAL(x) (((x) & 0x7ff) << 0) + +/* Window 0~4 Control - WINCONx */ +#define S5P_WINCON_DATAPATH_DMA (0 << 22) +#define S5P_WINCON_DATAPATH_LOCAL (1 << 22) +#define S5P_WINCON_DATAPATH_MASK (1 << 22) +#define S5P_WINCON_BUFSEL_0 (0 << 20) +#define S5P_WINCON_BUFSEL_1 (1 << 20) +#define S5P_WINCON_BUFSEL_MASK (1 << 20) +#define S5P_WINCON_BUFSEL_SHIFT (20) +#define S5P_WINCON_BUFAUTO_DISABLE (0 << 19) +#define S5P_WINCON_BUFAUTO_ENABLE (1 << 19) +#define S5P_WINCON_BUFAUTO_MASK (1 << 19) +#define S5P_WINCON_BITSWP_DISABLE (0 << 18) +#define S5P_WINCON_BITSWP_ENABLE (1 << 18) +#define S5P_WINCON_BITSWP_SHIFT (18) +#define S5P_WINCON_BYTESWP_DISABLE (0 << 17) +#define S5P_WINCON_BYTESWP_ENABLE (1 << 17) +#define S5P_WINCON_BYTESWP_SHIFT (17) +#define S5P_WINCON_HAWSWP_DISABLE (0 << 16) +#define S5P_WINCON_HAWSWP_ENABLE (1 << 16) +#define S5P_WINCON_HAWSWP_SHIFT (16) +#define S5P_WINCON_WSWP_DISABLE (0 << 15) +#define S5P_WINCON_WSWP_ENABLE (1 << 15) +#define S5P_WINCON_WSWP_SHIFT (15) +#define S5P_WINCON_INRGB_RGB (0 << 13) +#define S5P_WINCON_INRGB_YUV (1 << 13) +#define S5P_WINCON_INRGB_MASK (1 << 13) +#define S5P_WINCON_BURSTLEN_16WORD (0 << 9) +#define S5P_WINCON_BURSTLEN_8WORD (1 << 9) +#define S5P_WINCON_BURSTLEN_4WORD (2 << 9) +#define S5P_WINCON_BURSTLEN_MASK (3 << 9) +#define S5P_WINCON_ALPHA_MULTI_DISABLE (0 << 7) +#define S5P_WINCON_ALPHA_MULTI_ENABLE (1 << 7) +#define S5P_WINCON_BLD_PLANE (0 << 6) +#define S5P_WINCON_BLD_PIXEL (1 << 6) +#define S5P_WINCON_BLD_MASK (1 << 6) +#define S5P_WINCON_BPPMODE_1BPP (0 << 2) +#define S5P_WINCON_BPPMODE_2BPP (1 << 2) +#define S5P_WINCON_BPPMODE_4BPP (2 << 2) +#define S5P_WINCON_BPPMODE_8BPP_PAL (3 << 2) +#define S5P_WINCON_BPPMODE_8BPP (4 << 2) +#define S5P_WINCON_BPPMODE_16BPP_565 (5 << 2) +#define S5P_WINCON_BPPMODE_16BPP_A555 (6 << 2) +#define S5P_WINCON_BPPMODE_18BPP_666 (8 << 2) +#define S5P_WINCON_BPPMODE_18BPP_A665 (9 << 2) +#define S5P_WINCON_BPPMODE_24BPP_888 (0xb << 2) +#define S5P_WINCON_BPPMODE_24BPP_A887 (0xc << 2) +#define S5P_WINCON_BPPMODE_32BPP (0xd << 2) +#define S5P_WINCON_BPPMODE_16BPP_A444 (0xe << 2) +#define S5P_WINCON_BPPMODE_15BPP_555 (0xf << 2) +#define S5P_WINCON_BPPMODE_MASK (0xf << 2) +#define S5P_WINCON_BPPMODE_SHIFT (2) +#define S5P_WINCON_ALPHA0_SEL (0 << 1) +#define S5P_WINCON_ALPHA1_SEL (1 << 1) +#define S5P_WINCON_ALPHA_SEL_MASK (1 << 1) +#define S5P_WINCON_ENWIN_DISABLE (0 << 0) +#define S5P_WINCON_ENWIN_ENABLE (1 << 0) + +/* WINCON1 special */ +#define S5P_WINCON1_VP_DISABLE (0 << 24) +#define S5P_WINCON1_VP_ENABLE (1 << 24) +#define S5P_WINCON1_LOCALSEL_FIMC1 (0 << 23) +#define S5P_WINCON1_LOCALSEL_VP (1 << 23) +#define S5P_WINCON1_LOCALSEL_MASK (1 << 23) + +/* WINSHMAP */ +#define S5P_WINSHMAP_PROTECT(x) (((x) & 0x1f) << 10) +#define S5P_WINSHMAP_CH_ENABLE(x) (1 << (x)) +#define S5P_WINSHMAP_CH_DISABLE(x) (1 << (x)) +#define S5P_WINSHMAP_LOCAL_ENABLE(x) (0x20 << (x)) +#define S5P_WINSHMAP_LOCAL_DISABLE(x) (0x20 << (x)) + + +/* VIDOSDxA, VIDOSDxB */ +#define S5P_VIDOSD_LEFT_X(x) (((x) & 0x7ff) << 11) +#define S5P_VIDOSD_TOP_Y(x) (((x) & 0x7ff) << 0) +#define S5P_VIDOSD_RIGHT_X(x) (((x) & 0x7ff) << 11) +#define S5P_VIDOSD_BOTTOM_Y(x) (((x) & 0x7ff) << 0) + +/* VIDOSD0C, VIDOSDxD */ +#define S5P_VIDOSD_SIZE(x) (((x) & 0xffffff) << 0) + +/* VIDOSDxC (1~4) */ +#define S5P_VIDOSD_ALPHA0_R(x) (((x) & 0xf) << 20) +#define S5P_VIDOSD_ALPHA0_G(x) (((x) & 0xf) << 16) +#define S5P_VIDOSD_ALPHA0_B(x) (((x) & 0xf) << 12) +#define S5P_VIDOSD_ALPHA1_R(x) (((x) & 0xf) << 8) +#define S5P_VIDOSD_ALPHA1_G(x) (((x) & 0xf) << 4) +#define S5P_VIDOSD_ALPHA1_B(x) (((x) & 0xf) << 0) +#define S5P_VIDOSD_ALPHA0_SHIFT (12) +#define S5P_VIDOSD_ALPHA1_SHIFT (0) + +/* Start Address */ +#define S5P_VIDADDR_START_VBANK(x) (((x) & 0xff) << 24) +#define S5P_VIDADDR_START_VBASEU(x) (((x) & 0xffffff) << 0) + +/* End Address */ +#define S5P_VIDADDR_END_VBASEL(x) (((x) & 0xffffff) << 0) + +/* Buffer Size */ +#define S5P_VIDADDR_OFFSIZE(x) (((x) & 0x1fff) << 13) +#define S5P_VIDADDR_PAGEWIDTH(x) (((x) & 0x1fff) << 0) + +/* WIN Color Map */ +#define S5P_WINMAP_COLOR(x) ((x) & 0xffffff) + +/* VIDINTCON0 */ +#define S5P_VIDINTCON0_SYSMAINCON_DISABLE (0 << 19) +#define S5P_VIDINTCON0_SYSMAINCON_ENABLE (1 << 19) +#define S5P_VIDINTCON0_SYSSUBCON_DISABLE (0 << 18) +#define S5P_VIDINTCON0_SYSSUBCON_ENABLE (1 << 18) +#define S5P_VIDINTCON0_SYSIFDONE_DISABLE (0 << 17) +#define S5P_VIDINTCON0_SYSIFDONE_ENABLE (1 << 17) +#define S5P_VIDINTCON0_FRAMESEL0_BACK (0 << 15) +#define S5P_VIDINTCON0_FRAMESEL0_VSYNC (1 << 15) +#define S5P_VIDINTCON0_FRAMESEL0_ACTIVE (2 << 15) +#define S5P_VIDINTCON0_FRAMESEL0_FRONT (3 << 15) +#define S5P_VIDINTCON0_FRAMESEL0_MASK (3 << 15) +#define S5P_VIDINTCON0_FRAMESEL1_NONE (0 << 13) +#define S5P_VIDINTCON0_FRAMESEL1_BACK (1 << 13) +#define S5P_VIDINTCON0_FRAMESEL1_VSYNC (2 << 13) +#define S5P_VIDINTCON0_FRAMESEL1_FRONT (3 << 13) +#define S5P_VIDINTCON0_INTFRMEN_DISABLE (0 << 12) +#define S5P_VIDINTCON0_INTFRMEN_ENABLE (1 << 12) +#define S5P_VIDINTCON0_FIFOSEL_WIN4 (1 << 11) +#define S5P_VIDINTCON0_FIFOSEL_WIN3 (1 << 10) +#define S5P_VIDINTCON0_FIFOSEL_WIN2 (1 << 9) +#define S5P_VIDINTCON0_FIFOSEL_WIN1 (1 << 6) +#define S5P_VIDINTCON0_FIFOSEL_WIN0 (1 << 5) +#define S5P_VIDINTCON0_FIFOSEL_ALL (0x73 << 5) +#define S5P_VIDINTCON0_FIFOSEL_MASK (0x73 << 5) +#define S5P_VIDINTCON0_FIFOLEVEL_25 (0 << 2) +#define S5P_VIDINTCON0_FIFOLEVEL_50 (1 << 2) +#define S5P_VIDINTCON0_FIFOLEVEL_75 (2 << 2) +#define S5P_VIDINTCON0_FIFOLEVEL_EMPTY (3 << 2) +#define S5P_VIDINTCON0_FIFOLEVEL_FULL (4 << 2) +#define S5P_VIDINTCON0_FIFOLEVEL_MASK (7 << 2) +#define S5P_VIDINTCON0_INTFIFO_DISABLE (0 << 1) +#define S5P_VIDINTCON0_INTFIFO_ENABLE (1 << 1) +#define S5P_VIDINTCON0_INT_DISABLE (0 << 0) +#define S5P_VIDINTCON0_INT_ENABLE (1 << 0) +#define S5P_VIDINTCON0_INT_MASK (1 << 0) + +/* VIDINTCON1 */ +#define S5P_VIDINTCON1_INTVPPEND (1 << 5) +#define S5P_VIDINTCON1_INTI80PEND (1 << 2) +#define S5P_VIDINTCON1_INTFRMPEND (1 << 1) +#define S5P_VIDINTCON1_INTFIFOPEND (1 << 0) + +/* WINMAP */ +#define S5P_WINMAP_ENABLE (1 << 24) + +/* WxKEYCON0 (1~4) */ +#define S5P_KEYCON0_KEYBLEN_DISABLE (0 << 26) +#define S5P_KEYCON0_KEYBLEN_ENABLE (1 << 26) +#define S5P_KEYCON0_KEY_DISABLE (0 << 25) +#define S5P_KEYCON0_KEY_ENABLE (1 << 25) +#define S5P_KEYCON0_DIRCON_MATCH_FG (0 << 24) +#define S5P_KEYCON0_DIRCON_MATCH_BG (1 << 24) +#define S5P_KEYCON0_COMPKEY(x) (((x) & 0xffffff) << 0) + +/* WxKEYCON1 (1~4) */ +#define S5P_KEYCON1_COLVAL(x) (((x) & 0xffffff) << 0) + +#endif // _ExynosGop_H__ diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c new file mode 100755 index 000000000..2c6129ae6 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.c @@ -0,0 +1,2011 @@ +/** @file + This is the main routine for initializing the Graphics Console support routines. + +Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "GraphicsConsole.h" + +//#define BIG_FONT + +#ifdef BIG_FONT + +#ifdef EFI_GLYPH_WIDTH + +#undef EFI_GLYPH_WIDTH +#define EFI_GLYPH_WIDTH 12 + +#endif // EFI_GLYPH_WIDTH + +#ifdef EFI_GLYPH_HEIGHT + +#undef EFI_GLYPH_HEIGHT +#define EFI_GLYPH_HEIGHT 28 + +#endif // EFI_GLYPH_HEIGHT + +#endif // BIG_FONT + +// +// Graphics Console Device Private Data template +// +GRAPHICS_CONSOLE_DEV mGraphicsConsoleDevTemplate = { + GRAPHICS_CONSOLE_DEV_SIGNATURE, + (EFI_GRAPHICS_OUTPUT_PROTOCOL *) NULL, + (EFI_UGA_DRAW_PROTOCOL *) NULL, + { + GraphicsConsoleConOutReset, + GraphicsConsoleConOutOutputString, + GraphicsConsoleConOutTestString, + GraphicsConsoleConOutQueryMode, + GraphicsConsoleConOutSetMode, + GraphicsConsoleConOutSetAttribute, + GraphicsConsoleConOutClearScreen, + GraphicsConsoleConOutSetCursorPosition, + GraphicsConsoleConOutEnableCursor, + (EFI_SIMPLE_TEXT_OUTPUT_MODE *) NULL + }, + { + 0, + 0, + EFI_TEXT_ATTR(EFI_LIGHTGRAY, EFI_BLACK), + 0, + 0, + TRUE + }, + { + { 80, 25, 0, 0, 0, 0 }, // Mode 0 + { 80, 50, 0, 0, 0, 0 }, // Mode 1 + { 100,31, 0, 0, 0, 0 }, // Mode 2 + { 0, 0, 0, 0, 0, 0 } // Mode 3 + }, + (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) NULL +}; + +EFI_HII_DATABASE_PROTOCOL *mHiiDatabase; +EFI_HII_FONT_PROTOCOL *mHiiFont; +EFI_HII_HANDLE mHiiHandle; +EFI_EVENT mHiiRegistration; + +EFI_GUID mFontPackageListGuid = {0xf5f219d3, 0x7006, 0x4648, {0xac, 0x8d, 0xd6, 0x1d, 0xfb, 0x7b, 0xc6, 0xad}}; + +CHAR16 mCrLfString[3] = { CHAR_CARRIAGE_RETURN, CHAR_LINEFEED, CHAR_NULL }; + +EFI_GRAPHICS_OUTPUT_BLT_PIXEL mGraphicsEfiColors[16] = { + // + // B G R reserved + // + {0x00, 0x00, 0x00, 0x00}, // BLACK + {0x98, 0x00, 0x00, 0x00}, // LIGHTBLUE + {0x00, 0x98, 0x00, 0x00}, // LIGHGREEN + {0x98, 0x98, 0x00, 0x00}, // LIGHCYAN + {0x00, 0x00, 0x98, 0x00}, // LIGHRED + {0x98, 0x00, 0x98, 0x00}, // MAGENTA + {0x00, 0x98, 0x98, 0x00}, // BROWN + {0x98, 0x98, 0x98, 0x00}, // LIGHTGRAY + {0x30, 0x30, 0x30, 0x00}, // DARKGRAY - BRIGHT BLACK + {0xff, 0x00, 0x00, 0x00}, // BLUE + {0x00, 0xff, 0x00, 0x00}, // LIME + {0xff, 0xff, 0x00, 0x00}, // CYAN + {0x00, 0x00, 0xff, 0x00}, // RED + {0xff, 0x00, 0xff, 0x00}, // FUCHSIA + {0x00, 0xff, 0xff, 0x00}, // YELLOW + {0xff, 0xff, 0xff, 0x00} // WHITE +}; + +EFI_NARROW_GLYPH mCursorGlyph = { + 0x0000, + 0x00, + { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF } +}; + +CHAR16 SpaceStr[] = { NARROW_CHAR, ' ', 0 }; + +EFI_DRIVER_BINDING_PROTOCOL gGraphicsConsoleDriverBinding = { + GraphicsConsoleControllerDriverSupported, + GraphicsConsoleControllerDriverStart, + GraphicsConsoleControllerDriverStop, + 0xa, + NULL, + NULL +}; + +/** + Test to see if Graphics Console could be supported on the Controller. + + Graphics Console could be supported if Graphics Output Protocol or UGA Draw + Protocol exists on the Controller. (UGA Draw Protocol could be skipped + if PcdUgaConsumeSupport is set to FALSE.) + + @param This Protocol instance pointer. + @param Controller Handle of device to test. + @param RemainingDevicePath Optional parameter use to pick a specific child + device to start. + + @retval EFI_SUCCESS This driver supports this device. + @retval other This driver does not support this device. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleControllerDriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + + GraphicsOutput = NULL; + UgaDraw = NULL; + // + // Open the IO Abstraction(s) needed to perform the supported test + // + Status = gBS->OpenProtocol ( + Controller, + &gEfiGraphicsOutputProtocolGuid, + (VOID **) &GraphicsOutput, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + + if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) { + // + // Open Graphics Output Protocol failed, try to open UGA Draw Protocol + // + Status = gBS->OpenProtocol ( + Controller, + &gEfiUgaDrawProtocolGuid, + (VOID **) &UgaDraw, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + } + if (EFI_ERROR (Status)) { + return Status; + } + +#if 0 + // + // We need to ensure that we do not layer on top of a virtual handle. + // We need to ensure that the handles produced by the conspliter do not + // get used. + // + Status = gBS->OpenProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + (VOID **) &DevicePath, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (!EFI_ERROR (Status)) { + gBS->CloseProtocol ( + Controller, + &gEfiDevicePathProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } else { + goto Error; + } +#endif + + // + // Does Hii Exist? If not, we aren't ready to run + // + Status = EfiLocateHiiProtocol (); + + // + // Close the I/O Abstraction(s) used to perform the supported test + // +//Error: + if (GraphicsOutput != NULL) { + gBS->CloseProtocol ( + Controller, + &gEfiGraphicsOutputProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + gBS->CloseProtocol ( + Controller, + &gEfiUgaDrawProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } + return Status; +} + + +/** + Start this driver on Controller by opening Graphics Output protocol or + UGA Draw protocol, and installing Simple Text Out protocol on Controller. + (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) + + @param This Protocol instance pointer. + @param Controller Handle of device to bind driver to + @param RemainingDevicePath Optional parameter use to pick a specific child + device to start. + + @retval EFI_SUCCESS This driver is added to Controller. + @retval other This driver does not support this device. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleControllerDriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + EFI_STATUS Status; + GRAPHICS_CONSOLE_DEV *Private; + UINT32 HorizontalResolution; + UINT32 VerticalResolution; + UINT32 ColorDepth; + UINT32 RefreshRate; + UINTN MaxMode; + UINTN Columns; + UINTN Rows; + UINT32 ModeNumber; + EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *Mode; + ModeNumber = 0; + + // + // Initialize the Graphics Console device instance + // + Private = AllocateCopyPool ( + sizeof (GRAPHICS_CONSOLE_DEV), + &mGraphicsConsoleDevTemplate + ); + if (Private == NULL) { + return EFI_OUT_OF_RESOURCES; + } + Private->SimpleTextOutput.Mode = &(Private->SimpleTextOutputMode); + + Status = gBS->OpenProtocol ( + Controller, + &gEfiGraphicsOutputProtocolGuid, + (VOID **) &Private->GraphicsOutput, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + + Status = ExynosGopConstructor(Private); + if (EFI_ERROR (Status)) { + goto Error; + } + + if (EFI_ERROR(Status) && FeaturePcdGet (PcdUgaConsumeSupport)) { + Status = gBS->OpenProtocol ( + Controller, + &gEfiUgaDrawProtocolGuid, + (VOID **) &Private->UgaDraw, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + } + + if (EFI_ERROR (Status)) { + goto Error; + } + + // + // If the current mode information can not be retrieved, then attempt to set the default mode + // of 800x600, 32 bit color, 60 Hz refresh. + // + HorizontalResolution = 800; + VerticalResolution = 600; + + if (Private->GraphicsOutput != NULL) { + // + // The console is build on top of Graphics Output Protocol, find the mode number + // for the user-defined mode; if there are multiple video devices, + // graphic console driver will set all the video devices to the same mode. + // + Status = CheckModeSupported ( + Private->GraphicsOutput, + CURRENT_HORIZONTAL_RESOLUTION, + CURRENT_VERTICAL_RESOLUTION, + &ModeNumber + ); + if (!EFI_ERROR(Status)) { + // + // Update default mode to current mode + // + HorizontalResolution = CURRENT_HORIZONTAL_RESOLUTION; + VerticalResolution = CURRENT_VERTICAL_RESOLUTION; + } else { + // + // if not supporting current mode, try 800x600 which is required by UEFI/EFI spec + // + Status = CheckModeSupported ( + Private->GraphicsOutput, + 800, + 600, + &ModeNumber + ); + } + + Mode = Private->GraphicsOutput->Mode; + + if (EFI_ERROR (Status) || (Mode->MaxMode != 0)) { + // + // Set default mode failed or device don't support default mode, then get the current mode information + // + HorizontalResolution = Mode->Info->HorizontalResolution; + VerticalResolution = Mode->Info->VerticalResolution; + ModeNumber = Mode->Mode; + } + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + // + // At first try to set user-defined resolution + // + ColorDepth = 32; + RefreshRate = 60; + Status = Private->UgaDraw->SetMode ( + Private->UgaDraw, + CURRENT_HORIZONTAL_RESOLUTION, + CURRENT_VERTICAL_RESOLUTION, + ColorDepth, + RefreshRate + ); + if (!EFI_ERROR (Status)) { + HorizontalResolution = CURRENT_HORIZONTAL_RESOLUTION; + VerticalResolution = CURRENT_VERTICAL_RESOLUTION; + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + // + // Try to set 800*600 which is required by UEFI/EFI spec + // + Status = Private->UgaDraw->SetMode ( + Private->UgaDraw, + HorizontalResolution, + VerticalResolution, + ColorDepth, + RefreshRate + ); + if (EFI_ERROR (Status)) { + Status = Private->UgaDraw->GetMode ( + Private->UgaDraw, + &HorizontalResolution, + &VerticalResolution, + &ColorDepth, + &RefreshRate + ); + if (EFI_ERROR (Status)) { + goto Error; + } + } + } else { + Status = EFI_UNSUPPORTED; + goto Error; + } + } + + // + // Compute the maximum number of text Rows and Columns that this current graphics mode can support + // + Columns = HorizontalResolution / EFI_GLYPH_WIDTH; + Rows = VerticalResolution / EFI_GLYPH_HEIGHT; + + // + // See if the mode is too small to support the required 80x25 text mode + // + if (Columns < 80 || Rows < 25) { + goto Error; + } + // + // Add Mode #0 that must be 80x25 + // + MaxMode = 0; + Private->ModeData[MaxMode].GopWidth = HorizontalResolution; + Private->ModeData[MaxMode].GopHeight = VerticalResolution; + Private->ModeData[MaxMode].GopModeNumber = ModeNumber; + Private->ModeData[MaxMode].DeltaX = (HorizontalResolution - (80 * EFI_GLYPH_WIDTH)) >> 1; + Private->ModeData[MaxMode].DeltaY = (VerticalResolution - (25 * EFI_GLYPH_HEIGHT)) >> 1; + MaxMode++; + + // + // If it is possible to support Mode #1 - 80x50, than add it as an active mode + // + if (Rows >= 50) { + Private->ModeData[MaxMode].GopWidth = HorizontalResolution; + Private->ModeData[MaxMode].GopHeight = VerticalResolution; + Private->ModeData[MaxMode].GopModeNumber = ModeNumber; + Private->ModeData[MaxMode].DeltaX = (HorizontalResolution - (80 * EFI_GLYPH_WIDTH)) >> 1; + Private->ModeData[MaxMode].DeltaY = (VerticalResolution - (50 * EFI_GLYPH_HEIGHT)) >> 1; + MaxMode++; + } + + // + // If it is not to support Mode #1 - 80x50, then skip it + // + if (MaxMode < 2) { + Private->ModeData[MaxMode].Columns = 0; + Private->ModeData[MaxMode].Rows = 0; + Private->ModeData[MaxMode].GopWidth = HorizontalResolution; + Private->ModeData[MaxMode].GopHeight = VerticalResolution; + Private->ModeData[MaxMode].GopModeNumber = ModeNumber; + Private->ModeData[MaxMode].DeltaX = 0; + Private->ModeData[MaxMode].DeltaY = 0; + MaxMode++; + } + + // + // Add Mode #2 that must be 100x31 (graphic mode >= 800x600) + // + if (Columns >= 100 && Rows >= 31) { + Private->ModeData[MaxMode].GopWidth = HorizontalResolution; + Private->ModeData[MaxMode].GopHeight = VerticalResolution; + Private->ModeData[MaxMode].GopModeNumber = ModeNumber; + Private->ModeData[MaxMode].DeltaX = (HorizontalResolution - (100 * EFI_GLYPH_WIDTH)) >> 1; + Private->ModeData[MaxMode].DeltaY = (VerticalResolution - (31 * EFI_GLYPH_HEIGHT)) >> 1; + MaxMode++; + } + + // + // Add Mode #3 that uses the entire display for user-defined mode + // + if (HorizontalResolution > 800 && VerticalResolution > 600) { + Private->ModeData[MaxMode].Columns = HorizontalResolution/EFI_GLYPH_WIDTH; + Private->ModeData[MaxMode].Rows = VerticalResolution/EFI_GLYPH_HEIGHT; + Private->ModeData[MaxMode].GopWidth = HorizontalResolution; + Private->ModeData[MaxMode].GopHeight = VerticalResolution; + Private->ModeData[MaxMode].GopModeNumber = ModeNumber; + Private->ModeData[MaxMode].DeltaX = (HorizontalResolution % EFI_GLYPH_WIDTH) >> 1; + Private->ModeData[MaxMode].DeltaY = (VerticalResolution % EFI_GLYPH_HEIGHT) >> 1; + MaxMode++; + } + + // + // Update the maximum number of modes + // + Private->SimpleTextOutputMode.MaxMode = (INT32) MaxMode; + + // + // Determine the number of text modes that this protocol can support + // + Status = GraphicsConsoleConOutSetMode (&Private->SimpleTextOutput, 0); + if (EFI_ERROR (Status)) { + goto Error; + } + + DEBUG_CODE_BEGIN (); + GraphicsConsoleConOutOutputString (&Private->SimpleTextOutput, (CHAR16 *)L"Graphics Console Started\n\r"); + DEBUG_CODE_END (); + + // + // Install protocol interfaces for the Graphics Console device. + // + Status = gBS->InstallMultipleProtocolInterfaces ( + &Controller, + &gEfiSimpleTextOutProtocolGuid, + &Private->SimpleTextOutput, + NULL + ); + + if(!EFI_ERROR (Status)) { + gST->ConOut = &Private->SimpleTextOutput; + } + +Error: + if (EFI_ERROR (Status)) { + // + // Close the GOP and UGA Draw Protocol + // + if (Private->GraphicsOutput != NULL) { + gBS->CloseProtocol ( + Controller, + &gEfiGraphicsOutputProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + gBS->CloseProtocol ( + Controller, + &gEfiUgaDrawProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } + + if (Private->LineBuffer != NULL) { + FreePool (Private->LineBuffer); + } + + // + // Free private data + // + FreePool (Private); + } + + return Status; +} + +/** + Stop this driver on Controller by removing Simple Text Out protocol + and closing the Graphics Output Protocol or UGA Draw protocol on Controller. + (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) + + + @param This Protocol instance pointer. + @param Controller Handle of device to stop driver on + @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of + children is zero stop the entire bus driver. + @param ChildHandleBuffer List of Child Handles to Stop. + + @retval EFI_SUCCESS This driver is removed Controller. + @retval EFI_NOT_STARTED Simple Text Out protocol could not be found the + Controller. + @retval other This driver was not removed from this device. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleControllerDriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +{ + EFI_STATUS Status; + EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *SimpleTextOutput; + GRAPHICS_CONSOLE_DEV *Private=NULL; + + Status = gBS->OpenProtocol ( + Controller, + &gEfiSimpleTextOutProtocolGuid, + (VOID **) &SimpleTextOutput, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_GET_PROTOCOL + ); + if (EFI_ERROR (Status)) { + return EFI_NOT_STARTED; + } + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (SimpleTextOutput); + Status = gBS->UninstallProtocolInterface ( + Controller, + &gEfiSimpleTextOutProtocolGuid, + &Private->SimpleTextOutput + ); + + if (!EFI_ERROR (Status)) { + // + // Close the GOP or UGA IO Protocol + // + Status = ExynosGopDestructor(Private); + if (EFI_ERROR (Status)) { + ASSERT(Status); + } + if (Private->GraphicsOutput != NULL) { + gBS->CloseProtocol ( + Controller, + &gEfiGraphicsOutputProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + gBS->CloseProtocol ( + Controller, + &gEfiUgaDrawProtocolGuid, + This->DriverBindingHandle, + Controller + ); + } + + if (Private->LineBuffer != NULL) { + FreePool (Private->LineBuffer); + } + // + // Free our instance data + // + FreePool (Private); + } + + return Status; +} + +/** + Check if the current specific mode supported the user defined resolution + for the Graphics Console device based on Graphics Output Protocol. + + If yes, set the graphic devcice's current mode to this specific mode. + + @param GraphicsOutput Graphics Output Protocol instance pointer. + @param HorizontalResolution User defined horizontal resolution + @param VerticalResolution User defined vertical resolution. + @param CurrentModeNumber Current specific mode to be check. + + @retval EFI_SUCCESS The mode is supported. + @retval EFI_UNSUPPORTED The specific mode is out of range of graphics + device supported. + @retval other The specific mode does not support user defined + resolution or failed to set the current mode to the + specific mode on graphics device. + +**/ +EFI_STATUS +CheckModeSupported ( + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput, + IN UINT32 HorizontalResolution, + IN UINT32 VerticalResolution, + OUT UINT32 *CurrentModeNumber + ) +{ + UINT32 ModeNumber; + EFI_STATUS Status; + UINTN SizeOfInfo; + EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info; + UINT32 MaxMode; + + Status = EFI_SUCCESS; + MaxMode = GraphicsOutput->Mode->MaxMode; + + for (ModeNumber = 0; ModeNumber < MaxMode; ModeNumber++) { + Status = GraphicsOutput->QueryMode ( + GraphicsOutput, + ModeNumber, + &SizeOfInfo, + &Info + ); + if (!EFI_ERROR (Status)) { + if ((Info->HorizontalResolution == HorizontalResolution) && + (Info->VerticalResolution == VerticalResolution)) { + if ((GraphicsOutput->Mode->Info->HorizontalResolution == HorizontalResolution) && + (GraphicsOutput->Mode->Info->VerticalResolution == VerticalResolution)) { + // + // If video device has been set to this mode, we do not need to SetMode again + // + break; + } else { + Status = GraphicsOutput->SetMode (GraphicsOutput, ModeNumber); + if (!EFI_ERROR (Status)) { + FreePool (Info); + break; + } + } + } + FreePool (Info); + } + } + + if (ModeNumber == GraphicsOutput->Mode->MaxMode) { + Status = EFI_UNSUPPORTED; + } + + *CurrentModeNumber = ModeNumber; + return Status; +} + + +/** + Locate HII Database protocol and HII Font protocol. + + @retval EFI_SUCCESS HII Database protocol and HII Font protocol + are located successfully. + @return other Failed to locate HII Database protocol or + HII Font protocol. + +**/ +EFI_STATUS +EfiLocateHiiProtocol ( + VOID + ) +{ + EFI_HANDLE Handle; + UINTN Size; + EFI_STATUS Status; + + // + // There should only be one - so buffer size is this + // + Size = sizeof (EFI_HANDLE); + + Status = gBS->LocateHandle ( + ByProtocol, + &gEfiHiiDatabaseProtocolGuid, + NULL, + &Size, + (VOID **) &Handle + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->HandleProtocol ( + Handle, + &gEfiHiiDatabaseProtocolGuid, + (VOID **) &mHiiDatabase + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->HandleProtocol ( + Handle, + &gEfiHiiFontProtocolGuid, + (VOID **) &mHiiFont + ); + return Status; +} + +// +// Body of the STO functions +// + +/** + Reset the text output device hardware and optionally run diagnostics. + + Implements SIMPLE_TEXT_OUTPUT.Reset(). + If ExtendeVerification is TRUE, then perform dependent Graphics Console + device reset, and set display mode to mode 0. + If ExtendedVerification is FALSE, only set display mode to mode 0. + + @param This Protocol instance pointer. + @param ExtendedVerification Indicates that the driver may perform a more + exhaustive verification operation of the device + during reset. + + @retval EFI_SUCCESS The text output device was reset. + @retval EFI_DEVICE_ERROR The text output device is not functioning correctly and + could not be reset. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutReset ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ) +{ + This->SetAttribute (This, EFI_TEXT_ATTR (This->Mode->Attribute & 0x0F, EFI_BACKGROUND_BLACK)); + return This->SetMode (This, 0); +} + + +/** + Write a Unicode string to the output device. + + Implements SIMPLE_TEXT_OUTPUT.OutputString(). + The Unicode string will be converted to Glyphs and will be + sent to the Graphics Console. + + @param This Protocol instance pointer. + @param WString The NULL-terminated Unicode string to be displayed + on the output device(s). All output devices must + also support the Unicode drawing defined in this file. + + @retval EFI_SUCCESS The string was output to the device. + @retval EFI_DEVICE_ERROR The device reported an error while attempting to output + the text. + @retval EFI_UNSUPPORTED The output device's mode is not currently in a + defined text mode. + @retval EFI_WARN_UNKNOWN_GLYPH This warning code indicates that some of the + characters in the Unicode string could not be + rendered and were skipped. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutOutputString ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *WString + ) +{ + GRAPHICS_CONSOLE_DEV *Private; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + INTN Mode; + UINTN MaxColumn; + UINTN MaxRow; + UINTN Width; + UINTN Height; + UINTN Delta; + EFI_STATUS Status; + BOOLEAN Warning; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background; + UINTN DeltaX; + UINTN DeltaY; + UINTN Count; + UINTN Index; + INT32 OriginAttribute; + EFI_TPL OldTpl; + + Status = EFI_SUCCESS; + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + // + // Current mode + // + Mode = This->Mode->Mode; + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + GraphicsOutput = Private->GraphicsOutput; + UgaDraw = Private->UgaDraw; + + MaxColumn = Private->ModeData[Mode].Columns; + MaxRow = Private->ModeData[Mode].Rows; + DeltaX = (UINTN) Private->ModeData[Mode].DeltaX; + DeltaY = (UINTN) Private->ModeData[Mode].DeltaY; + Width = MaxColumn * EFI_GLYPH_WIDTH; + Height = (MaxRow - 1) * EFI_GLYPH_HEIGHT; + Delta = Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL); + + // + // The Attributes won't change when during the time OutputString is called + // + GetTextColors (This, &Foreground, &Background); + + EraseCursor (This); + + Warning = FALSE; + + // + // Backup attribute + // + OriginAttribute = This->Mode->Attribute; + + while (*WString != L'\0') { + + if (*WString == CHAR_BACKSPACE) { + // + // If the cursor is at the left edge of the display, then move the cursor + // one row up. + // + if (This->Mode->CursorColumn == 0 && This->Mode->CursorRow > 0) { + This->Mode->CursorRow--; + This->Mode->CursorColumn = (INT32) (MaxColumn - 1); + This->OutputString (This, SpaceStr); + EraseCursor (This); + This->Mode->CursorRow--; + This->Mode->CursorColumn = (INT32) (MaxColumn - 1); + } else if (This->Mode->CursorColumn > 0) { + // + // If the cursor is not at the left edge of the display, then move the cursor + // left one column. + // + This->Mode->CursorColumn--; + This->OutputString (This, SpaceStr); + EraseCursor (This); + This->Mode->CursorColumn--; + } + + WString++; + + } else if (*WString == CHAR_LINEFEED) { + // + // If the cursor is at the bottom of the display, then scroll the display one + // row, and do not update the cursor position. Otherwise, move the cursor + // down one row. + // + if (This->Mode->CursorRow == (INT32) (MaxRow - 1)) { + if (GraphicsOutput != NULL) { + // + // Scroll Screen Up One Row + // + GraphicsOutput->Blt ( + GraphicsOutput, + NULL, + EfiBltVideoToVideo, + DeltaX, + DeltaY + EFI_GLYPH_HEIGHT, + DeltaX, + DeltaY, + Width, + Height, + Delta + ); + + // + // Print Blank Line at last line + // + GraphicsOutput->Blt ( + GraphicsOutput, + &Background, + EfiBltVideoFill, + 0, + 0, + DeltaX, + DeltaY + Height, + Width, + EFI_GLYPH_HEIGHT, + Delta + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + // + // Scroll Screen Up One Row + // + UgaDraw->Blt ( + UgaDraw, + NULL, + EfiUgaVideoToVideo, + DeltaX, + DeltaY + EFI_GLYPH_HEIGHT, + DeltaX, + DeltaY, + Width, + Height, + Delta + ); + + // + // Print Blank Line at last line + // + UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) (UINTN) &Background, + EfiUgaVideoFill, + 0, + 0, + DeltaX, + DeltaY + Height, + Width, + EFI_GLYPH_HEIGHT, + Delta + ); + } + } else { + This->Mode->CursorRow++; + } + + WString++; + + } else if (*WString == CHAR_CARRIAGE_RETURN) { + // + // Move the cursor to the beginning of the current row. + // + This->Mode->CursorColumn = 0; + WString++; + + } else if (*WString == WIDE_CHAR) { + + This->Mode->Attribute |= EFI_WIDE_ATTRIBUTE; + WString++; + + } else if (*WString == NARROW_CHAR) { + + This->Mode->Attribute &= (~ (UINT32) EFI_WIDE_ATTRIBUTE); + WString++; + + } else { + // + // Print the character at the current cursor position and move the cursor + // right one column. If this moves the cursor past the right edge of the + // display, then the line should wrap to the beginning of the next line. This + // is equivalent to inserting a CR and an LF. Note that if the cursor is at the + // bottom of the display, and the line wraps, then the display will be scrolled + // one line. + // If wide char is going to be displayed, need to display one character at a time + // Or, need to know the display length of a certain string. + // + // Index is used to determine how many character width units (wide = 2, narrow = 1) + // Count is used to determine how many characters are used regardless of their attributes + // + for (Count = 0, Index = 0; (This->Mode->CursorColumn + Index) < MaxColumn; Count++, Index++) { + if (WString[Count] == CHAR_NULL || + WString[Count] == CHAR_BACKSPACE || + WString[Count] == CHAR_LINEFEED || + WString[Count] == CHAR_CARRIAGE_RETURN || + WString[Count] == WIDE_CHAR || + WString[Count] == NARROW_CHAR) { + break; + } + // + // Is the wide attribute on? + // + if ((This->Mode->Attribute & EFI_WIDE_ATTRIBUTE) != 0) { + // + // If wide, add one more width unit than normal since we are going to increment at the end of the for loop + // + Index++; + // + // This is the end-case where if we are at column 79 and about to print a wide character + // We should prevent this from happening because we will wrap inappropriately. We should + // not print this character until the next line. + // + if ((This->Mode->CursorColumn + Index + 1) > MaxColumn) { + Index++; + break; + } + } + } + + Status = DrawUnicodeWeightAtCursorN (This, WString, Count); + if (EFI_ERROR (Status)) { + Warning = TRUE; + } + // + // At the end of line, output carriage return and line feed + // + WString += Count; + This->Mode->CursorColumn += (INT32) Index; + if (This->Mode->CursorColumn > (INT32) MaxColumn) { + This->Mode->CursorColumn -= 2; + This->OutputString (This, SpaceStr); + } + + if (This->Mode->CursorColumn >= (INT32) MaxColumn) { + EraseCursor (This); + This->OutputString (This, mCrLfString); + EraseCursor (This); + } + } + } + + This->Mode->Attribute = OriginAttribute; + + EraseCursor (This); + + if (Warning) { + Status = EFI_WARN_UNKNOWN_GLYPH; + } + + gBS->RestoreTPL (OldTpl); + return Status; + +} + +/** + Verifies that all characters in a Unicode string can be output to the + target device. + + Implements SIMPLE_TEXT_OUTPUT.TestString(). + If one of the characters in the *Wstring is neither valid valid Unicode + drawing characters, not ASCII code, then this function will return + EFI_UNSUPPORTED + + @param This Protocol instance pointer. + @param WString The NULL-terminated Unicode string to be examined for the output + device(s). + + @retval EFI_SUCCESS The device(s) are capable of rendering the output string. + @retval EFI_UNSUPPORTED Some of the characters in the Unicode string cannot be + rendered by one or more of the output devices mapped + by the EFI handle. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutTestString ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *WString + ) +{ + EFI_STATUS Status; + UINT16 Count; + + EFI_IMAGE_OUTPUT *Blt; + + Blt = NULL; + Count = 0; + + while (WString[Count] != 0) { + Status = mHiiFont->GetGlyph ( + mHiiFont, + WString[Count], + NULL, + &Blt, + NULL + ); + if (Blt != NULL) { + FreePool (Blt); + Blt = NULL; + } + Count++; + + if (EFI_ERROR (Status)) { + return EFI_UNSUPPORTED; + } + } + + return EFI_SUCCESS; +} + + +/** + Returns information for an available text mode that the output device(s) + supports + + Implements SIMPLE_TEXT_OUTPUT.QueryMode(). + It returnes information for an available text mode that the Graphics Console supports. + In this driver,we only support text mode 80x25, which is defined as mode 0. + + @param This Protocol instance pointer. + @param ModeNumber The mode number to return information on. + @param Columns The returned columns of the requested mode. + @param Rows The returned rows of the requested mode. + + @retval EFI_SUCCESS The requested mode information is returned. + @retval EFI_UNSUPPORTED The mode number is not valid. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutQueryMode ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN ModeNumber, + OUT UINTN *Columns, + OUT UINTN *Rows + ) +{ + GRAPHICS_CONSOLE_DEV *Private; + EFI_STATUS Status; + EFI_TPL OldTpl; + + if (ModeNumber >= (UINTN) This->Mode->MaxMode) { + return EFI_UNSUPPORTED; + } + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + Status = EFI_SUCCESS; + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + + *Columns = Private->ModeData[ModeNumber].Columns; + *Rows = Private->ModeData[ModeNumber].Rows; + + if (*Columns <= 0 && *Rows <= 0) { + Status = EFI_UNSUPPORTED; + goto Done; + + } + +Done: + gBS->RestoreTPL (OldTpl); + return Status; +} + + +/** + Sets the output device(s) to a specified mode. + + Implements SIMPLE_TEXT_OUTPUT.SetMode(). + Set the Graphics Console to a specified mode. In this driver, we only support mode 0. + + @param This Protocol instance pointer. + @param ModeNumber The text mode to set. + + @retval EFI_SUCCESS The requested text mode is set. + @retval EFI_DEVICE_ERROR The requested text mode cannot be set because of + Graphics Console device error. + @retval EFI_UNSUPPORTED The text mode number is not valid. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutSetMode ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN ModeNumber + ) +{ + EFI_STATUS Status; + GRAPHICS_CONSOLE_DEV *Private; + GRAPHICS_CONSOLE_MODE_DATA *ModeData; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *NewLineBuffer; + UINT32 HorizontalResolution; + UINT32 VerticalResolution; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + UINT32 ColorDepth; + UINT32 RefreshRate; + EFI_TPL OldTpl; + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + GraphicsOutput = Private->GraphicsOutput; + UgaDraw = Private->UgaDraw; + ModeData = &(Private->ModeData[ModeNumber]); + + // + // Make sure the requested mode number is supported + // + if (ModeNumber >= (UINTN) This->Mode->MaxMode) { + Status = EFI_UNSUPPORTED; + goto Done; + } + + if (ModeData->Columns <= 0 && ModeData->Rows <= 0) { + Status = EFI_UNSUPPORTED; + goto Done; + } + // + // Attempt to allocate a line buffer for the requested mode number + // + NewLineBuffer = AllocatePool (sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) * ModeData->Columns * EFI_GLYPH_WIDTH * EFI_GLYPH_HEIGHT); + + if (NewLineBuffer == NULL) { + // + // The new line buffer could not be allocated, so return an error. + // No changes to the state of the current console have been made, so the current console is still valid + // + Status = EFI_OUT_OF_RESOURCES; + goto Done; + } + // + // If the mode has been set at least one other time, then LineBuffer will not be NULL + // + if (Private->LineBuffer != NULL) { + // + // Clear the current text window on the current graphics console + // + This->ClearScreen (This); + + // + // If the new mode is the same as the old mode, then just return EFI_SUCCESS + // + if ((INT32) ModeNumber == This->Mode->Mode) { + FreePool (NewLineBuffer); + Status = EFI_SUCCESS; + goto Done; + } + // + // Otherwise, the size of the text console and/or the GOP/UGA mode will be changed, + // so erase the cursor, and free the LineBuffer for the current mode + // + EraseCursor (This); + + FreePool (Private->LineBuffer); + } + // + // Assign the current line buffer to the newly allocated line buffer + // + Private->LineBuffer = NewLineBuffer; + + if (GraphicsOutput != NULL) { + if (ModeData->GopModeNumber != GraphicsOutput->Mode->Mode) { + // + // Either no graphics mode is currently set, or it is set to the wrong resolution, so set the new graphics mode + // + Status = GraphicsOutput->SetMode (GraphicsOutput, ModeData->GopModeNumber); + if (EFI_ERROR (Status)) { + // + // The mode set operation failed + // + goto Done; + } + } else { + // + // The current graphics mode is correct, so simply clear the entire display + // + Status = GraphicsOutput->Blt ( + GraphicsOutput, + &mGraphicsEfiColors[0], + EfiBltVideoFill, + 0, + 0, + 0, + 0, + ModeData->GopWidth, + ModeData->GopHeight, + 0 + ); + } + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + // + // Get the current UGA Draw mode information + // + Status = UgaDraw->GetMode ( + UgaDraw, + &HorizontalResolution, + &VerticalResolution, + &ColorDepth, + &RefreshRate + ); + if (EFI_ERROR (Status) || HorizontalResolution != ModeData->GopWidth || VerticalResolution != ModeData->GopHeight) { + // + // Either no graphics mode is currently set, or it is set to the wrong resolution, so set the new graphics mode + // + Status = UgaDraw->SetMode ( + UgaDraw, + ModeData->GopWidth, + ModeData->GopHeight, + 32, + 60 + ); + if (EFI_ERROR (Status)) { + // + // The mode set operation failed + // + goto Done; + } + } else { + // + // The current graphics mode is correct, so simply clear the entire display + // + Status = UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) (UINTN) &mGraphicsEfiColors[0], + EfiUgaVideoFill, + 0, + 0, + 0, + 0, + ModeData->GopWidth, + ModeData->GopHeight, + 0 + ); + } + } + + // + // The new mode is valid, so commit the mode change + // + This->Mode->Mode = (INT32) ModeNumber; + + // + // Move the text cursor to the upper left hand corner of the display and enable it + // + This->SetCursorPosition (This, 0, 0); + + Status = EFI_SUCCESS; + +Done: + gBS->RestoreTPL (OldTpl); + return Status; +} + + +/** + Sets the background and foreground colors for the OutputString () and + ClearScreen () functions. + + Implements SIMPLE_TEXT_OUTPUT.SetAttribute(). + + @param This Protocol instance pointer. + @param Attribute The attribute to set. Bits 0..3 are the foreground + color, and bits 4..6 are the background color. + All other bits are undefined and must be zero. + + @retval EFI_SUCCESS The requested attribute is set. + @retval EFI_DEVICE_ERROR The requested attribute cannot be set due to Graphics Console port error. + @retval EFI_UNSUPPORTED The attribute requested is not defined. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutSetAttribute ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN Attribute + ) +{ + EFI_TPL OldTpl; + + if ((Attribute | 0xFF) != 0xFF) { + return EFI_UNSUPPORTED; + } + + if ((INT32) Attribute == This->Mode->Attribute) { + return EFI_SUCCESS; + } + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + + EraseCursor (This); + + This->Mode->Attribute = (INT32) Attribute; + + EraseCursor (This); + + gBS->RestoreTPL (OldTpl); + + return EFI_SUCCESS; +} + + +/** + Clears the output device(s) display to the currently selected background + color. + + Implements SIMPLE_TEXT_OUTPUT.ClearScreen(). + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutClearScreen ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This + ) +{ + EFI_STATUS Status; + GRAPHICS_CONSOLE_DEV *Private; + GRAPHICS_CONSOLE_MODE_DATA *ModeData; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL Foreground; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL Background; + EFI_TPL OldTpl; + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + GraphicsOutput = Private->GraphicsOutput; + UgaDraw = Private->UgaDraw; + ModeData = &(Private->ModeData[This->Mode->Mode]); + + GetTextColors (This, &Foreground, &Background); + if (GraphicsOutput != NULL) { + Status = GraphicsOutput->Blt ( + GraphicsOutput, + &Background, + EfiBltVideoFill, + 0, + 0, + 0, + 0, + ModeData->GopWidth, + ModeData->GopHeight, + 0 + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + Status = UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) (UINTN) &Background, + EfiUgaVideoFill, + 0, + 0, + 0, + 0, + ModeData->GopWidth, + ModeData->GopHeight, + 0 + ); + } else { + Status = EFI_UNSUPPORTED; + } + + This->Mode->CursorColumn = 0; + This->Mode->CursorRow = 0; + + EraseCursor (This); + + gBS->RestoreTPL (OldTpl); + + return Status; +} + + +/** + Sets the current coordinates of the cursor position. + + Implements SIMPLE_TEXT_OUTPUT.SetCursorPosition(). + + @param This Protocol instance pointer. + @param Column The position to set the cursor to. Must be greater than or + equal to zero and less than the number of columns and rows + by QueryMode (). + @param Row The position to set the cursor to. Must be greater than or + equal to zero and less than the number of columns and rows + by QueryMode (). + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode, or the + cursor position is invalid for the current mode. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutSetCursorPosition ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN Column, + IN UINTN Row + ) +{ + GRAPHICS_CONSOLE_DEV *Private; + GRAPHICS_CONSOLE_MODE_DATA *ModeData; + EFI_STATUS Status; + EFI_TPL OldTpl; + + Status = EFI_SUCCESS; + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + ModeData = &(Private->ModeData[This->Mode->Mode]); + + if ((Column >= ModeData->Columns) || (Row >= ModeData->Rows)) { + Status = EFI_UNSUPPORTED; + goto Done; + } + + if ((This->Mode->CursorColumn == (INT32) Column) && (This->Mode->CursorRow == (INT32) Row)) { + Status = EFI_SUCCESS; + goto Done; + } + + EraseCursor (This); + + This->Mode->CursorColumn = (INT32) Column; + This->Mode->CursorRow = (INT32) Row; + + EraseCursor (This); + +Done: + gBS->RestoreTPL (OldTpl); + + return Status; +} + + +/** + Makes the cursor visible or invisible. + + Implements SIMPLE_TEXT_OUTPUT.EnableCursor(). + + @param This Protocol instance pointer. + @param Visible If TRUE, the cursor is set to be visible, If FALSE, + the cursor is set to be invisible. + + @retval EFI_SUCCESS The operation completed successfully. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutEnableCursor ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN BOOLEAN Visible + ) +{ + EFI_TPL OldTpl; + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + + EraseCursor (This); + + This->Mode->CursorVisible = Visible; + + EraseCursor (This); + + gBS->RestoreTPL (OldTpl); + return EFI_SUCCESS; +} + +/** + Gets Graphics Console devcie's foreground color and background color. + + @param This Protocol instance pointer. + @param Foreground Returned text foreground color. + @param Background Returned text background color. + + @retval EFI_SUCCESS It returned always. + +**/ +EFI_STATUS +GetTextColors ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Foreground, + OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Background + ) +{ + INTN Attribute; + + Attribute = This->Mode->Attribute & 0x7F; + + *Foreground = mGraphicsEfiColors[Attribute & 0x0f]; + *Background = mGraphicsEfiColors[Attribute >> 4]; + + return EFI_SUCCESS; +} + +/** + Draw Unicode string on the Graphics Console device's screen. + + @param This Protocol instance pointer. + @param UnicodeWeight One Unicode string to be displayed. + @param Count The count of Unicode string. + + @retval EFI_OUT_OF_RESOURCES If no memory resource to use. + @retval EFI_UNSUPPORTED If no Graphics Output protocol and UGA Draw + protocol exist. + @retval EFI_SUCCESS Drawing Unicode string implemented successfully. + +**/ +EFI_STATUS +DrawUnicodeWeightAtCursorN ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *UnicodeWeight, + IN UINTN Count + ) +{ + EFI_STATUS Status; + GRAPHICS_CONSOLE_DEV *Private; + EFI_IMAGE_OUTPUT *Blt; + EFI_STRING String; + EFI_FONT_DISPLAY_INFO *FontInfo; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + EFI_HII_ROW_INFO *RowInfoArray; + UINTN RowInfoArraySize; + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + Blt = (EFI_IMAGE_OUTPUT *) AllocateZeroPool (sizeof (EFI_IMAGE_OUTPUT)); + if (Blt == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + Blt->Width = (UINT16) (Private->ModeData[This->Mode->Mode].GopWidth); + Blt->Height = (UINT16) (Private->ModeData[This->Mode->Mode].GopHeight); + + String = AllocateCopyPool ((Count + 1) * sizeof (CHAR16), UnicodeWeight); + if (String == NULL) { + FreePool (Blt); + return EFI_OUT_OF_RESOURCES; + } + // + // Set the end character + // + *(String + Count) = L'\0'; + + FontInfo = (EFI_FONT_DISPLAY_INFO *) AllocateZeroPool (sizeof (EFI_FONT_DISPLAY_INFO)); + if (FontInfo == NULL) { + FreePool (Blt); + FreePool (String); + return EFI_OUT_OF_RESOURCES; + } + // + // Get current foreground and background colors. + // + GetTextColors (This, &FontInfo->ForegroundColor, &FontInfo->BackgroundColor); + + if (Private->GraphicsOutput != NULL) { + // + // If Graphics Output protocol exists, using HII Font protocol to draw. + // + Blt->Image.Screen = Private->GraphicsOutput; + + Status = mHiiFont->StringToImage ( + mHiiFont, + EFI_HII_IGNORE_IF_NO_GLYPH | EFI_HII_DIRECT_TO_SCREEN | EFI_HII_IGNORE_LINE_BREAK, + String, + FontInfo, + &Blt, + This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, + This->Mode->CursorRow * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, + NULL, + NULL, + NULL + ); + + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + // + // If Graphics Output protocol cannot be found and PcdUgaConsumeSupport enabled, + // using UGA Draw protocol to draw. + // + ASSERT (Private->UgaDraw!= NULL); + + UgaDraw = Private->UgaDraw; + + Blt->Image.Bitmap = AllocateZeroPool (Blt->Width * Blt->Height * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)); + if (Blt->Image.Bitmap == NULL) { + FreePool (Blt); + FreePool (String); + return EFI_OUT_OF_RESOURCES; + } + + RowInfoArray = NULL; + // + // StringToImage only support blt'ing image to device using GOP protocol. If GOP is not supported in this platform, + // we ask StringToImage to print the string to blt buffer, then blt to device using UgaDraw. + // + Status = mHiiFont->StringToImage ( + mHiiFont, + EFI_HII_IGNORE_IF_NO_GLYPH | EFI_HII_IGNORE_LINE_BREAK, + String, + FontInfo, + &Blt, + This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, + This->Mode->CursorRow * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, + &RowInfoArray, + &RowInfoArraySize, + NULL + ); + + if (!EFI_ERROR (Status)) { + // + // Line breaks are handled by caller of DrawUnicodeWeightAtCursorN, so the updated parameter RowInfoArraySize by StringToImage will + // always be 1 or 0 (if there is no valid Unicode Char can be printed). ASSERT here to make sure. + // + ASSERT (RowInfoArraySize <= 1); + + Status = UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) Blt->Image.Bitmap, + EfiUgaBltBufferToVideo, + This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, + (This->Mode->CursorRow) * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, + This->Mode->CursorColumn * EFI_GLYPH_WIDTH + Private->ModeData[This->Mode->Mode].DeltaX, + (This->Mode->CursorRow) * EFI_GLYPH_HEIGHT + Private->ModeData[This->Mode->Mode].DeltaY, + RowInfoArray[0].LineWidth, + RowInfoArray[0].LineHeight, + Blt->Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + ); + } + + FreePool (RowInfoArray); + FreePool (Blt->Image.Bitmap); + } else { + Status = EFI_UNSUPPORTED; + } + + if (Blt != NULL) { + FreePool (Blt); + } + if (String != NULL) { + FreePool (String); + } + if (FontInfo != NULL) { + FreePool (FontInfo); + } + return Status; +} + +/** + Erase the cursor on the screen. + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The cursor is erased successfully. + +**/ +EFI_STATUS +EraseCursor ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This + ) +{ + GRAPHICS_CONSOLE_DEV *Private; + EFI_SIMPLE_TEXT_OUTPUT_MODE *CurrentMode; + INTN GlyphX; + INTN GlyphY; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Foreground; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION Background; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION BltChar[EFI_GLYPH_HEIGHT][EFI_GLYPH_WIDTH]; + UINTN PosX; + UINTN PosY; + + CurrentMode = This->Mode; + + if (!CurrentMode->CursorVisible) { + return EFI_SUCCESS; + } + + Private = GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS (This); + GraphicsOutput = Private->GraphicsOutput; + UgaDraw = Private->UgaDraw; + + // + // In this driver, only narrow character was supported. + // + // + // Blt a character to the screen + // + GlyphX = (CurrentMode->CursorColumn * EFI_GLYPH_WIDTH) + Private->ModeData[CurrentMode->Mode].DeltaX; + GlyphY = (CurrentMode->CursorRow * EFI_GLYPH_HEIGHT) + Private->ModeData[CurrentMode->Mode].DeltaY; + if (GraphicsOutput != NULL) { + GraphicsOutput->Blt ( + GraphicsOutput, + (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) BltChar, + EfiBltVideoToBltBuffer, + GlyphX, + GlyphY, + 0, + 0, + EFI_GLYPH_WIDTH, + EFI_GLYPH_HEIGHT, + EFI_GLYPH_WIDTH * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) (UINTN) BltChar, + EfiUgaVideoToBltBuffer, + GlyphX, + GlyphY, + 0, + 0, + EFI_GLYPH_WIDTH, + EFI_GLYPH_HEIGHT, + EFI_GLYPH_WIDTH * sizeof (EFI_UGA_PIXEL) + ); + } + + GetTextColors (This, &Foreground.Pixel, &Background.Pixel); + + // + // Convert Monochrome bitmap of the Glyph to BltBuffer structure + // + for (PosY = 0; PosY < EFI_GLYPH_HEIGHT; PosY++) { + for (PosX = 0; PosX < EFI_GLYPH_WIDTH; PosX++) { + if ((mCursorGlyph.GlyphCol1[PosY] & (BIT0 << PosX)) != 0) { + BltChar[PosY][EFI_GLYPH_WIDTH - PosX - 1].Raw ^= Foreground.Raw; + } + } + } + + if (GraphicsOutput != NULL) { + GraphicsOutput->Blt ( + GraphicsOutput, + (EFI_GRAPHICS_OUTPUT_BLT_PIXEL *) BltChar, + EfiBltBufferToVideo, + 0, + 0, + GlyphX, + GlyphY, + EFI_GLYPH_WIDTH, + EFI_GLYPH_HEIGHT, + EFI_GLYPH_WIDTH * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) + ); + } else if (FeaturePcdGet (PcdUgaConsumeSupport)) { + UgaDraw->Blt ( + UgaDraw, + (EFI_UGA_PIXEL *) (UINTN) BltChar, + EfiUgaBltBufferToVideo, + 0, + 0, + GlyphX, + GlyphY, + EFI_GLYPH_WIDTH, + EFI_GLYPH_HEIGHT, + EFI_GLYPH_WIDTH * sizeof (EFI_UGA_PIXEL) + ); + } + + return EFI_SUCCESS; +} + +/** + HII Database Protocol notification event handler. + + Register font package when HII Database Protocol has been installed. + + @param[in] Event Event whose notification function is being invoked. + @param[in] Context Pointer to the notification function's context. +**/ +VOID +EFIAPI +RegisterFontPackage ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + EFI_STATUS Status; + EFI_HII_SIMPLE_FONT_PACKAGE_HDR *SimplifiedFont; + UINT32 PackageLength; + UINT8 *Package; + UINT8 *Location; + EFI_HII_DATABASE_PROTOCOL *HiiDatabase; + + // + // Locate HII Database Protocol + // + Status = gBS->LocateProtocol ( + &gEfiHiiDatabaseProtocolGuid, + NULL, + (VOID **) &HiiDatabase + ); + ASSERT_EFI_ERROR (Status); + + // + // Add 4 bytes to the header for entire length for HiiAddPackages use only. + // + // +--------------------------------+ <-- Package + // | | + // | PackageLength(4 bytes) | + // | | + // |--------------------------------| <-- SimplifiedFont + // | | + // |EFI_HII_SIMPLE_FONT_PACKAGE_HDR | + // | | + // |--------------------------------| <-- Location + // | | + // | gUsStdNarrowGlyphData | + // | | + // +--------------------------------+ + + PackageLength = sizeof (EFI_HII_SIMPLE_FONT_PACKAGE_HDR) + mNarrowFontSize + 4; + Package = AllocateZeroPool (PackageLength); + ASSERT (Package != NULL); + + WriteUnaligned32((UINT32 *) Package,PackageLength); + SimplifiedFont = (EFI_HII_SIMPLE_FONT_PACKAGE_HDR *) (Package + 4); + SimplifiedFont->Header.Length = (UINT32) (PackageLength - 4); + SimplifiedFont->Header.Type = EFI_HII_PACKAGE_SIMPLE_FONTS; + SimplifiedFont->NumberOfNarrowGlyphs = (UINT16) (mNarrowFontSize / sizeof (EFI_NARROW_GLYPH)); + + Location = (UINT8 *) (&SimplifiedFont->NumberOfWideGlyphs + 1); + CopyMem (Location, gUsStdNarrowGlyphData, mNarrowFontSize); + + // + // Add this simplified font package to a package list then install it. + // + mHiiHandle = HiiAddPackages ( + &mFontPackageListGuid, + NULL, + Package, + NULL + ); + ASSERT (mHiiHandle != NULL); + FreePool (Package); +} + + +/** + The user Entry Point for module GraphicsConsole. The user code starts with this function. + + @param[in] ImageHandle The firmware allocated handle for the EFI image. + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The entry point is executed successfully. + @return other Some error occurs when executing this entry point. + +**/ +EFI_STATUS +EFIAPI +InitializeGraphicsConsole ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = gBS->InstallMultipleProtocolInterfaces( + &ImageHandle, + &gEfiGraphicsOutputProtocolGuid,&gDisplay, + NULL + ); + ASSERT_EFI_ERROR(Status); + + // + // Register notify function on HII Database Protocol to add font package. + // + EfiCreateProtocolNotifyEvent ( + &gEfiHiiDatabaseProtocolGuid, + TPL_CALLBACK, + RegisterFontPackage, + NULL, + &mHiiRegistration + ); + + // + // Install driver model protocol(s). + // + Status = EfiLibInstallDriverBindingComponentName2 ( + ImageHandle, + SystemTable, + &gGraphicsConsoleDriverBinding, + ImageHandle, + &gGraphicsConsoleComponentName, + &gGraphicsConsoleComponentName2 + ); + ASSERT_EFI_ERROR (Status); + + return Status; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h new file mode 100755 index 000000000..6e2c7955d --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsole.h @@ -0,0 +1,615 @@ +/** @file + Header file for GraphicsConsole driver. + +Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _GRAPHICS_CONSOLE_H_ +#define _GRAPHICS_CONSOLE_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + + +extern EFI_COMPONENT_NAME_PROTOCOL gGraphicsConsoleComponentName; +extern EFI_COMPONENT_NAME2_PROTOCOL gGraphicsConsoleComponentName2; +extern EFI_DRIVER_BINDING_PROTOCOL gGraphicsConsoleDriverBinding; +extern EFI_NARROW_GLYPH gUsStdNarrowGlyphData[]; +extern EFI_GRAPHICS_OUTPUT_PROTOCOL gDisplay; +extern UINT32 mNarrowFontSize; +// +// User can define valid graphic resolution here +// e.g. 640x480, 800x600, 1024x768... +// +#define CURRENT_HORIZONTAL_RESOLUTION 1366 +#define CURRENT_VERTICAL_RESOLUTION 768 + +typedef union { + EFI_NARROW_GLYPH NarrowGlyph; + EFI_WIDE_GLYPH WideGlyph; +} GLYPH_UNION; + +// +// Device Structure +// +#define GRAPHICS_CONSOLE_DEV_SIGNATURE SIGNATURE_32 ('g', 's', 't', 'o') + + +typedef struct { + UINTN Columns; + UINTN Rows; + INTN DeltaX; + INTN DeltaY; + UINT32 GopWidth; + UINT32 GopHeight; + UINT32 GopModeNumber; +} GRAPHICS_CONSOLE_MODE_DATA; + + +#define GRAPHICS_MAX_MODE 4 + +typedef struct { + UINTN Signature; + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput; + EFI_UGA_DRAW_PROTOCOL *UgaDraw; + EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL SimpleTextOutput; + EFI_SIMPLE_TEXT_OUTPUT_MODE SimpleTextOutputMode; + GRAPHICS_CONSOLE_MODE_DATA ModeData[GRAPHICS_MAX_MODE]; + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LineBuffer; +} GRAPHICS_CONSOLE_DEV; + + +#define GRAPHICS_CONSOLE_CON_OUT_DEV_FROM_THIS(a) \ + CR (a, GRAPHICS_CONSOLE_DEV, SimpleTextOutput, GRAPHICS_CONSOLE_DEV_SIGNATURE) + + +// +// EFI Component Name Functions +// +/** + Retrieves a Unicode string that is the user readable name of the driver. + + This function retrieves the user readable name of a driver in the form of a + Unicode string. If the driver specified by This has a user readable name in + the language specified by Language, then a pointer to the driver name is + returned in DriverName, and EFI_SUCCESS is returned. If the driver specified + by This does not support the language specified by Language, + then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified + in RFC 4646 or ISO 639-2 language code format. + + @param DriverName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by + This and the language specified by Language was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by a driver. + + This function retrieves the user readable name of the controller specified by + ControllerHandle and ChildHandle in the form of a Unicode string. If the + driver specified by This has a user readable name in the language specified by + Language, then a pointer to the controller name is returned in ControllerName, + and EFI_SUCCESS is returned. If the driver specified by This is not currently + managing the controller specified by ControllerHandle and ChildHandle, + then EFI_UNSUPPORTED is returned. If the driver specified by This does not + support the language specified by Language, then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param ControllerHandle[in] The handle of a controller that the driver + specified by This is managing. This handle + specifies the controller whose name is to be + returned. + + @param ChildHandle[in] The handle of the child controller to retrieve + the name of. This is an optional parameter that + may be NULL. It will be NULL for device + drivers. It will also be NULL for a bus drivers + that wish to retrieve the name of the bus + controller. It will not be NULL for a bus + driver that wishes to retrieve the name of a + child controller. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified in + RFC 4646 or ISO 639-2 language code format. + + @param ControllerName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + controller specified by ControllerHandle and + ChildHandle in the language specified by + Language from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in + the language specified by Language for the + driver specified by This was returned in + DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid + EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle OPTIONAL, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + + +/** + Reset the text output device hardware and optionally run diagnostics. + + Implements SIMPLE_TEXT_OUTPUT.Reset(). + If ExtendeVerification is TRUE, then perform dependent Graphics Console + device reset, and set display mode to mode 0. + If ExtendedVerification is FALSE, only set display mode to mode 0. + + @param This Protocol instance pointer. + @param ExtendedVerification Indicates that the driver may perform a more + exhaustive verification operation of the device + during reset. + + @retval EFI_SUCCESS The text output device was reset. + @retval EFI_DEVICE_ERROR The text output device is not functioning correctly and + could not be reset. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutReset ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ); + +/** + Write a Unicode string to the output device. + + Implements SIMPLE_TEXT_OUTPUT.OutputString(). + The Unicode string will be converted to Glyphs and will be + sent to the Graphics Console. + + @param This Protocol instance pointer. + @param WString The NULL-terminated Unicode string to be displayed + on the output device(s). All output devices must + also support the Unicode drawing defined in this file. + + @retval EFI_SUCCESS The string was output to the device. + @retval EFI_DEVICE_ERROR The device reported an error while attempting to output + the text. + @retval EFI_UNSUPPORTED The output device's mode is not currently in a + defined text mode. + @retval EFI_WARN_UNKNOWN_GLYPH This warning code indicates that some of the + characters in the Unicode string could not be + rendered and were skipped. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutOutputString ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *WString + ); + +/** + Verifies that all characters in a Unicode string can be output to the + target device. + + Implements SIMPLE_TEXT_OUTPUT.TestString(). + If one of the characters in the *Wstring is neither valid valid Unicode + drawing characters, not ASCII code, then this function will return + EFI_UNSUPPORTED + + @param This Protocol instance pointer. + @param WString The NULL-terminated Unicode string to be examined for the output + device(s). + + @retval EFI_SUCCESS The device(s) are capable of rendering the output string. + @retval EFI_UNSUPPORTED Some of the characters in the Unicode string cannot be + rendered by one or more of the output devices mapped + by the EFI handle. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutTestString ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *WString + ); + +/** + Returns information for an available text mode that the output device(s) + supports + + Implements SIMPLE_TEXT_OUTPUT.QueryMode(). + It returnes information for an available text mode that the Graphics Console supports. + In this driver,we only support text mode 80x25, which is defined as mode 0. + + @param This Protocol instance pointer. + @param ModeNumber The mode number to return information on. + @param Columns The returned columns of the requested mode. + @param Rows The returned rows of the requested mode. + + @retval EFI_SUCCESS The requested mode information is returned. + @retval EFI_UNSUPPORTED The mode number is not valid. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutQueryMode ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN ModeNumber, + OUT UINTN *Columns, + OUT UINTN *Rows + ); + + +/** + Sets the output device(s) to a specified mode. + + Implements SIMPLE_TEXT_OUTPUT.SetMode(). + Set the Graphics Console to a specified mode. In this driver, we only support mode 0. + + @param This Protocol instance pointer. + @param ModeNumber The text mode to set. + + @retval EFI_SUCCESS The requested text mode is set. + @retval EFI_DEVICE_ERROR The requested text mode cannot be set because of + Graphics Console device error. + @retval EFI_UNSUPPORTED The text mode number is not valid. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutSetMode ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN ModeNumber + ); + +/** + Sets the background and foreground colors for the OutputString () and + ClearScreen () functions. + + Implements SIMPLE_TEXT_OUTPUT.SetAttribute(). + + @param This Protocol instance pointer. + @param Attribute The attribute to set. Bits 0..3 are the foreground + color, and bits 4..6 are the background color. + All other bits are undefined and must be zero. + + @retval EFI_SUCCESS The requested attribute is set. + @retval EFI_DEVICE_ERROR The requested attribute cannot be set due to Graphics Console port error. + @retval EFI_UNSUPPORTED The attribute requested is not defined. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutSetAttribute ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN Attribute + ); + +/** + Clears the output device(s) display to the currently selected background + color. + + Implements SIMPLE_TEXT_OUTPUT.ClearScreen(). + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutClearScreen ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This + ); + +/** + Sets the current coordinates of the cursor position. + + Implements SIMPLE_TEXT_OUTPUT.SetCursorPosition(). + + @param This Protocol instance pointer. + @param Column The position to set the cursor to. Must be greater than or + equal to zero and less than the number of columns and rows + by QueryMode (). + @param Row The position to set the cursor to. Must be greater than or + equal to zero and less than the number of columns and rows + by QueryMode (). + + @retval EFI_SUCCESS The operation completed successfully. + @retval EFI_DEVICE_ERROR The device had an error and could not complete the request. + @retval EFI_UNSUPPORTED The output device is not in a valid text mode, or the + cursor position is invalid for the current mode. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutSetCursorPosition ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN UINTN Column, + IN UINTN Row + ); + + +/** + Makes the cursor visible or invisible. + + Implements SIMPLE_TEXT_OUTPUT.EnableCursor(). + + @param This Protocol instance pointer. + @param Visible If TRUE, the cursor is set to be visible, If FALSE, + the cursor is set to be invisible. + + @retval EFI_SUCCESS The operation completed successfully. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleConOutEnableCursor ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN BOOLEAN Visible + ); + +/** + Test to see if Graphics Console could be supported on the Controller. + + Graphics Console could be supported if Graphics Output Protocol or UGA Draw + Protocol exists on the Controller. (UGA Draw Protocol could be skipped + if PcdUgaConsumeSupport is set to FALSE.) + + @param This Protocol instance pointer. + @param Controller Handle of device to test. + @param RemainingDevicePath Optional parameter use to pick a specific child + device to start. + + @retval EFI_SUCCESS This driver supports this device. + @retval other This driver does not support this device. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleControllerDriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ); + + +/** + Start this driver on Controller by opening Graphics Output protocol or + UGA Draw protocol, and installing Simple Text Out protocol on Controller. + (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) + + @param This Protocol instance pointer. + @param Controller Handle of device to bind driver to + @param RemainingDevicePath Optional parameter use to pick a specific child + device to start. + + @retval EFI_SUCCESS This driver is added to Controller. + @retval other This driver does not support this device. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleControllerDriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ); + +/** + Stop this driver on Controller by removing Simple Text Out protocol + and closing the Graphics Output Protocol or UGA Draw protocol on Controller. + (UGA Draw protocol could be skipped if PcdUgaConsumeSupport is set to FALSE.) + + + @param This Protocol instance pointer. + @param Controller Handle of device to stop driver on + @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of + children is zero stop the entire bus driver. + @param ChildHandleBuffer List of Child Handles to Stop. + + @retval EFI_SUCCESS This driver is removed Controller. + @retval EFI_NOT_STARTED Simple Text Out protocol could not be found the + Controller. + @retval other This driver was not removed from this device. + +**/ +EFI_STATUS +EFIAPI +GraphicsConsoleControllerDriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ); + + +/** + Locate HII Database protocol and HII Font protocol. + + @retval EFI_SUCCESS HII Database protocol and HII Font protocol + are located successfully. + @return other Failed to locate HII Database protocol or + HII Font protocol. + +**/ +EFI_STATUS +EfiLocateHiiProtocol ( + VOID + ); + + +/** + Gets Graphics Console devcie's foreground color and background color. + + @param This Protocol instance pointer. + @param Foreground Returned text foreground color. + @param Background Returned text background color. + + @retval EFI_SUCCESS It returned always. + +**/ +EFI_STATUS +GetTextColors ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Foreground, + OUT EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Background + ); + +/** + Draw Unicode string on the Graphics Console device's screen. + + @param This Protocol instance pointer. + @param UnicodeWeight One Unicode string to be displayed. + @param Count The count of Unicode string. + + @retval EFI_OUT_OF_RESOURCES If no memory resource to use. + @retval EFI_UNSUPPORTED If no Graphics Output protocol and UGA Draw + protocol exist. + @retval EFI_SUCCESS Drawing Unicode string implemented successfully. + +**/ +EFI_STATUS +DrawUnicodeWeightAtCursorN ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This, + IN CHAR16 *UnicodeWeight, + IN UINTN Count + ); + +/** + Erase the cursor on the screen. + + @param This Protocol instance pointer. + + @retval EFI_SUCCESS The cursor is erased successfully. + +**/ +EFI_STATUS +EraseCursor ( + IN EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL *This + ); + +/** + Check if the current specific mode supported the user defined resolution + for the Graphics Console device based on Graphics Output Protocol. + + If yes, set the graphic device's current mode to this specific mode. + + @param GraphicsOutput Graphics Output Protocol instance pointer. + @param HorizontalResolution User defined horizontal resolution + @param VerticalResolution User defined vertical resolution. + @param CurrentModeNumber Current specific mode to be check. + + @retval EFI_SUCCESS The mode is supported. + @retval EFI_UNSUPPORTED The specific mode is out of range of graphics + device supported. + @retval other The specific mode does not support user defined + resolution or failed to set the current mode to the + specific mode on graphics device. + +**/ +EFI_STATUS +CheckModeSupported ( + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput, + IN UINT32 HorizontalResolution, + IN UINT32 VerticalResolution, + OUT UINT32 *CurrentModeNumber + ); + +EFI_STATUS +ExynosGopConstructor ( + IN GRAPHICS_CONSOLE_DEV *Private + ); + +EFI_STATUS +ExynosGopDestructor ( + GRAPHICS_CONSOLE_DEV *Private + ); +#endif diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf new file mode 100755 index 000000000..2f858bd4f --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/GraphicsConsoleDxe.inf @@ -0,0 +1,73 @@ +## @file +# +# Component description file for GraphicsConsole module +# +# This is the main routine for initializing the Graphics Console support routines. +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = GraphicsConsoleDxe + FILE_GUID = c5deae31-fad2-4030-841b-cfc9644d2c5b + MODULE_TYPE = UEFI_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = InitializeGraphicsConsole + +# +# The following information is for reference only and not required by the build tools. +# +# VALID_ARCHITECTURES = IA32 X64 IPF EBC +# +# DRIVER_BINDING = gGraphicsConsoleDriverBinding +# COMPONENT_NAME = gGraphicsConsoleComponentName +# COMPONENT_NAME2 = gGraphicsConsoleComponentName2 +# + +[Sources] + ComponentName.c + LaffStd.c + GraphicsConsole.c + GraphicsConsole.h + ExynosGop.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + SamsungPlatformPkg/SamsungPlatformPkg.dec + +[LibraryClasses] + BaseLib + UefiLib + MemoryAllocationLib + UefiDriverEntryPoint + HiiLib + IoLib + +[Protocols] + gEfiSimpleTextOutProtocolGuid ## BY_START + gEfiGraphicsOutputProtocolGuid ## TO_START + gEfiUgaDrawProtocolGuid ## TO_START + gEfiHiiFontProtocolGuid ## TO_START + gEfiHiiDatabaseProtocolGuid ## TO_START + gSamsungPlatformGpioProtocolGuid ## GPIO Protocol + +[Guids] + +[FeaturePcd] + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport +[FixedPcd] + gExynosPkgTokenSpaceGuid.PcdCmuBase + gExynosPkgTokenSpaceGuid.PcdPmuBase + gExynosPkgTokenSpaceGuid.PcdSysBase + gExynosPkgTokenSpaceGuid.PcdFIMD0Base diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/LaffStd.c b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/LaffStd.c new file mode 100755 index 000000000..d5bf3ec71 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/GraphicsConsoleDxe/LaffStd.c @@ -0,0 +1,276 @@ +/** @file + Narrow font Data definition for GraphicsConsole driver. + +Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the BSD License +which accompanies this distribution. The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "GraphicsConsole.h" + + + +EFI_NARROW_GLYPH gUsStdNarrowGlyphData[] = { + // + // Unicode glyphs from 0x20 to 0x7e are the same as ASCII characters 0x20 to 0x7e + // + { 0x0020, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x0021, 0x00, {0x00,0x00,0x00,0x18,0x3C,0x3C,0x3C,0x18,0x18,0x18,0x18,0x18,0x00,0x18,0x18,0x00,0x00,0x00,0x00}}, + { 0x0022, 0x00, {0x00,0x00,0x00,0x6C,0x6C,0x6C,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x0023, 0x00, {0x00,0x00,0x00,0x00,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0xFE,0x6C,0x6C,0x6C,0x00,0x00,0x00,0x00}}, + { 0x0024, 0x00, {0x00,0x00,0x18,0x18,0x7C,0xC6,0xC6,0x60,0x38,0x0C,0x06,0xC6,0xC6,0x7C,0x18,0x18,0x00,0x00,0x00}}, + { 0x0025, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0x0C,0x0C,0x18,0x18,0x30,0x30,0x60,0x60,0xC6,0xC6,0x00,0x00,0x00,0x00}}, + { 0x0026, 0x00, {0x00,0x00,0x00,0x78,0xCC,0xCC,0xCC,0x78,0x76,0xDC,0xCC,0xCC,0xCC,0xCC,0x76,0x00,0x00,0x00,0x00}}, + { 0x0027, 0x00, {0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x0028, 0x00, {0x00,0x00,0x00,0x06,0x0C,0x0C,0x18,0x18,0x18,0x18,0x18,0x18,0x0C,0x0C,0x06,0x00,0x00,0x00,0x00}}, + { 0x0029, 0x00, {0x00,0x00,0x00,0xC0,0x60,0x60,0x30,0x30,0x30,0x30,0x30,0x30,0x60,0x60,0xC0,0x00,0x00,0x00,0x00}}, + { 0x002a, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x6C,0x38,0xFE,0x38,0x6C,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x002b, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x7E,0x18,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x002c, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x18,0x30,0x00,0x00,0x00,0x00}}, + { 0x002d, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x002e, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00}}, + { 0x002f, 0x00, {0x00,0x00,0x00,0x06,0x06,0x0C,0x0C,0x18,0x18,0x30,0x30,0x60,0x60,0xC0,0xC0,0x00,0x00,0x00,0x00}}, + { 0x0030, 0x00, {0x00,0x00,0x00,0x38,0x6C,0xC6,0xC6,0xC6,0xD6,0xD6,0xC6,0xC6,0xC6,0x6C,0x38,0x00,0x00,0x00,0x00}}, + { 0x0031, 0x00, {0x00,0x00,0x00,0x18,0x38,0x78,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x00,0x00,0x00,0x00}}, + { 0x0032, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0x06,0x06,0x06,0x0C,0x18,0x30,0x60,0xC0,0xC2,0xFE,0x00,0x00,0x00,0x00}}, + { 0x0033, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0x06,0x06,0x06,0x3C,0x06,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00}}, + { 0x0034, 0x00, {0x00,0x00,0x00,0x1C,0x1C,0x3C,0x3C,0x6C,0x6C,0xCC,0xFE,0x0C,0x0C,0x0C,0x1E,0x00,0x00,0x00,0x00}}, + { 0x0035, 0x00, {0x00,0x00,0x00,0xFE,0xC0,0xC0,0xC0,0xC0,0xFC,0x06,0x06,0x06,0x06,0xC6,0x7C,0x00,0x00,0x00,0x00}}, + { 0x0036, 0x00, {0x00,0x00,0x00,0x3C,0x60,0xC0,0xC0,0xC0,0xFC,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, + { 0x0037, 0x00, {0x00,0x00,0x00,0xFE,0xC6,0x06,0x06,0x06,0x0C,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00}}, + { 0x0038, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0x7C,0xC6,0xC6,0xC6,0xC6,0xC6,0x7C,0x00,0x00,0x00,0x00}}, + { 0x0039, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x06,0x06,0x06,0x0C,0x78,0x00,0x00,0x00,0x00}}, + { 0x003a, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00,0x00}}, + { 0x003b, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x18,0x18,0x30,0x00,0x00,0x00,0x00}}, + { 0x003c, 0x00, {0x00,0x00,0x00,0x00,0x06,0x0C,0x18,0x30,0x60,0xC0,0x60,0x30,0x18,0x0C,0x06,0x00,0x00,0x00,0x00}}, + { 0x003d, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { 0x003e, 0x00, {0x00,0x00,0x00,0x00,0xC0,0x60,0x30,0x18,0x0C,0x06,0x0C,0x18,0x30,0x60,0xC0,0x00,0x00,0x00,0x00}}, + { 0x003f, 0x00, {0x00,0x00,0x00,0x7C,0xC6,0xC6,0x0C,0x0C,0x18,0x18,0x18,0x00,0x00,0x18,0x18,0x00,0x00,0x00,0x00}}, + { 0x0040, 0x00, {0x00,0x00,0x00,0x00,0x7C,0xC6,0xC6,0xC6,0xDE,0xDE,0xDE,0xDC,0xC0,0xC0,0x7E,0x00,0x00,0x00,0x00}}, + + { 0x0041, 0x00, {0x00,0x00,0x00,0x10,0x38,0x6C,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, + + { 0x0042, 0x00, {0x00,0x00,0x00,0xFC,0x66,0x66,0x66,0x66,0x7C,0x66,0x66,0x66,0x66,0x66,0xFC,0x00,0x00,0x00,0x00}}, + { 0x0043, 0x00, {0x00,0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xC0,0xC0,0xC0,0xC2,0x66,0x3C,0x00,0x00,0x00,0x00}}, + { 0x0044, 0x00, {0x00,0x00,0x00,0xF8,0x6C,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x66,0x6C,0xF8,0x00,0x00,0x00,0x00}}, + { 0x0045, 0x00, {0x00,0x00,0x00,0xFE,0x66,0x62,0x60,0x68,0x78,0x68,0x60,0x60,0x62,0x66,0xFE,0x00,0x00,0x00,0x00}}, + { 0x0046, 0x00, {0x00,0x00,0x00,0xFE,0x66,0x62,0x60,0x64,0x7C,0x64,0x60,0x60,0x60,0x60,0xF0,0x00,0x00,0x00,0x00}}, + { 0x0047, 0x00, {0x00,0x00,0x00,0x3C,0x66,0xC2,0xC0,0xC0,0xC0,0xDE,0xC6,0xC6,0xC6,0x66,0x3C,0x00,0x00,0x00,0x00}}, + { 0x0048, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xFE,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x00,0x00,0x00,0x00}}, + { 0x0049, 0x00, {0x00,0x00,0x00,0xFC,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x30,0xFC,0x00,0x00,0x00,0x00}}, + { 0x004a, 0x00, {0x00,0x00,0x00,0x1E,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0x0C,0xCC,0xCC,0x78,0x00,0x00,0x00,0x00}}, + { 0x004b, 0x00, {0x00,0x00,0x00,0xE6,0x66,0x6C,0x6C,0x78,0x70,0x78,0x6C,0x6C,0x66,0x66,0xE6,0x00,0x00,0x00,0x00}}, + { 0x004c, 0x00, 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{0x00,0x00,0x00,0x0C,0x18,0x30,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0xF8,0x00}}, + { 0x00fe, 0x00, {0x00,0x00,0x00,0xE0,0x60,0x60,0x60,0x7C,0x66,0x66,0x66,0x66,0x66,0x66,0x7C,0x60,0x60,0xF0,0x00}}, + { 0x00ff, 0x00, {0x00,0x00,0x00,0xC6,0xC6,0x00,0x00,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0xC6,0x7E,0x06,0x0C,0x78,0x00}}, + + { (CHAR16)BOXDRAW_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_VERTICAL, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOWN_RIGHT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOWN_LEFT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_UP_RIGHT, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_UP_LEFT, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_VERTICAL_RIGHT, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_VERTICAL_LEFT, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOWN_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_UP_HORIZONTAL, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_VERTICAL_HORIZONTAL, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOUBLE_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_DOUBLE_VERTICAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOWN_RIGHT_DOUBLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOWN_DOUBLE_RIGHT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOUBLE_DOWN_RIGHT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOWN_LEFT_DOUBLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOWN_DOUBLE_LEFT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOUBLE_DOWN_LEFT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_UP_RIGHT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_UP_DOUBLE_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_DOUBLE_UP_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_UP_LEFT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_UP_DOUBLE_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_DOUBLE_UP_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_VERTICAL_RIGHT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x1F,0x18,0x1F,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_VERTICAL_DOUBLE_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOUBLE_VERTICAL_RIGHT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x37,0x30,0x37,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_VERTICAL_LEFT_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xF8,0x18,0xF8,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_VERTICAL_DOUBLE_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOUBLE_VERTICAL_LEFT, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF6,0x06,0xF6,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOWN_HORIZONTAL_DOUBLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_DOWN_DOUBLE_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOUBLE_DOWN_HORIZONTAL, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_UP_HORIZONTAL_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_UP_DOUBLE_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_DOUBLE_UP_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)BOXDRAW_VERTICAL_HORIZONTAL_DOUBLE, 0x00, {0x18,0x18,0x18,0x18,0x18,0x18,0x18,0xFF,0x18,0xFF,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18}}, + { (CHAR16)BOXDRAW_VERTICAL_DOUBLE_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xFF,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + { (CHAR16)BOXDRAW_DOUBLE_VERTICAL_HORIZONTAL, 0x00, {0x36,0x36,0x36,0x36,0x36,0x36,0x36,0xF7,0x00,0xF7,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36,0x36}}, + + { (CHAR16)BLOCKELEMENT_FULL_BLOCK, 0x00, {0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF}}, + { (CHAR16)BLOCKELEMENT_LIGHT_SHADE, 0x00, {0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22,0x88,0x22}}, + + { (CHAR16)GEOMETRICSHAPE_RIGHT_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0xC0,0xE0,0xF0,0xF8,0xFE,0xF8,0xF0,0xE0,0xC0,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)GEOMETRICSHAPE_LEFT_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x06,0x0E,0x1E,0x3E,0xFE,0x3E,0x1E,0x0E,0x06,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)GEOMETRICSHAPE_UP_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x38,0x38,0x7C,0x7C,0xFE,0xFE,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)GEOMETRICSHAPE_DOWN_TRIANGLE, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0xFE,0x7C,0x7C,0x38,0x38,0x10,0x00,0x00,0x00,0x00,0x00,0x00}}, + + { (CHAR16)ARROW_UP, 0x00, {0x00,0x00,0x00,0x18,0x3C,0x7E,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)ARROW_DOWN, 0x00, {0x00,0x00,0x00,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x18,0x7E,0x3C,0x18,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)ARROW_LEFT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x20,0x60,0x60,0xFE,0xFE,0x60,0x60,0x20,0x00,0x00,0x00,0x00,0x00,0x00}}, + { (CHAR16)ARROW_RIGHT, 0x00, {0x00,0x00,0x00,0x00,0x00,0x08,0x0C,0x0C,0xFE,0xFE,0x0C,0x0C,0x08,0x00,0x00,0x00,0x00,0x00,0x00}}, + + { 0x0000, 0x00, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} //EOL +}; + +// Get available Unicode glyphs narrow fonts(8*19 pixels) size. +UINT32 mNarrowFontSize = sizeof (gUsStdNarrowGlyphData); diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosLib.h b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosLib.h new file mode 100644 index 000000000..e8ec8597d --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosLib.h @@ -0,0 +1,24 @@ +/** @file + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EXYNOSLIB_H__ +#define __EXYNOSLIB_H__ + +UINT32 +EFIAPI +GpioBase ( + IN UINTN Port + ); + +#endif // __EXYNOSLIB_H__ diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosTimerLib.h b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosTimerLib.h new file mode 100644 index 000000000..c723ac128 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Library/ExynosTimerLib.h @@ -0,0 +1,65 @@ +/** @file +* +* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + + +#ifndef _EXYNOSTIMERLIB_H__ +#define _EXYNOSTIMERLIB_H__ + +typedef enum{ + TIMER_0, + TIMER_1, + TIMER_2, + TIMER_3, + TIMER_4, +}PWM_TIMERS; + +#define NUM_OF_TIMERS (0x05) +#define PWM_TCFG0_OFFSET (0x0000) +#define PWM_TCFG1_OFFSET (0x0004) +#define PWM_TCON_OFFSET (0x0008) +#define PWM_TCNTB0_OFFSET (0x000C) +#define PWM_TCMPB0_OFFSET (0x0010) +#define PWM_TCNTO0_OFFSET (0x0014) +#define PWM_TCNTB1_OFFSET (0x0018) +#define PWM_TCMPB1_OFFSET (0x001C) +#define PWM_TCNTO1_OFFSET (0x0020) +#define PWM_TCNTB2_OFFSET (0x0024) +#define PWM_TCMPB2_OFFSET (0x0028) +#define PWM_TCNTO2_OFFSET (0x002C) +#define PWM_TCNTB3_OFFSET (0x0030) +#define PWM_TCMPB3_OFFSET (0x0034) +#define PWM_TCNTO3_OFFSET (0x0038) +#define PWM_TCNTB4_OFFSET (0x003C) +#define PWM_TCNTO4_OFFSET (0x0040) +#define PWM_TINT_CSTAT_OFFSET (0x0044) + +#define TIMER_STATUS_MASK(timer_no) (1 << (NUM_OF_TIMERS + timer_no)) +#define TIMER_INTR_MASK(timer_no) (1 << (timer_no)) +#define STOP_TIMER_VAL(timer_no) ~(0x0f << (((timer_no + 1)*(!!timer_no)) << 2)) +#define UPDATE_COUNT_BUF_MASK(timer_no) (2 << (((timer_no + 1)*(!!timer_no)) << 2)) +#define RELOAD_AND_START(timer_no) ((AUTO_RELOAD | START_TIMERPOS) << (((timer_no + 1)*(!!timer_no)) << 2)) +#define START_TIMER(timer_no) (START_TIMERPOS << (((timer_no + 1)*(!!timer_no)) << 2)) + + +#define PRESCALE_GRP0_START_POS (0x00) +#define PRESCALE_TIMER_GRP0 (0x63) +#define PRESCALE_GRP1_START_POS (0x08) +#define PRESCALE_TIMER_GRP1 (0x63) +#define MAX_COUNT_VAL (0xFFFFFFFF) +#define AUTO_RELOAD (0x8) +#define START_TIMERPOS (0x1) + + + +#endif diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Include/Platform/ArmPlatform.h b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Platform/ArmPlatform.h new file mode 100644 index 000000000..edb814268 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Platform/ArmPlatform.h @@ -0,0 +1,693 @@ +/** @file +* Header defining RealView EB constants (Base addresses, sizes, flags) +* +* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#ifndef __ARMPLATFORM_H__ +#define __ARMPLATFORM_H__ + +/******************************************* +// Platform Memory Map +*******************************************/ + +/******************************************* +// Motherboard peripherals +*******************************************/ +//PMU DOMAIN offsets +#define SWRESET_OFFSET (0x400) +#define PMU_LCD0_CONF_OFFSET (0x3C80) +#define PMU_LCD0_STAT_OFFSET (0x3C84) +#define ARM_EB_BOARD_PERIPH_BASE 0x10000000 + + +#define LCD0_PWR_NRML_MODE (0x07) + +// SYSTRCL Register +#define ARM_EB_SYSCTRL 0x10001000 +#define ARM_EB_SYS_FLAGS_REG 0x10020814 +#define ARM_EB_SYS_FLAGS_SET_REG 0x10020814 +#define ARM_EB_SYS_FLAGS_CLR_REG 0x10020814 + +#define PL011_CONSOLE_UART_SPEED 115200 + + +// Exynos4210 DMC Base Address +#define Exynos4210_DMC_DELAY 0x3000 +#define Exynos4210_DMC_0_BASE 0x10400000 +#define Exynos4210_DMC_1_BASE 0x10410000 + +#define DMC_CONCONTROL 0x00 +#define DMC_MEMCONTROL 0x04 +#define DMC_MEMCONFIG0 0x08 +#define DMC_MEMCONFIG1 0x0C +#define DMC_DIRECTCMD 0x10 +#define DMC_PRECHCONFIG 0x14 +#define DMC_PHYCONTROL0 0x18 +#define DMC_PHYCONTROL1 0x1C +#define DMC_PHYCONTROL2 0x20 +#define DMC_PWRDNCONFIG 0x28 +#define DMC_TIMINGAREF 0x30 +#define DMC_TIMINGROW 0x34 +#define DMC_TIMINGDATA 0x38 +#define DMC_TIMINGPOWER 0x3C +#define DMC_PHYSTATUS 0x40 +#define DMC_PHYZQCONTROL 0x44 +#define DMC_CHIP0STATUS 0x48 +#define DMC_CHIP1STATUS 0x4C +#define DMC_AREFSTATUS 0x50 +#define DMC_MRSTATUS 0x54 +#define DMC_PHYTEST0 0x58 +#define DMC_PHYTEST1 0x5C +#define DMC_QOSCONTROL0 0x60 +#define DMC_QOSCONFIG0 0x64 +#define DMC_QOSCONTROL1 0x68 +#define DMC_QOSCONFIG1 0x6C +#define DMC_QOSCONTROL2 0x70 +#define DMC_QOSCONFIG2 0x74 +#define DMC_QOSCONTROL3 0x78 +#define DMC_QOSCONFIG3 0x7C +#define DMC_QOSCONTROL4 0x80 +#define DMC_QOSCONFIG4 0x84 +#define DMC_QOSCONTROL5 0x88 +#define DMC_QOSCONFIG5 0x8C +#define DMC_QOSCONTROL6 0x90 +#define DMC_QOSCONFIG6 0x94 +#define DMC_QOSCONTROL7 0x98 +#define DMC_QOSCONFIG7 0x9C +#define DMC_QOSCONTROL8 0xA0 +#define DMC_QOSCONFIG8 0xA4 +#define DMC_QOSCONTROL9 0xA8 +#define DMC_QOSCONFIG9 0xAC +#define DMC_QOSCONTROL10 0xB0 +#define DMC_QOSCONFIG10 0xB4 +#define DMC_QOSCONTROL11 0xB8 +#define DMC_QOSCONFIG11 0xBC +#define DMC_QOSCONTROL12 0xC0 +#define DMC_QOSCONFIG12 0xC4 +#define DMC_QOSCONTROL13 0xC8 +#define DMC_QOSCONFIG13 0xCC +#define DMC_QOSCONTROL14 0xD0 +#define DMC_QOSCONFIG14 0xD4 +#define DMC_QOSCONTROL15 0xD8 +#define DMC_QOSCONFIG15 0xDC + +// Exynos4210 UART Register +#define Exynos4210_UART_BASE 0x13810000 + +#define ULCON_OFFSET 0x00 +#define UCON_OFFSET 0x04 +#define UFCON_OFFSET 0x08 +#define UMCON_OFFSET 0x0C +#define UTRSTAT_OFFSET 0x10 +#define UERSTAT_OFFSET 0x14 +#define UFSTAT_OFFSET 0x18 +#define UMSTAT_OFFSET 0x1C +#define UTXH_OFFSET 0x20 +#define URXH_OFFSET 0x24 +#define UBRDIV_OFFSET 0x28 +#define UDIVSLOT_OFFSET 0x2C +#define UINTP_OFFSET 0x30 +#define UINTSP_OFFSET 0x34 +#define UINTM_OFFSET 0x38 + + +#define UARTLCR_H ULCON_OFFSET +#define UARTECR UFCON_OFFSET +#define UARTCR UCON_OFFSET +#define UARTIBRD UBRDIV_OFFSET +#define UARTFBRD UDIVSLOT_OFFSET + +#define UART_TX_EMPTY_FLAG_MASK (0x02) +#define UART_RX_EMPTY_FLAG_MASK (0x01) +// Exynos4210 TZPC Register +#define Exynos4210_TZPC0_BASE 0x10110000 +#define Exynos4210_TZPC1_BASE 0x10120000 +#define Exynos4210_TZPC2_BASE 0x10130000 +#define Exynos4210_TZPC3_BASE 0x10140000 +#define Exynos4210_TZPC4_BASE 0x10150000 +#define Exynos4210_TZPC5_BASE 0x10160000 + + +#define TZPC0_OFFSET 0x10000 +#define TZPC1_OFFSET 0x20000 +#define TZPC2_OFFSET 0x30000 +#define TZPC3_OFFSET 0x40000 +#define TZPC4_OFFSET 0x50000 +#define TZPC5_OFFSET 0x60000 + +#define TZPC_DECPROT0SET_OFFSET 0x804 +#define TZPC_DECPROT1SET_OFFSET 0x810 +#define TZPC_DECPROT2SET_OFFSET 0x81C +#define TZPC_DECPROT3SET_OFFSET 0x828 + + +// Exynos4210 CMU Base Address +#define Exynos4210_CMU_DELAY 0x2000 +#define Exynos4210_CMU_BASE 0x10030000 +#define Exynos4210_CMU_DIV_DMC0 0x10500 + +#define CONFIG_CLK_1000_400_200 + +#if defined(CONFIG_CLK_800_330_165) +#define APLL_MDIV 0xC8 +#define APLL_PDIV 0x6 +#define APLL_SDIV 0x1 + +#define MPLL_MDIV 0x6E +#define MPLL_PDIV 0x4 +#define MPLL_SDIV 0x1 +#elif defined(CONFIG_CLK_800_400_200) +#define APLL_MDIV 0xC8 +#define APLL_PDIV 0x6 +#define APLL_SDIV 0x1 + +#define MPLL_MDIV 0xC8 +#define MPLL_PDIV 0x6 +#define MPLL_SDIV 0x1 +#elif defined(CONFIG_CLK_1000_330_165) +#define APLL_MDIV 0xFA +#define APLL_PDIV 0x6 +#define APLL_SDIV 0x1 + +#define MPLL_MDIV 0x6E +#define MPLL_PDIV 0x4 +#define MPLL_SDIV 0x1 +#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) +#define APLL_MDIV 0xFA +#define APLL_PDIV 0x6 +#define APLL_SDIV 0x1 + +#define MPLL_MDIV 0xC8 +#define MPLL_PDIV 0x6 +#define MPLL_SDIV 0x1 +#endif + +#define APLL_AFC_ENB 0x1 +#define APLL_AFC 0xC +#define APLL_CON1_VAL ((APLL_AFC_ENB << 31) | (APLL_AFC)) + +/* MPLL_CON1 */ +#define MPLL_AFC_ENB 0x0 +#if defined(CONFIG_CLK_800_330_165) || defined(CONFIG_CLK_1000_330_165) +#define MPLL_AFC 0xD +#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) || defined(CONFIG_CLK_800_400_200) +#define MPLL_AFC 0x1C +#endif +#define MPLL_CON1_VAL ((MPLL_AFC_ENB << 31) | (MPLL_AFC)) + +#define EPLL_MDIV 0x30 +#define EPLL_PDIV 0x3 +#define EPLL_SDIV 0x2 +#define EPLL_K 0x0 +#define EPLL_CON1_VAL (EPLL_K) + +#define VPLL_MDIV 0x35 +#define VPLL_PDIV 0x3 +#define VPLL_SDIV 0x2 + +#define VPLL_SSCG_EN 0x0 +#define VPLL_SEL_PF 0x0 +#define VPLL_MRR 0x11 +#define VPLL_MFR 0x0 +#define VPLL_K 0x400 +#define VPLL_CON1_VAL ((VPLL_SSCG_EN <<31) \ + | (VPLL_SEL_PF <<29) \ + | (VPLL_MRR <<24) \ + | (VPLL_MFR << 16) \ + | (VPLL_K)) +/********************************************************/ + +/* Set PLL */ +#define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv) + +#define APLL_CON0_VAL set_pll(APLL_MDIV,APLL_PDIV,APLL_SDIV) +#define MPLL_CON0_VAL set_pll(MPLL_MDIV,MPLL_PDIV,MPLL_SDIV) +#define EPLL_CON0_VAL set_pll(EPLL_MDIV,EPLL_PDIV,EPLL_SDIV) +#define VPLL_CON0_VAL set_pll(VPLL_MDIV,VPLL_PDIV,VPLL_SDIV) + +/* CLK_SRC_CPU */ +/* 0 = MOUTAPLL, 1 = SCLKMPLL */ +#define MUX_HPM_SEL_MOUTAPLL 0 +#define MUX_HPM_SEL_SCLKMPLL 1 +#define MUX_CORE_SEL_MOUTAPLL 0 +#define MUX_CORE_SEL_SCLKMPLL 1 + +/* 0 = FILPLL, 1 = MOUT */ +#define MUX_MPLL_SEL_FILPLL 0 +#define MUX_MPLL_SEL_MOUTMPLLFOUT 1 + +#define MUX_APLL_SEL_FILPLL 0 +#define MUX_APLL_SEL_MOUTMPLLFOUT 1 + +#define CLK_SRC_CPU_VAL_FINPLL ((MUX_HPM_SEL_MOUTAPLL << 20) \ + | (MUX_CORE_SEL_MOUTAPLL <<16) \ + | (MUX_MPLL_SEL_FILPLL << 8) \ + | (MUX_APLL_SEL_FILPLL <<0)) + +#define CLK_SRC_CPU_VAL_MOUTMPLLFOUT ((MUX_HPM_SEL_MOUTAPLL << 20) \ + | (MUX_CORE_SEL_MOUTAPLL <<16) \ + | (MUX_MPLL_SEL_MOUTMPLLFOUT << 8) \ + | (MUX_APLL_SEL_MOUTMPLLFOUT <<0)) + +/* CLK_DIV_CPU0 */ +#define APLL_RATIO 0x1 +#define PCLK_DBG_RATIO 0x1 +#define ATB_RATIO 0x3 +#define PERIPH_RATIO 0x3 +#define COREM1_RATIO 0x7 +#define COREM0_RATIO 0x3 +#define CORE_RATIO 0x0 +#define CLK_DIV_CPU0_VAL ((APLL_RATIO << 24) \ + | (PCLK_DBG_RATIO << 20)\ + | (ATB_RATIO << 16) \ + | (PERIPH_RATIO <<12) \ + | (COREM1_RATIO << 8) \ + | (COREM0_RATIO << 4) \ + | (CORE_RATIO)) + +/* CLK_DIV_CPU1 */ +#define HPM_RATIO 0x0 +#define COPY_RATIO 0x3 +#define CLK_DIV_CPU1_VAL ((HPM_RATIO << 4) | (COPY_RATIO)) + +/* CLK_SRC_DMC */ +#define MUX_PWI_SEL 0x0 +#define MUX_CORE_TIMERS_SEL 0x0 +#define MUX_DPHY_SEL 0x0 +#define MUX_DMC_BUS_SEL 0x0 +#define CLK_SRC_DMC_VAL ((MUX_PWI_SEL << 16) \ + | (MUX_CORE_TIMERS_SEL << 12) \ + | (MUX_DPHY_SEL << 8) \ + | (MUX_DMC_BUS_SEL << 4)) + +/* CLK_DIV_DMC0 */ +#if defined(CONFIG_CLK_1000_200_200) +#define CORE_TIMERS_RATIO 0x1 +#define COPY2_RATIO 0x3 +#define DMCP_RATIO 0x1 +#define DMCD_RATIO 0x0 +#define DMC_RATIO 0x3 +#define DPHY_RATIO 0x1 +#define ACP_PCLK_RATIO 0x1 +#define ACP_RATIO 0x3 +#else +#define CORE_TIMERS_RATIO 0x1 +#define COPY2_RATIO 0x3 +#define DMCP_RATIO 0x1 +#define DMCD_RATIO 0x1 +#define DMC_RATIO 0x1 +#define DPHY_RATIO 0x1 +#define ACP_PCLK_RATIO 0x1 +#define ACP_RATIO 0x3 +#endif +#define CLK_DIV_DMC0_VAL ((CORE_TIMERS_RATIO << 28) \ + | (COPY2_RATIO << 24) \ + | (DMCP_RATIO << 20) \ + | (DMCD_RATIO << 16) \ + | (DMC_RATIO << 12) \ + | (DPHY_RATIO << 8) \ + | (ACP_PCLK_RATIO << 4) \ + | (ACP_RATIO)) + +/* CLK_DIV_DMC1 */ +#define DPM_RATIO 0x1 +#define DVSEM_RATIO 0x1 +#define PWI_RATIO 0x1 +#define CLK_DIV_DMC1_VAL ((DPM_RATIO << 24) \ + | (DVSEM_RATIO << 16) \ + | (PWI_RATIO << 8)) + +/* CLK_SRC_TOP0 */ +#define MUX_ONENAND_SEL 0x0 /* 0 = DOUT133, 1 = DOUT166 */ +#define MUX_ACLK_133_SEL 0x0 /* 0 = SCLKMPLL, 1 = SCLKAPLL */ +#define MUX_ACLK_160_SEL 0x0 +#define MUX_ACLK_100_SEL 0x0 +#define MUX_ACLK_200_SEL 0x0 +#define MUX_VPLL_SEL 0x0 +#define MUX_EPLL_SEL 0x0 +#define CLK_SRC_TOP0_VAL ((MUX_ONENAND_SEL << 28) \ + | (MUX_ACLK_133_SEL << 24) \ + | (MUX_ACLK_160_SEL << 20) \ + | (MUX_ACLK_100_SEL << 16) \ + | (MUX_ACLK_200_SEL << 12) \ + | (MUX_VPLL_SEL << 8) \ + | (MUX_EPLL_SEL << 4)) + +/* CLK_SRC_TOP1 */ +#define VPLLSRC_SEL 0x0 /* 0 = FINPLL, 1 = SCLKHDMI27M */ +#define CLK_SRC_TOP1_VAL (VPLLSRC_SEL) + +/* CLK_DIV_TOP */ +#define ONENAND_RATIO 0x0 +#define ACLK_133_RATIO 0x5 +#define ACLK_160_RATIO 0x4 +#define ACLK_100_RATIO 0x7 +#define ACLK_200_RATIO 0x3 +#define CLK_DIV_TOP_VAL ((ONENAND_RATIO << 16) \ + | (ACLK_133_RATIO << 12) \ + | (ACLK_160_RATIO << 8) \ + | (ACLK_100_RATIO << 4) \ + | (ACLK_200_RATIO)) + +/* CLK_SRC_LEFTBUS */ +#define MUX_GDL_SEL 0x0 +#define CLK_SRC_LEFTBUS_VAL (MUX_GDL_SEL) + +/* CLK_DIV_LEFRBUS */ +#define GPL_RATIO 0x1 +#define GDL_RATIO 0x3 +#define CLK_DIV_LEFRBUS_VAL ((GPL_RATIO << 4) \ + | (GDL_RATIO)) + +/* CLK_SRC_RIGHTBUS */ +#define MUX_GDR_SEL 0x0 +#define CLK_SRC_RIGHTBUS_VAL (MUX_GDR_SEL) + +/* CLK_DIV_RIGHTBUS */ +#define GPR_RATIO 0x1 +#define GDR_RATIO 0x3 +#define CLK_DIV_RIGHTBUS_VAL ((GPR_RATIO << 4) \ + | (GDR_RATIO)) + +#define PLL_LOCKTIME 0x1C20 +/* APLL_LOCK */ +#define APLL_LOCK_VAL (PLL_LOCKTIME) +/* MPLL_LOCK */ +#define MPLL_LOCK_VAL (PLL_LOCKTIME) +/* EPLL_LOCK */ +#define EPLL_LOCK_VAL (PLL_LOCKTIME) +/* VPLL_LOCK */ +#define VPLL_LOCK_VAL (PLL_LOCKTIME) + +/* CLK_SRC_PERIL0 */ +#define PWM_SEL 0 +#define UART5_SEL 6 +#define UART4_SEL 6 +#define UART3_SEL 6 +#define UART2_SEL 6 +#define UART1_SEL 6 +#define UART0_SEL 6 +#define CLK_SRC_PERIL0_VAL ((PWM_SEL << 24)\ + | (UART5_SEL << 20) \ + | (UART4_SEL << 16) \ + | (UART3_SEL << 12) \ + | (UART2_SEL<< 8) \ + | (UART1_SEL << 4) \ + | (UART0_SEL)) + +/* CLK_DIV_PERIL0 */ +#if defined(CONFIG_CLK_800_330_165) || defined(CONFIG_CLK_1000_330_165) +#define UART5_RATIO 7 +#define UART4_RATIO 7 +#define UART3_RATIO 7 +#define UART2_RATIO 7 +#define UART1_RATIO 7 +#define UART0_RATIO 7 +#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) || defined(CONFIG_CLK_800_400_200) +#define UART5_RATIO 8 +#define UART4_RATIO 8 +#define UART3_RATIO 8 +#define UART2_RATIO 8 +#define UART1_RATIO 8 +#define UART0_RATIO 8 +#endif +#define CLK_DIV_PERIL0_VAL ((UART5_RATIO << 20) \ + | (UART4_RATIO << 16) \ + | (UART3_RATIO << 12) \ + | (UART2_RATIO << 8) \ + | (UART1_RATIO << 4) \ + | (UART0_RATIO)) + +#define MPLL_DEC (MPLL_MDIV * MPLL_MDIV / (MPLL_PDIV * 2^(MPLL_SDIV-1))) + +#define SCLK_UART MPLL_DEC/ (UART1_RATIO+1) +#if defined(CONFIG_CLK_800_330_165) || defined(CONFIG_CLK_1000_330_165) +#define UART_UBRDIV_VAL 0x2B/* (SCLK_UART/(115200*16) -1) */ +#define UART_UDIVSLOT_VAL 0xC /*((((SCLK_UART*10/(115200*16) -10))%10)*16/10)*/ +#elif defined(CONFIG_CLK_1000_400_200) || defined(CONFIG_CLK_1000_200_200) || defined(CONFIG_CLK_800_400_200) +#define UART_UBRDIV_VAL 0x2F /* (SCLK_UART/(115200*16) -1) */ +#define UART_UDIVSLOT_VAL 0x3 /*((((SCLK_UART*10/(115200*16) -10))%10)*16/10)*/ +#endif + +#define UART_115200_IDIV UART_UBRDIV_VAL +#define UART_115200_FDIV UART_UDIVSLOT_VAL + +#define UART_38400_IDIV UART_UBRDIV_VAL +#define UART_38400_FDIV UART_UDIVSLOT_VAL + +#define UART_19200_IDIV UART_UBRDIV_VAL +#define UART_19200_FDIV UART_UDIVSLOT_VAL + +#define UART_LCON_VAL 0x03 +#define UART_ECR_VAL 0x111 +#define UART_CR_VAL 0x3C5 + +// Exynos4210 CMU Register definition +#define CLK_SRC_LEFTBUS_OFFSET 0x04200 +#define CLK_DIV_LEFTBUS_OFFSET 0x04500 + +#define CLK_SRC_RIGHTBUS_OFFSET 0x08200 +#define CLK_DIV_RIGHTBUS_OFFSET 0x08500 + +#define EPLL_LOCK_OFFSET 0x0C010 +#define VPLL_LOCK_OFFSET 0x0C020 +#define EPLL_CON0_OFFSET 0x0C110 +#define EPLL_CON1_OFFSET 0x0C114 +#define VPLL_CON0_OFFSET 0x0C120 +#define VPLL_CON1_OFFSET 0x0C124 + +#define CLK_SRC_TOP0_OFFSET 0x0C210 +#define CLK_SRC_TOP1_OFFSET 0x0C214 +#define CLK_SRC_PERIL0_OFFSET 0x0C250 + +#define CLK_SRC_FSYS_OFFSET (0x0C240) +#define CLK_DIV_FSYS1_OFFSET (0x0C544) +#define CLK_DIV_FSYS2_OFFSET (0x0C548) +#define CLK_DIV_FSYS3_OFFSET (0x0C54C) + +#define CLK_DIV_PERIL0_OFFSET 0x0C550 +#define CLK_DIV_TOP_OFFSET 0x0C510 + +#define CLK_SRC_DMC_OFFSET 0x10200 +#define CLK_DIV_DMC0_OFFSET 0x10500 +#define CLK_DIV_DMC1_OFFSET 0x10504 + +#define APLL_LOCK_OFFSET 0x14000 +#define MPLL_LOCK_OFFSET 0x14008 +#define APLL_CON0_OFFSET 0x14100 +#define APLL_CON1_OFFSET 0x14104 +#define MPLL_CON0_OFFSET 0x14108 +#define MPLL_CON1_OFFSET 0x1410C + +#define CLK_SRC_CPU_OFFSET 0x14200 +#define CLK_DIV_CPU0_OFFSET 0x14500 +#define CLK_DIV_CPU1_OFFSET 0x14504 + +#define CLKGATE_IP_LCD0_OFFSET (0xC934) +#define CLKSRC_LCD0_OFFSET (0xC234) +#define CLKDIV_LCD0_OFFSET (0xC534) +#define CLKSRC_MASK_LCD0_OFFSET (0xC334) + +#define FIMD0_SCLKMPLL (0x06) +#define FIMD0_CLK_DIV (0x05) + +#define CLK_PPMULCD0_MASK (0x01 << 0x05) +#define CLKGATE_FIMD0_MASK (0x01 << 0x00) +#define CLKSRC_FIMD0_MASK (0x0F << 0x00) +#define CLKDIV_FIMD0_MASK (0x0F << 0x00) + +#define CLKSRC_FIMD0_SEL(x) ((x) << 0x00) +#define CLKDIV_FIMD0_SEL(x) ((x) << 0x00) +#define FIMD0_UNMASK (0x01 << 0x00) + +#define CLK_DIV_FSYS2 (CLK_BASE + 0xC548) +#define CLK_DIV_FSYS3 (CLK_BASE + 0xC54C) + +// Exynos4210 MIU Base Address +#define Exynos4210_MIU_BASE 0x10600000 + +#define MIU_INTLV_CONFIG 0x400 +#define MIU_INTLV_START_ADDR 0x808 +#define MIU_MAPPING_UPDATE 0x800 +#define MIU_INTLV_END_ADDR 0x810 + +#define MIU_SINGLE_MAPPING0_START_ADDR 0x818 +#define MIU_SINGLE_MAPPING0_END_ADDR 0x820 +#define MIU_SINGLE_MAPPING1_START_ADDR 0x828 +#define MIU_SINGLE_MAPPING1_END_ADDR 0x830 + +// Dynamic Memory C#define PWM_TIMER_Tontroller Base +#define ARM_EB_DMC_BASE 0x10018000 + +// Static Memory Controller Base +#define ARM_EB_SMC_CTRL_BASE 0x10080000 + +// System Configuration Controller register Base addresses +#define SYS_DISPLAY_CONTROL_OFFSET (0x0210) +#define FIMDBYPASS_LBLK0 (0x01 << 0x01) + +//FIMD register offsets +#define VIDCON0_OFFSET (0x00) +#define VIDCON1_OFFSET (0x0004) /* Video control 1 */ +#define VIDCON2_OFFSET (0x0008) /* Video control 2 */ +#define VIDTCON0_OFFSET (0x0010) /* Video time control 0 */ +#define VIDTCON1_OFFSET (0x0014) /* Video time control 1 */ +#define VIDTCON2_OFFSET (0x0018) /* Video time control 2 */ +#define WINSHMAP_OFFSET (0x0034) /* Window Shadow control */ +#define WINCON_OFFSET(x) (0x0020 + (x * 0x04)) +#define VIDOSD_A_OFFSET(x) (0x0040 + (x * 0x10)) +#define VIDOSD_B_OFFSET(x) (0x0044 + (x * 0x10)) +#define VIDOSD_C_OFFSET(x) (0x0048 + (x * 0x10)) +#define VIDADDR_START0_OFFSET(x)(0x00A0 + (x * 0x08)) +#define VIDADDR_END0_OFFSET(x) (0x00D0 + (x * 0x08)) +#define VIDADDR_SIZE_OFFSET(x) (0x0100 + (x * 0x04)) +/******************************************* +// Interrupt Map +*******************************************/ + +// Timer Interrupts +#define TIMER01_INTERRUPT_NUM 34 +#define TIMER23_INTERRUPT_NUM 35 + +#define Exynos4210_INT_NUM(x) ((x) + 32) + +#define PWM_TIMER0_INTERRUPT_NUM Exynos4210_INT_NUM(37) +#define PWM_TIMER1_INTERRUPT_NUM Exynos4210_INT_NUM(38) +#define PWM_TIMER2_INTERRUPT_NUM Exynos4210_INT_NUM(39) +#define PWM_TIMER3_INTERRUPT_NUM Exynos4210_INT_NUM(40) +#define PWM_TIMER4_INTERRUPT_NUM Exynos4210_INT_NUM(41) + +/******************************************* +// EFI Memory Map in Permanent Memory (DRAM) +*******************************************/ + +// This region is allocated at the bottom of the DRAM. It will be used +// for fixed address allocations such as Vector Table +#define ARM_EB_EFI_FIX_ADDRESS_REGION_SZ SIZE_8MB + +// This region is the memory declared to PEI as permanent memory for PEI +// and DXE. EFI stacks and heaps will be declared in this region. +#define ARM_EB_EFI_MEMORY_REGION_SZ 0x1000000 + +//gpio definitions as required by the Embedded gpio module +#define DISTANCE_BTWN_PORTS (0x20) + +#define GPIO_CON (0x00) +#define GPIO_DATAIN (0x04) +#define GPIO_PUD (0x08) +#define GPIO_DRV (0x0C) + +#define GPIO_DATAIN_MASK(x) (1UL << (x)) +#define GPIO_PUD_MASK(x) (3UL << (x*2)) +#define GPIO_DRV_MASK(x) (3UL << (x*2)) +#define GPIO_SFN_MASK(x) (15UL <<(x*4)) + +#define GPIO_SFN_EN(x) (2UL << (x*4)) +#define GPIO_OP_EN(x) (1UL << (x*4)) + +#define GPIO_PUD_DIS(x) (0UL << (x*2)) +#define GPIO_PDN_EN(x) (1UL << (x*2)) +#define GPIO_PUP_EN(x) (3UL << (x*2)) +#define GPIO_DATA_HIGH(x) (1UL << (x)) +#define GPIO_DATA_LOW(x) (0UL << (x)) + +#define GPIO_DRV_SET(strength,pin) (strength << (pin*2)) + +#define PIN0 (0x00) +#define PIN1 (0x01) +#define PIN2 (0x02) +#define PIN3 (0x03) +#define PIN4 (0x04) +#define PIN5 (0x05) +#define PIN6 (0x06) +#define PIN7 (0x07) + +#define GPA0 (0x00) +#define GPA1 (0x01) +#define GPB (0x02) +#define GPC0 (0x03) +#define GPC1 (0x04) +#define GPD0 (0x05) +#define GPD1 (0x06) +#define GPE0 (0x07) +#define GPE1 (0x08) +#define GPE2 (0x09) +#define GPE3 (0x0A) +#define GPE4 (0x0B) +#define GPF0 (0x0C) +#define GPF1 (0x0D) +#define GPF2 (0x0E) +#define GPF3 (0x0F) +#define GPJ0 (0x10) +#define GPJ1 (0x11) +#define GPK0 (0x12) +#define GPK1 (0x13) +#define GPK2 (0x14) +#define GPK3 (0x15) +#define GPL0 (0x16) +#define GPL1 (0x17) +#define GPL2 (0x18) +#define GPX0 (0x19) +#define GPX1 (0x1A) +#define GPX2 (0x1B) +#define GPX3 (0x1C) +#define GPY (0x1D) +#define GPZ (0x1E) + +/* LCD GPIO Pin Configurations*/ +#define LCD_HSYNC GPIO(GPF0,PIN0) +#define LCD_VSYNC GPIO(GPF0,PIN1) +#define LCD_VDEN GPIO(GPF0,PIN2) +#define LCD_VCLK GPIO(GPF0,PIN3) +#define LCD_VD_0 GPIO(GPF0,PIN4) +#define LCD_VD_1 GPIO(GPF0,PIN5) +#define LCD_VD_2 GPIO(GPF0,PIN6) +#define LCD_VD_3 GPIO(GPF0,PIN7) + +#define LCD_VD_4 GPIO(GPF1,PIN0) +#define LCD_VD_5 GPIO(GPF1,PIN1) +#define LCD_VD_6 GPIO(GPF1,PIN2) +#define LCD_VD_7 GPIO(GPF1,PIN3) +#define LCD_VD_8 GPIO(GPF1,PIN4) +#define LCD_VD_9 GPIO(GPF1,PIN5) +#define LCD_VD_10 GPIO(GPF1,PIN6) +#define LCD_VD_11 GPIO(GPF1,PIN7) + +#define LCD_VD_12 GPIO(GPF2,PIN0) +#define LCD_VD_13 GPIO(GPF2,PIN1) +#define LCD_VD_14 GPIO(GPF2,PIN2) +#define LCD_VD_15 GPIO(GPF2,PIN3) +#define LCD_VD_16 GPIO(GPF2,PIN4) +#define LCD_VD_17 GPIO(GPF2,PIN5) +#define LCD_VD_18 GPIO(GPF2,PIN6) +#define LCD_VD_19 GPIO(GPF2,PIN7) + +#define LCD_VD_20 GPIO(GPF3,PIN0) +#define LCD_VD_21 GPIO(GPF3,PIN1) +#define LCD_VD_22 GPIO(GPF3,PIN2) +#define LCD_VD_23 GPIO(GPF3,PIN3) +#define VSYNC_LDI GPIO(GPF3,PIN4) +#define SYS_OE GPIO(GPF3,PIN5) + +#define LCD_BACKLIGHT GPIO(GPD0,PIN1) + +/* SDHC GPIO Pin Configuration*/ +#define SD_2_CLK GPIO(GPK2,PIN0) +#define SD_2_CMD GPIO(GPK2,PIN1) +#define SD_2_CDn GPIO(GPK2,PIN2) +#define SD_2_DATA0 GPIO(GPK2,PIN3) +#define SD_2_DATA1 GPIO(GPK2,PIN4) +#define SD_2_DATA2 GPIO(GPK2,PIN5) +#define SD_2_DATA3 GPIO(GPK2,PIN6) + +#endif diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Include/Protocol/ExynosGpio.h b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Protocol/ExynosGpio.h new file mode 100644 index 000000000..35fe93bf6 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Include/Protocol/ExynosGpio.h @@ -0,0 +1,199 @@ +/** @file + + Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __EXYNOS_GPIO_H__ +#define __EXYNOS_GPIO_H__ + +// +// Protocol interface structure +// +typedef struct _EXYNOS_GPIO EXYNOS_GPIO; + +// +// Data Types +// +typedef UINTN EXYNOS_GPIO_PIN; + +#define GPIO(Port, Pin) ((EXYNOS_GPIO_PIN)(((Port) << (16)) | (Pin))) +#define GPIO_PIN(x) ((EXYNOS_GPIO_PIN)(x) & (0xFFFF)) +#define GPIO_PORT(x) ((EXYNOS_GPIO_PIN)(x) >> (16)) + +typedef enum { + GPIO_MODE_INPUT = 0x00, + GPIO_MODE_OUTPUT_0 = 0x0E, + GPIO_MODE_OUTPUT_1 = 0x0F, + GPIO_MODE_SPECIAL_FUNCTION_2 = 0x02, + GPIO_MODE_SPECIAL_FUNCTION_3 = 0x03, + GPIO_MODE_SPECIAL_FUNCTION_4 = 0x04, + GPIO_MODE_SPECIAL_FUNCTION_5 = 0x05, + GPIO_MODE_SPECIAL_FUNCTION_6 = 0x06, + GPIO_MODE_SPECIAL_FUNCTION_7 = 0x07 +} EXYNOS_GPIO_MODE; + +typedef enum { + GPIO_PULL_NONE, + GPIO_PULL_UP, + GPIO_PULL_DOWN +} EXYNOS_GPIO_PULL; + +typedef enum { + GPIO_DRV_1X, + GPIO_DRV_2X, + GPIO_DRV_3X, + GPIO_DRV_4X +} EXYNOS_GPIO_STRN; + +// +// Function Prototypes +// +typedef +EFI_STATUS +(EFIAPI *EXYNOS_GPIO_GET) ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + OUT UINTN *Value + ); +/*++ + +Routine Description: + + Gets the state of a GPIO pin + +Arguments: + + This - pointer to protocol + Gpio - which pin to read + Value - state of the pin + +Returns: + + EFI_SUCCESS - GPIO state returned in Value + +--*/ + + +typedef +EFI_STATUS +(EFIAPI *EXYNOS_GPIO_SET) ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + IN EXYNOS_GPIO_MODE Mode + ); +/*++ + +Routine Description: + + Sets the state of a GPIO pin + +Arguments: + + This - pointer to protocol + Gpio - which pin to modify + Mode - mode to set + +Returns: + + EFI_SUCCESS - GPIO set as requested + +--*/ + + +typedef +EFI_STATUS +(EFIAPI *EXYNOS_GPIO_GET_MODE) ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + OUT EXYNOS_GPIO_MODE *Mode + ); +/*++ + +Routine Description: + + Gets the mode (function) of a GPIO pin + +Arguments: + + This - pointer to protocol + Gpio - which pin + Mode - pointer to output mode value + +Returns: + + EFI_SUCCESS - mode value retrieved + +--*/ + + +typedef +EFI_STATUS +(EFIAPI *EXYNOS_GPIO_SET_PULL) ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + IN EXYNOS_GPIO_PULL Direction + ); +/*++ + +Routine Description: + + Sets the pull-up / pull-down resistor of a GPIO pin + +Arguments: + + This - pointer to protocol + Gpio - which pin + Direction - pull-up, pull-down, or none + +Returns: + + EFI_SUCCESS - pin was set + +--*/ + +typedef EFI_STATUS +(EFIAPI *EXYNOS_GPIO_DRV) ( + IN EXYNOS_GPIO *This, + IN EXYNOS_GPIO_PIN Gpio, + IN EXYNOS_GPIO_STRN Strength + ); +/*++ + +Routine Description: + + Sets the Driving strength resistor of a GPIO pin + +Arguments: + + This - pointer to protocol + Gpio - which pin + Strength - 0=1x,1=2x,2=3x,3=4x + +Returns: + + EFI_SUCCESS - pin was set + +--*/ + + + +struct _EXYNOS_GPIO { + EXYNOS_GPIO_GET Get; + EXYNOS_GPIO_SET Set; + EXYNOS_GPIO_GET_MODE GetMode; + EXYNOS_GPIO_SET_PULL SetPull; + EXYNOS_GPIO_DRV SetStrength; +}; + +extern EFI_GUID gSamsungPlatformGpioProtocolGuid; + +#endif diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.c b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.c new file mode 100644 index 000000000..a1e1799f0 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.c @@ -0,0 +1,36 @@ +/** @file + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include + +UINT32 +GpioBase ( + IN UINTN Port + ) +{ + + ASSERT( (Port >= GPA0) && (Port <= GPZ)); + + /*decide which part of gpio is being requested. give the corresponding base address*/ + if(Port & 0x10) { + return (PcdGet32(PcdGpioPart2Base) + (Port*DISTANCE_BTWN_PORTS)); + }else { + return (PcdGet32(PcdGpioPart1Base) + (Port*DISTANCE_BTWN_PORTS)); + } + + ASSERT(FALSE); return 0; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.inf b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.inf new file mode 100644 index 000000000..cafbdec32 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ExynosLib/ExynosLib.inf @@ -0,0 +1,40 @@ +#/** @file +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ExynosLib + FILE_GUID = d035f5c2-1b92-4746-9f6c-5ff6202970df + MODULE_TYPE = UEFI_DRIVER + VERSION_STRING = 1.0 + LIBRARY_CLASS = ExynosLib + +[Sources.common] + ExynosLib.c + +[Packages] + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + +[LibraryClasses] + DebugLib + IoLib + +[Protocols] + +[Guids] + +[Pcd] + gExynosPkgTokenSpaceGuid.PcdGpioPart1Base + gExynosPkgTokenSpaceGuid.PcdGpioPart2Base diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c b/SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c new file mode 100644 index 000000000..353cad11e --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.c @@ -0,0 +1,118 @@ +/** @file + Basic serial IO abstaction for GDB + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include + +RETURN_STATUS +EFIAPI +GdbSerialLibConstructor ( + VOID + ) +{ + return GdbSerialInit (115200, 0, 8, 1); +} + +RETURN_STATUS +EFIAPI +GdbSerialInit ( + IN UINT64 BaudRate, + IN UINT8 Parity, + IN UINT8 DataBits, + IN UINT8 StopBits + ) +{ + if ((Parity != 0) || (DataBits != 8) || (StopBits != 1)) { + return RETURN_UNSUPPORTED; + } + + if (BaudRate != 115200) { + // Could add support for different Baud rates.... + return RETURN_UNSUPPORTED; + } + + UINT32 Base = PcdGet32 (PcdGdbUartBase); + + // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ + MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV); + MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV); + + // no parity, 1 stop, no fifo, 8 data bits + MmioWrite32 (Base + UARTLCR_H, 0x60); + + // clear any pending errors + MmioWrite32 (Base + UARTECR, 0); + + // enable tx, rx, and uart overall + MmioWrite32 (Base + UARTCR, 0x301); + + return RETURN_SUCCESS; +} + +BOOLEAN +EFIAPI +GdbIsCharAvailable ( + VOID + ) +{ + UINT32 FR = PcdGet32 (PcdGdbUartBase) + UTRSTAT_OFFSET; + + if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) { + return TRUE; + } else { + return FALSE; + } +} + +CHAR8 +EFIAPI +GdbGetChar ( + VOID + ) +{ + UINT32 FR = PcdGet32 (PcdGdbUartBase) + UTRSTAT_OFFSET; + UINT32 DR = PcdGet32 (PcdGdbUartBase) + URXH_OFFSET; + + while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0); + return MmioRead8 (DR); +} + +VOID +EFIAPI +GdbPutChar ( + IN CHAR8 Char + ) +{ + UINT32 FR = PcdGet32 (PcdGdbUartBase) + UTRSTAT_OFFSET; + UINT32 DR = PcdGet32 (PcdGdbUartBase) + UTXH_OFFSET; + + while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0); + MmioWrite8 (DR, Char); + return; +} + +VOID +GdbPutString ( + IN CHAR8 *String + ) +{ + while (*String != '\0') { + GdbPutChar (*String); + String++; + } +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf b/SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf new file mode 100644 index 000000000..42adbb0f1 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf @@ -0,0 +1,40 @@ +#/** @file +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = GdbSerialLib + FILE_GUID = E8EA1309-2F14-428f-ABE3-7016CE4B4305 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = GdbSerialLib + + CONSTRUCTOR = GdbSerialLibConstructor + + +[Sources.common] + GdbSerialLib.c + + +[Packages] + MdePkg/MdePkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + + +[LibraryClasses] + DebugLib + IoLib + +[FixedPcd] + gExynosPkgTokenSpaceGuid.PcdGdbUartBase diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c new file mode 100644 index 000000000..daaa1299c --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -0,0 +1,167 @@ +/** @file + Template library implementation to support ResetSystem Runtime call. + + Fill in the templates with what ever makes you system reset. + + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +VOID DestroyExynosMemMap(VOID); +typedef VOID (EFIAPI *CALL_STUB)(VOID); + +VOID +DestroyExynosMemMap ( + VOID + ) +{ + EFI_STATUS Status; + UINTN MemoryMapSize; + EFI_MEMORY_DESCRIPTOR *MemoryMap; + UINTN MapKey; + UINTN DescriptorSize; + UINTN DescriptorVersion; + UINTN Pages; + + MemoryMap = NULL; + MemoryMapSize = 0; + do { + Status = gBS->GetMemoryMap ( + &MemoryMapSize, + MemoryMap, + &MapKey, + &DescriptorSize, + &DescriptorVersion + ); + if (Status == EFI_BUFFER_TOO_SMALL) { + + Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1; + MemoryMap = AllocatePages (Pages); + + // + // Get System MemoryMap + // + Status = gBS->GetMemoryMap ( + &MemoryMapSize, + MemoryMap, + &MapKey, + &DescriptorSize, + &DescriptorVersion + ); + // Don't do anything between the GetMemoryMap() and ExitBootServices() + if (!EFI_ERROR (Status)) { + Status = gBS->ExitBootServices (gImageHandle, MapKey); + if (EFI_ERROR (Status)) { + FreePages (MemoryMap, Pages); + MemoryMap = NULL; + MemoryMapSize = 0; + } + } + } + } while (EFI_ERROR (Status)); + + //Clean and invalidate caches. + WriteBackInvalidateDataCache(); + InvalidateInstructionCache(); + + //Turning off Caches and MMU + ArmDisableDataCache (); + ArmDisableInstructionCache (); + ArmDisableMmu (); +} + + + +/** + Resets the entire platform. + + @param ResetType The type of reset to perform. + @param ResetStatus The status code for the reset. + @param DataSize The size, in bytes, of WatchdogData. + @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or + EfiResetShutdown the data buffer starts with a Null-terminated + Unicode string, optionally followed by additional binary data. + +**/ +EFI_STATUS +EFIAPI +LibResetSystem ( + IN EFI_RESET_TYPE ResetType, + IN EFI_STATUS ResetStatus, + IN UINTN DataSize, + IN CHAR16 *ResetData OPTIONAL + ) +{ + CALL_STUB StartOfFv; + UINTN PmuBase; + if (ResetData != NULL) { + DEBUG ((EFI_D_ERROR, "%s", ResetData)); + } + + DestroyExynosMemMap(); + + switch (ResetType) { + case EfiResetWarm: + //Perform warm reset of the system by jumping to the begining of the FV +// ((ptrImageStart)PcdGet32(PcdFvBaseAddress))(); + StartOfFv = (CALL_STUB)(UINTN)PcdGet32(PcdFvBaseAddress); + StartOfFv (); + break; + case EfiResetCold: + case EfiResetShutdown: + default: + //Perform cold reset of the system. + PmuBase = (UINTN)PcdGet32(PcdPmuBase); + MmioWrite32 ((PmuBase + SWRESET_OFFSET), 0x01); + while ((MmioRead32(PmuBase + SWRESET_OFFSET)) != 0x1); + break; + } + + // If the reset didn't work, return an error. + ASSERT (FALSE); + return EFI_DEVICE_ERROR; +} + + + +/** + Initialize any infrastructure required for LibResetSystem () to function. + + @param ImageHandle The firmware allocated handle for the EFI image. + @param SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +LibInitializeResetSystem ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + return EFI_SUCCESS; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf new file mode 100644 index 000000000..989eddeb7 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -0,0 +1,44 @@ +#/** @file +# Reset System lib to make it easy to port new platforms +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmEbResetSystemLib + FILE_GUID = CEFFA65C-B568-453e-9E11-B81AE683D035 + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = EfiResetSystemLib + + +[Sources.common] + ResetSystemLib.c + +[Packages] + MdePkg/MdePkg.dec + ArmPkg/ArmPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec +[LibraryClasses] + ArmLib + IoLib + BaseLib + DebugLib + MemoryAllocationLib + CacheMaintenanceLib +[FixedPcd] + gArmTokenSpaceGuid.PcdFvBaseAddress +[Pcd] + gExynosPkgTokenSpaceGuid.PcdPmuBase diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.c b/SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.c new file mode 100644 index 000000000..328956fb0 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.c @@ -0,0 +1,204 @@ +/** @file + Serial I/O Port library functions with no library constructor/destructor + + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include +#include +#include + +/* + + Programmed hardware of Serial port. + Irrespective of the previous settings Initialize it to current requirement +**/ +RETURN_STATUS +EFIAPI +SerialPortInitialize ( + VOID + ) +{ +#if 0 + UINT32 UARTConsoleBase; + UINT32 SmdkCmuBase; + + UARTConsoleBase=PcdGet32(PcdConsoleUartBase); + SmdkCmuBase=PcdGet32(PcdCmuBase); + + MmioWrite32 (SmdkCmuBase + CLK_SRC_PERIL0_OFFSET, CLK_SRC_PERIL0_VAL); + MmioWrite32 (SmdkCmuBase + CLK_DIV_PERIL0_OFFSET, CLK_DIV_PERIL0_VAL); + + if (PL011_CONSOLE_UART_SPEED == 115200) { + // Initialize baud rate generator + MmioWrite32 (UARTConsoleBase + UARTIBRD, UART_115200_IDIV); + MmioWrite32 (UARTConsoleBase + UARTFBRD, UART_115200_FDIV); + } else if (PL011_CONSOLE_UART_SPEED == 38400) { + // Initialize baud rate generator + MmioWrite32 (UARTConsoleBase + UARTIBRD, UART_38400_IDIV); + MmioWrite32 (UARTConsoleBase + UARTFBRD, UART_38400_FDIV); + } else if (PL011_CONSOLE_UART_SPEED == 19200) { + // Initialize baud rate generator + MmioWrite32 (UARTConsoleBase + UARTIBRD, UART_19200_IDIV); + MmioWrite32 (UARTConsoleBase + UARTFBRD, UART_19200_FDIV); + } else { + return EFI_INVALID_PARAMETER; + } + + // No parity, 1 stop, no fifo, 8 data bits + MmioWrite32 (UARTConsoleBase + UARTLCR_H, UART_LCON_VAL); + + // configure FIFO contrl regs + MmioWrite32 (UARTConsoleBase + UARTECR, UART_ECR_VAL); + + // enable tx, rx, and uart overall + MmioWrite32 (UARTConsoleBase + UARTCR, UART_CR_VAL); +#endif + return EFI_SUCCESS; +} + +/** + Write data to serial device. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buffer. + + @retval 0 Write data failed. + @retval !0 Actual number of bytes writed to serial device. + +**/ +UINTN +EFIAPI +SerialPortWrite ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + UINTN Count; + UINT32 UARTConsoleBase; + + UARTConsoleBase=PcdGet32(PcdConsoleUartBase); + for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) { + while ((MmioRead32 (UARTConsoleBase + UTRSTAT_OFFSET) & UART_TX_EMPTY_FLAG_MASK) == 0); + MmioWrite8 (UARTConsoleBase + UTXH_OFFSET, *Buffer); + } + + return NumberOfBytes; +} + +/** + Read data from serial device and save the datas in buffer. + + @param Buffer Point of data buffer which need to be writed. + @param NumberOfBytes Number of output bytes which are cached in Buffer. + + @retval 0 Read data failed. + @retval !0 Aactual number of bytes read from serial device. + +**/ +UINTN +EFIAPI +SerialPortRead ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes +) +{ + UINTN Count; + UINT32 UARTConsoleBase; + + UARTConsoleBase=PcdGet32(PcdConsoleUartBase); + for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) { + while ((MmioRead32 (UARTConsoleBase + UTRSTAT_OFFSET) & UART_RX_EMPTY_FLAG_MASK) == 0); + *Buffer = MmioRead8 (UARTConsoleBase + URXH_OFFSET); + } + + return NumberOfBytes; +} + +/** + Check to see if any data is avaiable to be read from the debug device. + + @retval EFI_SUCCESS At least one byte of data is avaiable to be read + @retval EFI_NOT_READY No data is avaiable to be read + @retval EFI_DEVICE_ERROR The serial device is not functioning properly + +**/ +BOOLEAN +EFIAPI +SerialPortPoll ( + VOID + ) +{ + UINT32 UARTConsoleBase; + UARTConsoleBase=PcdGet32(PcdConsoleUartBase); + + return ((MmioRead32 (UARTConsoleBase + UTRSTAT_OFFSET) & UART_RX_EMPTY_FLAG_MASK) != 0); +} + +/** + Set the serial device control bits. + + @return Always return EFI_UNSUPPORTED. + +**/ +RETURN_STATUS +EFIAPI +SerialPortSetControl ( + IN UINT32 Control + ) +{ + return RETURN_SUCCESS; +} + +/** + Get the serial device control bits. + + @param Control Control signals read from the serial device. + + @retval EFI_SUCCESS The control bits were read from the serial device. + @retval EFI_DEVICE_ERROR The serial device is not functioning correctly. + +**/ +RETURN_STATUS +EFIAPI +SerialPortGetControl ( + OUT UINT32 *Control + ) +{ + return RETURN_SUCCESS; +} + + +/** + Set the serial device attributes. + + @return Always return EFI_UNSUPPORTED. + +**/ +RETURN_STATUS +EFIAPI +SerialPortSetAttributes ( + IN UINT64 BaudRate, + IN UINT32 ReceiveFifoDepth, + IN UINT32 Timeout, + IN EFI_PARITY_TYPE Parity, + IN UINT8 DataBits, + IN EFI_STOP_BITS_TYPE StopBits + ) +{ + return RETURN_SUCCESS; +} + diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf b/SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf new file mode 100644 index 000000000..2b3141245 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf @@ -0,0 +1,38 @@ +#/** @file +# +# Component discription file for NorFlashDxe module +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SerialPortLib + FILE_GUID = 8ecefc8f-a2c4-4091-b80f-20f7aeb0567f + MODULE_TYPE = PEIM + VERSION_STRING = 1.0 + LIBRARY_CLASS = SerialPortLib + +[Sources.common] + SerialPortLib.c + +[LibraryClasses] + IoLib + +[Packages] + EmbeddedPkg/EmbeddedPkg.dec + MdePkg/MdePkg.dec + # ArmPlatformPkg/ArmPlatformPkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + +[FixedPcd] + gExynosPkgTokenSpaceGuid.PcdConsoleUartBase + gExynosPkgTokenSpaceGuid.PcdCmuBase diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.c b/SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.c new file mode 100755 index 000000000..6baf2cec6 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.c @@ -0,0 +1,234 @@ +/** @file + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +#include +#include +#include +#include +#include +#include +#include + + +// Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter +// Note: ArmVE's Timer0 and Timer1 are used by TimerDxe. +RETURN_STATUS +EFIAPI +TimerConstructor ( + VOID + ) +{ + UINT32 PWMTimerBase; + UINT32 rwVal; + + PWMTimerBase = PcdGet32(PcdPWMTimerBase); + +/** + This function is for initializing for PWM Timer + Timer 2 = > Delay Counter + Timer 3 = > Performance Counter +**/ +// PWM Input Clock(ACLK_100) is 100 Mhz so We need to prescale about 1Mhz to make udelay function + rwVal = MmioRead32 (PWMTimerBase + PWM_TCFG0_OFFSET); + rwVal &= ~(0xFF << PRESCALE_GRP1_START_POS); + rwVal |= (PRESCALE_TIMER_GRP1 << PRESCALE_GRP1_START_POS); + MmioWrite32 ((PWMTimerBase + PWM_TCFG0_OFFSET), rwVal); + MmioWrite32 ((PWMTimerBase + PWM_TCFG1_OFFSET), 0x0); + +// PWM Timer INT disable + rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET), rwVal & ~(TIMER_INTR_MASK(TIMER_2) | TIMER_INTR_MASK(TIMER_3))); + +// PWM Timer 2,3 make to stop + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & (STOP_TIMER_VAL(TIMER_2) | STOP_TIMER_VAL(TIMER_3))); + +// PWM Timer 3 used by Free running counter with Auto re-load mode + MmioWrite32 ((PWMTimerBase + PWM_TCNTB3_OFFSET), MAX_COUNT_VAL); +// Set and Clear PWM Manually update for Timer 3 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_3)); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_3)); +// Set Auto re-load and start Timer + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | RELOAD_AND_START(TIMER_3)); + + DEBUG ((EFI_D_ERROR, "Timer 2,3 Enabled\n")); + + return RETURN_SUCCESS; +} + +/** + Stalls the CPU for at least the given number of microseconds. + + Stalls the CPU for the number of microseconds specified by MicroSeconds. + + @param MicroSeconds The minimum number of microseconds to delay. + + @return The value of MicroSeconds inputted. + +**/ +UINTN +EFIAPI +MicroSecondDelay ( + IN UINTN MicroSeconds + ) +{ + UINT32 rwVal; + UINT32 PWMTimerBase; + + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + // load the timer count register + MmioWrite32 ((PWMTimerBase + PWM_TCNTB2_OFFSET), MicroSeconds); + + +// PWM Timer 2 stop + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & STOP_TIMER_VAL(TIMER_2)); + +// Set and Clear PWM Manually update for Timer 2 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_2)); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_2)); + //Start Timer 2 + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | START_TIMER(TIMER_2)); + //Wait for requested delay time + while (MmioRead32 (PWMTimerBase + PWM_TCNTO2_OFFSET) > 0) { + ; + } + + return MicroSeconds; +} + +/** + Stalls the CPU for at least the given number of nanoseconds. + + Stalls the CPU for the number of nanoseconds specified by NanoSeconds. + + @param NanoSeconds The minimum number of nanoseconds to delay. + + @return The value of NanoSeconds inputted. + +**/ +UINTN +EFIAPI +NanoSecondDelay ( + IN UINTN NanoSeconds + ) +{ + UINT32 MicroSeconds; + UINT32 rwVal; + UINT32 PWMTimerBase; + + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + + // Round up to 1us Tick Number + MicroSeconds = (UINT32)NanoSeconds / 1000; + MicroSeconds += ((UINT32)NanoSeconds % 1000) == 0 ? 0 : 1; + // load the timer count register + MmioWrite32 ((PWMTimerBase + PWM_TCNTB2_OFFSET), MicroSeconds); + +// PWM Timer 2 stop + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & STOP_TIMER_VAL(TIMER_2)); +// Set and Clear PWM Manually update for Timer 2 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_2)); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_2)); + //Start Timer 2 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | START_TIMER(TIMER_2)); + + //Wait for requested delay time + while (MmioRead32 (PWMTimerBase + PWM_TCNTO0_OFFSET) > 0) { + ; + } + + return NanoSeconds; +} + +/** + Retrieves the current value of a 64-bit free running performance counter. + + The counter can either count up by 1 or count down by 1. If the physical + performance counter counts by a larger increment, then the counter values + must be translated. The properties of the counter can be retrieved from + GetPerformanceCounterProperties(). + + @return The current value of the free running performance counter. + +**/ +UINT64 +EFIAPI +GetPerformanceCounter ( + VOID + ) +{ + UINT32 PWMTimerBase; + + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + // Free running 64-bit/32-bit counter is needed here. + // Don't think we need this to boot, just to do performance profile + // ASSERT (FALSE); + UINT32 val = MmioRead32 (PWMTimerBase + PWM_TCNTO3_OFFSET); + + ASSERT(val > 0); + + return (UINT64)val; +} + + +/** + Retrieves the 64-bit frequency in Hz and the range of performance counter + values. + + If StartValue is not NULL, then the value that the performance counter starts + with immediately after is it rolls over is returned in StartValue. If + EndValue is not NULL, then the value that the performance counter end with + immediately before it rolls over is returned in EndValue. The 64-bit + frequency of the performance counter in Hz is always returned. If StartValue + is less than EndValue, then the performance counter counts up. If StartValue + is greater than EndValue, then the performance counter counts down. For + example, a 64-bit free running counter that counts up would have a StartValue + of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter + that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0. + + @param StartValue The value the performance counter starts with when it + rolls over. + @param EndValue The value that the performance counter ends with before + it rolls over. + + @return The frequency in Hz. + +**/ +UINT64 +EFIAPI +GetPerformanceCounterProperties ( + OUT UINT64 *StartValue, OPTIONAL + OUT UINT64 *EndValue OPTIONAL + ) +{ + if (StartValue != NULL) { + // Timer starts with the reload value + *StartValue = (UINT64)0ULL; + } + + if (EndValue != NULL) { + // Timer counts up to 0xFFFFFFFF + *EndValue = 0xFFFFFFFF; + } + + return 1000000; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.inf b/SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.inf new file mode 100755 index 000000000..5eb403402 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/Library/TimerLib/TimerLib.inf @@ -0,0 +1,41 @@ +#/** @file +# Timer library implementation +# +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = Exynos4210TimerLib + FILE_GUID = 34cfa85e-a798-4e46-8d38-1843d7a0caea + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = TimerLib + + CONSTRUCTOR = TimerConstructor + +[Sources.common] + TimerLib.c + +[Packages] + MdePkg/MdePkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + +[LibraryClasses] + DebugLib + IoLib + BaseLib + +[Pcd.common] + gExynosPkgTokenSpaceGuid.PcdPWMTimerBase diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.c b/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.c new file mode 100755 index 000000000..064a1d158 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.c @@ -0,0 +1,1327 @@ +/** @file + MMC/SD Card driver for Secure Digital Host Controller + + This driver always produces a BlockIo protocol but it starts off with no Media + present. A TimerCallBack detects when media is inserted or removed and after + a media change event a call to BlockIo ReadBlocks/WriteBlocks will cause the + media to be detected (or removed) and the BlockIo Media structure will get + updated. No MMC/SD Card harward registers are updated until the first BlockIo + ReadBlocks/WriteBlocks after media has been insterted (booting with a card + plugged in counts as an insertion event). + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include +#include +#include + +#include "SDHCDxe.h" + + +EFI_BLOCK_IO_MEDIA gSDHCMedia = { + SIGNATURE_32('s','d','h','c'), // MediaId + TRUE, // RemovableMedia + FALSE, // MediaPresent + FALSE, // LogicalPartition + FALSE, // ReadOnly + FALSE, // WriteCaching + 512, // BlockSize + 4, // IoAlign + 0, // Pad + 0 // LastBlock +}; + +typedef struct { + VENDOR_DEVICE_PATH Mmc; + EFI_DEVICE_PATH End; +} SDHC_DEVICE_PATH; + +SDHC_DEVICE_PATH gSDHCDevicePath = { + { + HARDWARE_DEVICE_PATH, + HW_VENDOR_DP, + (UINT8)(sizeof(VENDOR_DEVICE_PATH)), + (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8), + 0xb615f1f5, 0x5088, 0x43cd, 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + sizeof (EFI_DEVICE_PATH_PROTOCOL), + 0 + } +}; + +CARD_INFO gCardInfo; +EFI_EVENT gTimerEvent; +BOOLEAN gMediaChange = FALSE; + +// +// Internal Functions +// + + +VOID +ParseCardCIDData ( + UINT32 Response0, + UINT32 Response1, + UINT32 Response2, + UINT32 Response3 + ) +{ + gCardInfo.CIDData.MDT = ((Response0 >> 8) & 0xFFF); + gCardInfo.CIDData.PSN = (((Response0 >> 24) & 0xFF) | ((Response1 & 0xFFFFFF) << 8)); + gCardInfo.CIDData.PRV = ((Response1 >> 24) & 0xFF); + gCardInfo.CIDData.PNM[4] = ((Response2) & 0xFF); + gCardInfo.CIDData.PNM[3] = ((Response2 >> 8) & 0xFF); + gCardInfo.CIDData.PNM[2] = ((Response2 >> 16) & 0xFF); + gCardInfo.CIDData.PNM[1] = ((Response2 >> 24) & 0xFF); + gCardInfo.CIDData.PNM[0] = ((Response3) & 0xFF); + gCardInfo.CIDData.OID = ((Response3 >> 8) & 0xFFFF); + gCardInfo.CIDData.MID = ((Response3 >> 24) & 0xFF); +} + + +VOID +UpdateSDHCClkFrequency ( + UINTN NewCLK + ) +{ + UINT32 CumBaseAddr; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + // Disable all clocks to not provide the clock to the card + MmioAnd32 ((SdMmcBaseAddr + CLKCON_OFFSET), ~(0xF)); + + CumBaseAddr = PcdGet32(PcdCmuBase); + //Set new clock frequency. + if (NewCLK == 400) + MmioAndThenOr32 ((CumBaseAddr + CLK_DIV_FSYS2_OFFSET), ~(0xFFFF), 0xE008); + else if (NewCLK == 25000) + MmioAndThenOr32 ((CumBaseAddr + CLK_DIV_FSYS2_OFFSET), ~(0xFFFF), 0x0307); + + MmioOr32 ((SdMmcBaseAddr + CLKCON_OFFSET), ICE); + + //Poll till Internal Clock Stable + while ((MmioRead32 ((SdMmcBaseAddr + CLKCON_OFFSET)) & ICS) != ICS); + + //Set Clock enable to 0x1 to provide the clock to the card + MmioOr32 ((SdMmcBaseAddr + CLKCON_OFFSET), CCE); +} + +VOID +PrepareTransfer ( + UINTN Direction, UINTN BlockCount + ) +{ + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + //Set Block Size and Block count. + MmioWrite32 ((SdMmcBaseAddr + BLKSIZE_OFFSET), BLEN_512BYTES | (BlockCount << 16)); + + //Setting Data timeout counter value to max value. + MmioAndThenOr32 ((SdMmcBaseAddr + TIMEOUTCON_OFFSET), ~(0xFF << 16), 0xE << 16); +} + +EFI_STATUS +SendCmd ( + UINTN Cmd, + UINTN CmdInterruptEnableVal, + UINTN CmdArgument + ) +{ + UINTN MmcStatus; + UINTN RetryCount = 0; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + //Check if command line is in use or not. Poll till command line is available. + while (MmioRead32 ((SdMmcBaseAddr + PRNSTS_OFFSET)) & (CMDINHCMD | CMDINHDAT)); + //Clear Status register. + MmioWrite32 ((SdMmcBaseAddr + INTSTS_OFFSET), 0xFFFFFFFF); + + //Set command argument register + MmioWrite32 ((SdMmcBaseAddr + ARGUMENT_OFFSET), CmdArgument); + + //Enable interrupt enable events to occur + MmioWrite32 ((SdMmcBaseAddr + INTEN_OFFSET), CmdInterruptEnableVal); + + DEBUG ((EFI_D_INFO, "SDHC::SendCmd : CMD = %d\n", (Cmd >> 24) & 0x3F)); + + MmioAndThenOr32 ((SdMmcBaseAddr + TIMEOUTCON_OFFSET), ~(0xFF << 16), 0xE << 16); + MicroSecondDelay(1); + //Send a command + MmioWrite32 ((SdMmcBaseAddr + CMDREG_OFFSET), Cmd); + MicroSecondDelay(1); + + //Check for the command status. + while (RetryCount < MAX_RETRY_COUNT) { + do { + MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); + } while (MmcStatus == 0); + + //Read status of command response + if ((MmcStatus & ERRINT) != 0) { + + //Perform soft-reset for cmd line. + MmioOr32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRC); + while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRC)); + + DEBUG ((EFI_D_INFO, "MmcStatus: %x\n", MmcStatus)); + return EFI_DEVICE_ERROR; + } + + //Check if command is completed. + if ((MmcStatus & CMDCOMP) == CMDCOMP) { + MmioWrite32 ((SdMmcBaseAddr + INTSTS_OFFSET), CMDCOMP); + break; + } + + RetryCount++; + } + + if (RetryCount == MAX_RETRY_COUNT) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + + +VOID +GetBlockInformation ( + UINTN *BlockSize, + UINTN *NumBlocks + ) +{ + CSD_SDV2 *CsdSDV2Data; + UINTN CardSize; + + if (gCardInfo.CardType == SD_CARD_2_HIGH) { + CsdSDV2Data = (CSD_SDV2 *)&gCardInfo.CSDData; + + //Populate BlockSize. + *BlockSize = (0x1UL << CsdSDV2Data->READ_BL_LEN); + + //Calculate Total number of blocks. + CardSize = CsdSDV2Data->C_SIZELow16 | (CsdSDV2Data->C_SIZEHigh6 << 2); + *NumBlocks = ((CardSize + 1) * 1024); + } else { + //Populate BlockSize. + *BlockSize = (0x1UL << gCardInfo.CSDData.READ_BL_LEN); + + //Calculate Total number of blocks. + CardSize = gCardInfo.CSDData.C_SIZELow2 | (gCardInfo.CSDData.C_SIZEHigh10 << 2); + *NumBlocks = (CardSize + 1) * (1 << (gCardInfo.CSDData.C_SIZE_MULT + 2)); + } + + //For >=2G card, BlockSize may be 1K, but the transfer size is 512 bytes. + if (*BlockSize > 512) { + *NumBlocks = MultU64x32(*NumBlocks, *BlockSize/2); + *BlockSize = 512; + } + + DEBUG ((EFI_D_ERROR, "Card type: 0x%x, BlockSize: 0x%x, NumBlocks: 0x%x\n", gCardInfo.CardType, *BlockSize, *NumBlocks)); +} + + +VOID +CalculateCardCLKD ( + UINTN *ClockFrequencySelect + ) +{ + UINT8 MaxDataTransferRate; + UINTN TransferRateValue = 0; + UINTN TimeValue = 0 ; + UINTN Frequency = 0; + + MaxDataTransferRate = gCardInfo.CSDData.TRAN_SPEED; + + DEBUG((EFI_D_INFO, "SDHC::CalculateCardCLKD : 0x%x.\n", MaxDataTransferRate)); + + // For SD Cards we would need to send CMD6 to set + // speeds abouve 25MHz. High Speed mode 50 MHz and up + + //Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED) + switch (MaxDataTransferRate & 0x7) { + case 0: + TransferRateValue = 100 * 1000; + break; + + case 1: + TransferRateValue = 1 * 1000 * 1000; + break; + + case 2: + TransferRateValue = 10 * 1000 * 1000; + break; + + case 3: + TransferRateValue = 100 * 1000 * 1000; + break; + + default: + DEBUG((EFI_D_ERROR, "Invalid parameter.\n")); + ASSERT(FALSE); + } + + //Calculate Time value (Bits 6:3 of TRAN_SPEED) + switch ((MaxDataTransferRate >> 3) & 0xF) { + case 1: + TimeValue = 10; + break; + + case 2: + TimeValue = 12; + break; + + case 3: + TimeValue = 13; + break; + + case 4: + TimeValue = 15; + break; + + case 5: + TimeValue = 20; + break; + + case 6: + TimeValue = 25; + break; + + case 7: + TimeValue = 30; + break; + + case 8: + TimeValue = 35; + break; + + case 9: + TimeValue = 40; + break; + + case 10: + TimeValue = 45; + break; + + case 11: + TimeValue = 50; + break; + + case 12: + TimeValue = 55; + break; + + case 13: + TimeValue = 60; + break; + + case 14: + TimeValue = 70; + break; + + case 15: + TimeValue = 80; + break; + + default: + DEBUG((EFI_D_ERROR, "Invalid parameter.\n")); + ASSERT(FALSE); + } + + Frequency = TransferRateValue * TimeValue/10; + + //Calculate Clock divider value to program in SDHC_SYSCTL[CLKD] field. + *ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1); + + DEBUG ((EFI_D_INFO, "MaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", MaxDataTransferRate, Frequency/1000, *ClockFrequencySelect)); +} + + +VOID +GetCardConfigurationData ( + VOID + ) +{ + UINTN BlockSize; + UINTN NumBlocks; + // UINTN ClockFrequencySelect; + + //Calculate BlockSize and Total number of blocks in the detected card. + GetBlockInformation(&BlockSize, &NumBlocks); + gCardInfo.BlockSize = BlockSize; + gCardInfo.NumBlocks = NumBlocks; + + //Calculate Card clock divider value. + // CalculateCardCLKD(&ClockFrequencySelect); +// gCardInfo.ClockFrequencySelect = ClockFrequencySelect; + gCardInfo.ClockFrequencySelect = 25000000; +} + + +EFI_STATUS +InitializeSDHC ( + VOID + ) +{ + + EFI_STATUS Status; + EXYNOS_GPIO *Gpio; + UINT32 CumBaseAddr; + UINT32 SdMmcBaseAddr; + + Status = gBS->LocateProtocol(&gSamsungPlatformGpioProtocolGuid, NULL, (VOID **)&Gpio); + ASSERT_EFI_ERROR(Status); + + CumBaseAddr = PcdGet32(PcdCmuBase); + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + // Reset Host Controller + MmioWrite32((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRA); + while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRA) != 0x0); + + // Set Clock Source for using MPLL + MmioAndThenOr32 ((CumBaseAddr + CLK_SRC_FSYS_OFFSET), ~(0xF << 8), (0x6 << 8)); + + // Set GPIO for using SDMMC2 + Gpio->Set(Gpio,SD_2_CLK,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,SD_2_CMD,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,SD_2_CDn,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,SD_2_DATA0,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,SD_2_DATA1,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,SD_2_DATA2,GPIO_MODE_SPECIAL_FUNCTION_2); + Gpio->Set(Gpio,SD_2_DATA3,GPIO_MODE_SPECIAL_FUNCTION_2); + + Gpio->SetPull(Gpio,SD_2_CLK,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,SD_2_CMD,GPIO_PULL_NONE); + Gpio->SetPull(Gpio,SD_2_CDn,GPIO_PULL_UP); + Gpio->SetPull(Gpio,SD_2_DATA0,GPIO_PULL_UP); + Gpio->SetPull(Gpio,SD_2_DATA1,GPIO_PULL_UP); + Gpio->SetPull(Gpio,SD_2_DATA2,GPIO_PULL_UP); + Gpio->SetPull(Gpio,SD_2_DATA3,GPIO_PULL_UP); + + + Gpio->SetStrength(Gpio,SD_2_CLK,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,SD_2_CMD,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,SD_2_CDn,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,SD_2_DATA0,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,SD_2_DATA1,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,SD_2_DATA2,GPIO_DRV_4X); + Gpio->SetStrength(Gpio,SD_2_DATA3,GPIO_DRV_4X); + + return EFI_SUCCESS; +} + + +EFI_STATUS +PerformCardIdenfication ( + VOID + ) +{ + EFI_STATUS Status; + UINTN CmdArgument = 0; + UINTN Response = 0; + UINTN RetryCount = 0; + UINTN TempRes0,TempRes1,TempRes2,TempRes3; + BOOLEAN SDCmd8Supported = FALSE; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + //Enable interrupts. + MmioWrite32 ((SdMmcBaseAddr + INTEN_OFFSET), (CMDCOMP | TRNSCOMP | RDYFORRD | RDYFORWT | CARDINSERT | CARDREMOVE)); + + //Change clock frequency to 400KHz to fit protocol + UpdateSDHCClkFrequency(400); + + //Send CMD0 command. + Status = SendCmd (CMD0, CMD0_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "Cmd0 fails.\n")); + return Status; + } + + DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)))); + + //Send CMD8 command. (New v2.00 command for Voltage check) + //Only 2.7V - 3.6V is supported for SD2.0, only SD 2.0 card can pass. + //MMC & SD1.1 card will fail this command. + CmdArgument = CMD8_ARG; + Status = SendCmd (CMD8, CMD8_INT_EN, CmdArgument); + if (Status == EFI_SUCCESS) { + Response = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); + DEBUG ((EFI_D_INFO, "CMD8 success. CMD8 response: %x\n", Response)); + if (Response != CmdArgument) { + return EFI_DEVICE_ERROR; + } + DEBUG ((EFI_D_INFO, "Card is SD2.0\n")); + SDCmd8Supported = TRUE; //Supports high capacity. + } else { + DEBUG ((EFI_D_INFO, "CMD8 fails. Not an SD2.0 card.\n")); + } + + MmioOr32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRC); + while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRC)); + + //Poll till card is busy + while (RetryCount < MAX_RETRY_COUNT) { + //Send CMD55 command. + CmdArgument = 0; + Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument); + if (Status == EFI_SUCCESS) { + DEBUG ((EFI_D_INFO, "CMD55 success. CMD55 response: %x\n", MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)))); + gCardInfo.CardType = SD_CARD; + } else { + DEBUG ((EFI_D_ERROR, "CMD55 fails.\n")); + gCardInfo.CardType = MMC_CARD; + } + + //Send appropriate command for the card type which got detected. + if (gCardInfo.CardType == SD_CARD) { + CmdArgument = ((UINTN *) &(gCardInfo.OCRData))[0]; + + //Set HCS bit. + if (SDCmd8Supported) { + CmdArgument |= HCS; + } + + Status = SendCmd (ACMD41, ACMD41_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "ACMD41 fails.\n")); + return Status; + } + ((UINT32 *) &(gCardInfo.OCRData))[0] = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); + DEBUG ((EFI_D_INFO, "SD card detected. ACMD41 OCR: %x\n", ((UINT32 *) &(gCardInfo.OCRData))[0])); + } else if (gCardInfo.CardType == MMC_CARD) { + CmdArgument = 0; + Status = SendCmd (CMD1, CMD1_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD1 fails.\n")); + return Status; + } + Response = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); + DEBUG ((EFI_D_INFO, "MMC card detected. CMD1 response: %x\n", Response)); + + //NOTE: For now, I am skipping this since I only have an SD card. + //Compare card OCR and host OCR (Section 22.6.1.3.2.4) + return EFI_UNSUPPORTED; //For now, MMC is not supported. + } + + //Poll the card until it is out of its power-up sequence. + if (gCardInfo.OCRData.Busy == 1) { + + if (SDCmd8Supported) { + gCardInfo.CardType = SD_CARD_2; + } + + //Card is ready. Check CCS (Card capacity status) bit (bit#30). + //SD 2.0 standard card will response with CCS 0, SD high capacity card will respond with CCS 1. + if (gCardInfo.OCRData.AccessMode & BIT1) { + gCardInfo.CardType = SD_CARD_2_HIGH; + DEBUG ((EFI_D_INFO, "High capacity card.\n")); + } else { + DEBUG ((EFI_D_INFO, "Standard capacity card.\n")); + } + + break; + } + + RetryCount++; + } + + if (RetryCount == MAX_RETRY_COUNT) { + DEBUG ((EFI_D_ERROR, "Timeout error. RetryCount: %d\n", RetryCount)); + return EFI_TIMEOUT; + } + + //Read CID data. + CmdArgument = 0; + Status = SendCmd (CMD2, CMD2_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD2 fails. Status: %x\n", Status)); + return Status; + } + + DEBUG ((EFI_D_INFO, "CMD2 response: %x %x %x %x\n", MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)), \ + MmioRead32 ((SdMmcBaseAddr + RSPREG1_OFFSET)), \ + MmioRead32 ((SdMmcBaseAddr + RSPREG2_OFFSET)), \ + MmioRead32 ((SdMmcBaseAddr + RSPREG3_OFFSET)))); + + TempRes0 = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); + TempRes1 = MmioRead32 ((SdMmcBaseAddr + RSPREG1_OFFSET)); + TempRes2 = MmioRead32 ((SdMmcBaseAddr + RSPREG2_OFFSET)); + TempRes3 = MmioRead32 ((SdMmcBaseAddr + RSPREG3_OFFSET)); + + //Parse CID register data. + ParseCardCIDData(TempRes0 << 8, (TempRes1 << 8) | (TempRes0 >> 24), + (TempRes2 << 8) | (TempRes1 >> 24), (TempRes3 << 8) | (TempRes2 >> 24)); + + //Read RCA + CmdArgument = 0; + Status = SendCmd (CMD3, CMD3_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD3 fails. Status: %x\n", Status)); + return Status; + } + + //Set RCA for the detected card. RCA is CMD3 response. + gCardInfo.RCA = (MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)) >> 16); + DEBUG ((EFI_D_ERROR, "CMD3 response: RCA %x\n", gCardInfo.RCA)); + + //MMC Bus setting change after card identification. +// MmioAndThenOr32 (SDHC_PWRCON, ~(0x7<<9), SDBV30); //check if our controller voltage is 3.0v or 3.3v //wprkfgur + UpdateSDHCClkFrequency(400); //Set the clock frequency to 400KHz. + + return EFI_SUCCESS; +} + + +EFI_STATUS +GetCardSpecificData ( + VOID + ) +{ + EFI_STATUS Status; + UINTN CmdArgument; + UINTN TempRes[4],i; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + //Send CMD9 to retrieve CSD. + CmdArgument = gCardInfo.RCA << 16; + Status = SendCmd (CMD9, CMD9_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD9 fails. Status: %x\n", Status)); + return Status; + } + + TempRes[0] = MmioRead32 ((SdMmcBaseAddr + RSPREG0_OFFSET)); + TempRes[1] = MmioRead32 ((SdMmcBaseAddr + RSPREG1_OFFSET)); + TempRes[2] = MmioRead32 ((SdMmcBaseAddr + RSPREG2_OFFSET)); + TempRes[3] = MmioRead32 ((SdMmcBaseAddr + RSPREG3_OFFSET)); + + //Populate 128-bit CSD register data. + for (i = 0 ; i < 4; i++) { + ((UINT32 *)&(gCardInfo.CSDData))[i] = TempRes[i] << 8; + if (i != 0) + ((UINT32 *)&(gCardInfo.CSDData))[i] |= ((TempRes[i-1] >> 24) & 0xFF); + } + + DEBUG ((EFI_D_INFO, "CMD9 response: %x %x %x %x\n", ((UINT32 *)&(gCardInfo.CSDData))[0], ((UINT32 *)&(gCardInfo.CSDData))[1], ((UINT32 *)&(gCardInfo.CSDData))[2], ((UINT32 *)&(gCardInfo.CSDData))[3])); + + //Calculate total number of blocks and max. data transfer rate supported by the detected card. + GetCardConfigurationData(); + + return Status; +} + + +EFI_STATUS +PerformCardConfiguration ( + VOID + ) +{ + UINTN CmdArgument = 0; + EFI_STATUS Status; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + //Send CMD7 + CmdArgument = gCardInfo.RCA << 16; + Status = SendCmd (CMD7, CMD7_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD7 fails. Status: %x\n", Status)); + return Status; + } + + if ((gCardInfo.CardType != UNKNOWN_CARD) && (gCardInfo.CardType != MMC_CARD)) { + // We could read SCR register, but SD Card Phys spec stats any SD Card shall + // set SCR.SD_BUS_WIDTHS to support 4-bit mode, so why bother? + + // Send ACMD6 (application specific commands must be prefixed with CMD55) + Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument); + if (!EFI_ERROR (Status)) { + // set device into 4-bit data bus mode + Status = SendCmd (ACMD6, ACMD6_INT_EN, 0x2); + if (!EFI_ERROR (Status)) { + // Set host controler into 4-bit mode + MmioOr32 ((SdMmcBaseAddr + HOSTCTL_OFFSET), WIDE4); + DEBUG ((EFI_D_INFO, "SD Memory Card set to 4-bit mode\n")); + } + } + } + + //Send CMD16 to set the block length + CmdArgument = gCardInfo.BlockSize; + Status = SendCmd (CMD16, CMD16_INT_EN, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD16 fails. Status: %x\n", Status)); + return Status; + } + + //Change SDHC clock frequency to what detected card can support. + UpdateSDHCClkFrequency(250000); //Fix the clock value temporary + //UpdateSDHCClkFrequency(gCardInfo.ClockFrequencySelect); + + return EFI_SUCCESS; +} + + +EFI_STATUS +ReadBlockData ( + IN EFI_BLOCK_IO_PROTOCOL *This, + OUT VOID *Buffer + ) +{ + UINTN MmcStatus; + UINTN *DataBuffer = Buffer; + UINTN DataSize = This->Media->BlockSize/4; + UINTN Count; + UINTN RetryCount = 0; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + //Check controller status to make sure there is no error. + while (RetryCount < MAX_RETRY_COUNT) { + do { + //Read Status. + MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); + } while(MmcStatus == 0); + + //Check if Buffer read ready (RDYFORRD) bit is set? + if (MmcStatus & RDYFORRD) { + + //Clear RDYFORRD bit + MmioOr32 ((SdMmcBaseAddr + INTSTS_OFFSET), RDYFORRD); + + //Read block worth of data. + for (Count = 0; Count < DataSize; Count++) { + *DataBuffer++ = MmioRead32 ((SdMmcBaseAddr + BDATA_OFFSET)); + } + break; + } + RetryCount++; + } + + if (RetryCount == MAX_RETRY_COUNT) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + + +EFI_STATUS +WriteBlockData ( + IN EFI_BLOCK_IO_PROTOCOL *This, + OUT VOID *Buffer + ) +{ + UINTN MmcStatus; + UINTN *DataBuffer = Buffer; + UINTN DataSize = This->Media->BlockSize/4; + UINTN Count; + UINTN RetryCount = 0; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + //Check controller status to make sure there is no error. + while (RetryCount < MAX_RETRY_COUNT) { + do { + //Read Status. + MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); + } while(MmcStatus == 0); + + //Check if Buffer write ready (RDYFORWT) bit is set? + if (MmcStatus & RDYFORWT) { + + //Clear RDYFORWT bit + MmioOr32 ((SdMmcBaseAddr + INTSTS_OFFSET), RDYFORWT); + + //Write block worth of data. + for (Count = 0; Count < DataSize; Count++) { + MmioWrite32 ((SdMmcBaseAddr + BDATA_OFFSET), *DataBuffer++); + } + + break; + } + RetryCount++; + } + + if (RetryCount == MAX_RETRY_COUNT) { + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + + +EFI_STATUS +TransferBlock ( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN UINTN Lba, + IN OUT VOID *Buffer, + IN OPERATION_TYPE OperationType + ) +{ + EFI_STATUS Status; + UINTN MmcStatus; + UINTN RetryCount = 0; + UINTN Cmd = 0; + UINTN CmdInterruptEnable = 0; + UINTN CmdArgument = 0; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + DEBUG ((EFI_D_INFO, "SDHC::TransferBlock : Lba = %d, Buffer = 0x%x, Type = %d\n", Lba, Buffer, OperationType)); + //Populate the command information based on the operation type. + if (OperationType == READ) { + Cmd = CMD17; //Single block read + CmdInterruptEnable = CMD17_INT_EN; + PrepareTransfer(CardtoHost, 1); + } else if (OperationType == WRITE) { + Cmd = CMD24; //Single block write + CmdInterruptEnable = CMD24_INT_EN; + PrepareTransfer(HosttoCard, 1); + } + + //Set command argument based on the card access mode (Byte mode or Block mode) + if (gCardInfo.OCRData.AccessMode & BIT1) { + CmdArgument = Lba; + } else { + CmdArgument = Lba * This->Media->BlockSize; + } + + //Send Command. + Status = SendCmd (Cmd, CmdInterruptEnable, CmdArgument); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "CMD fails. Status: %x\n", Status)); + return Status; + } + + //Read or Write data. + if (OperationType == READ) { + Status = ReadBlockData (This, Buffer); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "ReadBlockData fails.\n")); + return Status; + } + } else if (OperationType == WRITE) { + Status = WriteBlockData (This, Buffer); + if (EFI_ERROR(Status)) { + DEBUG((EFI_D_ERROR, "WriteBlockData fails.\n")); + return Status; + } + } + + //Check for the Transfer completion. + while (RetryCount < MAX_RETRY_COUNT) { + //Read Status + do { + MmcStatus = MmioRead32 ((SdMmcBaseAddr + INTSTS_OFFSET)); + } while (MmcStatus == 0); + + //Check if Transfer complete (TRNSCOMP) bit is set? + if (MmcStatus & TRNSCOMP) { + break; + } else { + DEBUG ((EFI_D_INFO, "MmcStatus for TRNSCOMP: %x\n", MmcStatus)); + //Check if DATAEBITERR, DATACRCERR or DATATOUTERR interrupt occured. + if ((MmcStatus & DATAEBITERR) | (MmcStatus & DATACRCERR) | (MmcStatus & DATATOUTERR)) { + //There was an error during the data transfer. + + //Set SRD bit to 1 and wait until it return to 0x0. + MmioOr32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRD); + while((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRD) != 0x0); + + return EFI_DEVICE_ERROR; + } + } + RetryCount++; + } + + if (RetryCount == MAX_RETRY_COUNT) { + DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n")); + return EFI_TIMEOUT; + } + + return EFI_SUCCESS; +} + +BOOLEAN +CardPresent ( + VOID + ) +{ + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + if (MmioRead32((SdMmcBaseAddr + PRNSTS_OFFSET)) & INSCARD) + return TRUE; + else + return FALSE; +} + +EFI_STATUS +DetectCard ( + VOID + ) +{ + EFI_STATUS Status; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + if (!CardPresent ()) { + return EFI_NO_MEDIA; + } + + //Initialize MMC host controller clocks. + Status = InitializeSDHC (); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "Initialize MMC host controller fails. Status: %x\n", Status)); + return Status; + } + + //Soft reset for all. + MmioWrite32((SdMmcBaseAddr + SDHC_SWRST_OFFSET), SRA); + while ((MmioRead32 ((SdMmcBaseAddr + SDHC_SWRST_OFFSET)) & SRA) != 0x0); + + //Set the clock frequency to 400KHz. + UpdateSDHCClkFrequency (400); + + //Card idenfication + Status = PerformCardIdenfication (); + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "No MMC/SD card detected.\n")); + return Status; + } + + //Get CSD (Card specific data) for the detected card. + Status = GetCardSpecificData(); + if (EFI_ERROR(Status)) { + return Status; + } + + //Configure the card in data transfer mode. + Status = PerformCardConfiguration(); + if (EFI_ERROR(Status)) { + return Status; + } + + //Patch the Media structure. + gSDHCMedia.LastBlock = (gCardInfo.NumBlocks - 1); + gSDHCMedia.BlockSize = gCardInfo.BlockSize; + gSDHCMedia.ReadOnly = 0; + gSDHCMedia.MediaPresent = TRUE; + gSDHCMedia.MediaId++; + + DEBUG ((EFI_D_INFO, "SD Card Media Change on Handle 0x%08x\n", gImageHandle)); + + return Status; +} + +#define MAX_SDHC_TRANSFER_SIZE 0x4000 + +EFI_STATUS +SdReadWrite ( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN UINTN Lba, + OUT VOID *Buffer, + IN UINTN BufferSize, + IN OPERATION_TYPE OperationType + ) +{ + EFI_STATUS Status = EFI_SUCCESS; + UINTN RetryCount = 0; + UINTN BlockCount; + UINTN BytesToBeTranferedThisPass = 0; + UINTN BytesRemainingToBeTransfered; + EFI_TPL OldTpl; + BOOLEAN Update; + UINT32 SdMmcBaseAddr; + + SdMmcBaseAddr = PcdGet32(PcdSdMmcBase); + + Update = FALSE; + + DEBUG ((EFI_D_INFO, "SDHC::SDHCInitialize is called \n")); + if (gMediaChange) { + Update = TRUE; + Status = DetectCard(); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "SDHC::SDHCInitialize:Card Detect Fail\n")); + gSDHCMedia.MediaPresent = FALSE; + gSDHCMedia.LastBlock = 0; + gSDHCMedia.BlockSize = 512; // Should be zero but there is a bug in DiskIo + gSDHCMedia.ReadOnly = FALSE; + } + gMediaChange = FALSE; + } else if (!gSDHCMedia.MediaPresent) { + Status = EFI_NO_MEDIA; + goto Done; + } + + if (Update) { + DEBUG ((EFI_D_INFO, "SD Card ReinstallProtocolInterface ()\n")); + gBS->ReinstallProtocolInterface ( + + gImageHandle, + + &gEfiBlockIoProtocolGuid, + + &gBlockIo, + + &gBlockIo + + ); + } +DEBUG ((EFI_D_INFO, "SDHC::SDHCInitialize:CardInfo : LastBlock = %ld, BlockSize = %d\n", gSDHCMedia.LastBlock, gSDHCMedia.BlockSize)); + + + if (Buffer == NULL) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + if (Lba > This->Media->LastBlock) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + if ((BufferSize % This->Media->BlockSize) != 0) { + Status = EFI_BAD_BUFFER_SIZE; + goto Done; + } + + //Check if the data lines are not in use. + while ((RetryCount++ < MAX_RETRY_COUNT) && (MmioRead32 ((SdMmcBaseAddr + PRNSTS_OFFSET)) & CMDINHDAT)); + if (RetryCount == MAX_RETRY_COUNT) { + Status = EFI_TIMEOUT; + goto Done; + } + + OldTpl = gBS->RaiseTPL (TPL_NOTIFY); + + BytesRemainingToBeTransfered = BufferSize; + while (BytesRemainingToBeTransfered > 0) { + // Turn OFF DMA path until it is debugged + // BytesToBeTranferedThisPass = (BytesToBeTranferedThisPass >= MAX_SDHC_TRANSFER_SIZE) ? MAX_SDHC_TRANSFER_SIZE : BytesRemainingToBeTransfered; + BytesToBeTranferedThisPass = This->Media->BlockSize; + + BlockCount = BytesToBeTranferedThisPass/This->Media->BlockSize; + + if (BlockCount > 1) { +// Status = DmaBlocks (This, Lba, Buffer, BlockCount, OperationType); + } else { + //Transfer a block worth of data. + Status = TransferBlock (This, Lba, Buffer, OperationType); + + } + + if (EFI_ERROR(Status)) { + DEBUG ((EFI_D_ERROR, "TransferBlockData fails. %x\n", Status)); + goto DoneRestoreTPL; + } + + BytesRemainingToBeTransfered -= BytesToBeTranferedThisPass; + Lba += BlockCount; + Buffer = (UINT8 *)Buffer + This->Media->BlockSize; + } + +DoneRestoreTPL: + + gBS->RestoreTPL (OldTpl); + +Done: + + return Status; + +} + + +/** + + Reset the Block Device. + + + + @param This Indicates a pointer to the calling context. + + @param ExtendedVerification Driver may perform diagnostics on reset. + + + + @retval EFI_SUCCESS The device was reset. + + @retval EFI_DEVICE_ERROR The device is not functioning properly and could + + not be reset. + + + +**/ +EFI_STATUS +EFIAPI +SDHCReset ( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN BOOLEAN ExtendedVerification + ) +{ + DEBUG ((EFI_D_INFO, " SDHC::SDHCReset is called\n")); + return EFI_SUCCESS; +} + + +/** + + Read BufferSize bytes from Lba into Buffer. + + + + @param This Indicates a pointer to the calling context. + + @param MediaId Id of the media, changes every time the media is replaced. + + @param Lba The starting Logical Block Address to read from + + @param BufferSize Size of Buffer, must be a multiple of device block size. + + @param Buffer A pointer to the destination buffer for the data. The caller is + + responsible for either having implicit or explicit ownership of the buffer. + + + + @retval EFI_SUCCESS The data was read correctly from the device. + + @retval EFI_DEVICE_ERROR The device reported an error while performing the read. + + @retval EFI_NO_MEDIA There is no media in the device. + + @retval EFI_MEDIA_CHANGED The MediaId does not matched the current device. + + @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device. + + @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid, + + or the buffer is not on proper alignment. + +EFI_STATUS + +**/ +EFI_STATUS +EFIAPI +SDHCReadBlocks ( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN UINT32 MediaId, + IN EFI_LBA Lba, + IN UINTN BufferSize, + OUT VOID *Buffer + ) +{ + EFI_STATUS Status; + + DEBUG ((EFI_D_INFO, "SDHC::SDHCWriteBlocks : MediaId = %d, Lba = %d, BufferSize = %d, Buffer = 0x%x\n", + MediaId, (UINTN)Lba, BufferSize, Buffer)); + //Perform Read operation. + Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, READ); + + return Status; + +} + + +/** + + Write BufferSize bytes from Lba into Buffer. + + + + @param This Indicates a pointer to the calling context. + + @param MediaId The media ID that the write request is for. + + @param Lba The starting logical block address to be written. The caller is + + responsible for writing to only legitimate locations. + + @param BufferSize Size of Buffer, must be a multiple of device block size. + + @param Buffer A pointer to the source buffer for the data. + + + + @retval EFI_SUCCESS The data was written correctly to the device. + + @retval EFI_WRITE_PROTECTED The device can not be written to. + + @retval EFI_DEVICE_ERROR The device reported an error while performing the write. + + @retval EFI_NO_MEDIA There is no media in the device. + + @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device. + + @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device. + + @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid, + + or the buffer is not on proper alignment. + + + +**/ +EFI_STATUS +EFIAPI +SDHCWriteBlocks ( + IN EFI_BLOCK_IO_PROTOCOL *This, + IN UINT32 MediaId, + IN EFI_LBA Lba, + IN UINTN BufferSize, + IN VOID *Buffer + ) +{ + EFI_STATUS Status; + + DEBUG ((EFI_D_INFO, "SDHC::SDHCWriteBlocks : MediaId = %d, Lba = %d, BufferSize = %d, Buffer = 0x%x\n", + MediaId, (UINTN)Lba, BufferSize, Buffer)); + //Perform write operation. + Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, WRITE); + + + return Status; + +} + + +/** + + Flush the Block Device. + + + + @param This Indicates a pointer to the calling context. + + + + @retval EFI_SUCCESS All outstanding data was written to the device + + @retval EFI_DEVICE_ERROR The device reported an error while writting back the data + + @retval EFI_NO_MEDIA There is no media in the device. + + + +**/ +EFI_STATUS +EFIAPI +SDHCFlushBlocks ( + IN EFI_BLOCK_IO_PROTOCOL *This + ) +{ + DEBUG ((EFI_D_INFO, "SDHC::SDHCFlushBlocks is called\n")); + return EFI_SUCCESS; +} + + +EFI_BLOCK_IO_PROTOCOL gBlockIo = { + EFI_BLOCK_IO_INTERFACE_REVISION, // Revision + &gSDHCMedia, // *Media + SDHCReset, // Reset + SDHCReadBlocks, // ReadBlocks + SDHCWriteBlocks, // WriteBlocks + SDHCFlushBlocks // FlushBlocks +}; + + +/** + + Timer callback to convert card present hardware into a boolean that indicates + + a media change event has happened. If you just check the GPIO you could see + + card 1 and then check again after card 1 was removed and card 2 was inserted + + and you would still see media present. Thus you need the timer tick to catch + + the toggle event. + + + + @param Event Event whose notification function is being invoked. + + @param Context The pointer to the notification function's context, + + which is implementation-dependent. Not used. + + + +**/ +VOID +EFIAPI +TimerCallback ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + BOOLEAN Present; + + DEBUG ((EFI_D_INFO, "SDHC::TimerCallBack is called\n")); + Present = CardPresent (); + if (gSDHCMedia.MediaPresent) { + if (!Present && !gMediaChange) { + gMediaChange = TRUE; + } + } else { + if (Present && !gMediaChange) { + gMediaChange = TRUE; + } + } +} + + +EFI_STATUS +EFIAPI +SDHCInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + ZeroMem (&gCardInfo, sizeof (CARD_INFO)); + + Status = gBS->CreateEvent (EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK, TimerCallback, NULL, &gTimerEvent); + ASSERT_EFI_ERROR (Status); + + Status = gBS->SetTimer (gTimerEvent, TimerPeriodic, 1000000); + ASSERT_EFI_ERROR (Status); + + //Publish BlockIO. + Status = gBS->InstallMultipleProtocolInterfaces ( + &ImageHandle, + &gEfiBlockIoProtocolGuid, &gBlockIo, + &gEfiDevicePathProtocolGuid, &gSDHCDevicePath, + NULL + ); + return Status; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.h b/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.h new file mode 100755 index 000000000..849a0e0cc --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.h @@ -0,0 +1,293 @@ +/** @file + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _SDHCDXE_H_ +#define _SDHCDXE_H_ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* SDHC Register MAP */ +#define BLKSIZE_OFFSET (0x04) +#define BLKCNT_OFFSET (0x04) //only use [16:31] +#define BLEN_512BYTES (0x200UL << 0) + +#define ARGUMENT_OFFSET (0x08) +#define TRNMOD_OFFSET (0x0C) +#define CMDREG_OFFSET (0x0C) //only use [16:31] +#define ENDMA BIT0 +#define ENBLKCNT BIT1 +#define RD1WT0 BIT4 +#define MUL1SIN0 BIT5 +#define RSPTYP136 (0x1 << 16) +#define RSPTYP48 (0x2 << 16) +#define RSPTYP48B (0x3 << 16) +#define ENCMDCRC BIT19 +#define ENCMDIDX BIT20 +#define DATAPRNT BIT21 +#define INDX(CMD_INDX) ((CMD_INDX & 0x3F) << 24) + +#define RSPREG0_OFFSET (0x10) +#define RSPREG1_OFFSET (0x14) +#define RSPREG2_OFFSET (0x18) +#define RSPREG3_OFFSET (0x1C) +#define BDATA_OFFSET (0x20) +#define PRNSTS_OFFSET (0x24) +#define CMDINHCMD BIT0 +#define CMDINHDAT BIT1 +#define INSCARD BIT16 + +#define HOSTCTL_OFFSET (0x28) +#define PWRCON_OFFSET (0x28) //only use [8:15] +#define WIDE4 BIT1 +#define SDBP BIT8 +#define SDBV18 (0x5 << 9) +#define SDBV30 (0x6 << 9) +#define SDBV33 (0x7 << 9) + +#define CLKCON_OFFSET (0x2C) +#define TIMEOUTCON_OFFSET (0x2C) //only use [16:23] +#define SDHC_SWRST_OFFSET (0x2C) //only use [24:31] +#define ICE BIT0 +#define ICS BIT1 +#define CCE BIT2 +#define CCS BIT3 +#define SRA BIT24 +#define SRC BIT25 +#define SRD BIT26 + +#define INTSTS_OFFSET (0x30) +#define INTEN_OFFSET (0x34) +#define CMDCOMP BIT0 +#define TRNSCOMP BIT1 +#define RDYFORWT BIT4 +#define RDYFORRD BIT5 +#define CARDINSERT BIT6 +#define CARDREMOVE BIT7 +#define ERRINT BIT15 +#define CMDTOUTERR BIT16 +#define CMDCRCERR BIT17 +#define CMDEBITERR BIT18 +#define CMDIDXERR BIT19 +#define DATATOUTERR BIT20 +#define DATACRCERR BIT21 +#define DATAEBITERR BIT22 + +#define HosttoCard 0x1 +#define CardtoHost 0x0 + +/* Command Definitions */ +#define CMD0 INDX(0) +#define CMD0_INT_EN (CMDCOMP | CMDEBITERR) + +#define CMD1 (INDX(1) | RSPTYP48) +#define CMD1_INT_EN (CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD2 (INDX(2) | ENCMDCRC | RSPTYP136) +#define CMD2_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD3 (INDX(3) | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD3_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD5 (INDX(5) | RSPTYP48) +#define CMD5_INT_EN (CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD7 (INDX(7) | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD7_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD8 (INDX(8) | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD8_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) +//Reserved(0)[12:31], Supply voltage(1)[11:8], check pattern(0xCE)[7:0] = 0x1CE +#define CMD8_ARG (0x0UL << 12 | BIT8 | 0xCEUL << 0) + +#define CMD9 (INDX(9) | ENCMDCRC | RSPTYP136) +#define CMD9_INT_EN (CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD16 (INDX(16) | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD16_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD17 (INDX(17) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48 | RD1WT0) +#define CMD17_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORRD | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) + +#define CMD18 (INDX(18) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48 | MUL1SIN0 | RD1WT0 | ENBLKCNT | ENDMA) +#define CMD18_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORRD | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) + +#define CMD23 (INDX(23) | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD23_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define CMD24 (INDX(24) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD24_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORWT | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) + +#define CMD25 (INDX(25) | DATAPRNT | ENCMDIDX | ENCMDCRC | RSPTYP48 | MUL1SIN0 | ENBLKCNT | ENDMA) +#define CMD25_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | TRNSCOMP | RDYFORWT | CMDTOUTERR | DATATOUTERR | DATACRCERR | DATAEBITERR | CMDEBITERR) + +#define CMD55 (INDX(55) | ENCMDIDX | ENCMDCRC | RSPTYP48) +#define CMD55_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define ACMD41 (INDX(41) | RSPTYP48) +#define ACMD41_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + +#define ACMD6 (INDX(6) | RSPTYP48) +#define ACMD6_INT_EN (CMDIDXERR | CMDCRCERR | CMDCOMP | CMDEBITERR | CMDTOUTERR) + + +#define HCS BIT30 //Host capacity support/1 = Supporting high capacity + +#define MAX_RETRY_COUNT (100000) +#define MMC_REFERENCE_CLK (96000000) + +typedef struct { + UINT32 Reserved0: 7; // 0 + UINT32 V170_V195: 1; // 1.70V - 1.95V + UINT32 V200_V260: 7; // 2.00V - 2.60V + UINT32 V270_V360: 9; // 2.70V - 3.60V + UINT32 RESERVED_1: 5; // Reserved + UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode) + UINT32 Busy: 1; // This bit is set to LOW if the card has not finished the power up routine +}OCR; + +typedef struct { + UINT32 NOT_USED; // 1 [0:0] + UINT32 CRC; // CRC7 checksum [7:1] + UINT32 MDT; // Manufacturing date [19:8] + UINT32 RESERVED_1; // Reserved [23:20] + UINT32 PSN; // Product serial number [55:24] + UINT8 PRV; // Product revision [63:56] + UINT8 PNM[5]; // Product name [64:103] + UINT16 OID; // OEM/Application ID [119:104] + UINT8 MID; // Manufacturer ID [127:120] +}CID; + +typedef struct { + UINT8 NOT_USED: 1; // Not used, always 1 [0:0] + UINT8 CRC: 7; // CRC [7:1] + + UINT8 RESERVED_1: 2; // Reserved [9:8] + UINT8 FILE_FORMAT: 2; // File format [11:10] + UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12] + UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13] + UINT8 COPY: 1; // Copy flag (OTP) [14:14] + UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15] + + UINT16 RESERVED_2: 5; // Reserved [20:16] + UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21] + UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22] + UINT16 R2W_FACTOR: 3; // Write speed factor [28:26] + UINT16 RESERVED_3: 2; // Reserved [30:29] + UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31] + + UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32] + UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39] + UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46] + UINT32 C_SIZE_MULT: 3; // Device size multiplier [49:47] + UINT32 VDD_W_CURR_MAX: 3; // Max. write current @ VDD max [52:50] + UINT32 VDD_W_CURR_MIN: 3; // Max. write current @ VDD min [55:53] + UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56] + UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59] + UINT32 C_SIZELow2: 2; // Device size [63:62] + + UINT32 C_SIZEHigh10: 10;// Device size [73:64] + UINT32 RESERVED_4: 2; // Reserved [75:74] + UINT32 DSR_IMP: 1; // DSR implemented [76:76] + UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77] + UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78] + UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79] + UINT32 READ_BL_LEN: 4; // Max. read data block length [83:80] + UINT32 CCC: 12;// Card command classes [95:84] + + UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96] + UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104] + UINT8 TAAC ; // Data read access-time 1 [119:112] + + UINT8 RESERVED_5: 6; // Reserved [125:120] + UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126] +}CSD; + +typedef struct { + UINT8 NOT_USED: 1; // Not used, always 1 [0:0] + UINT8 CRC: 7; // CRC [7:1] + UINT8 RESERVED_1: 2; // Reserved [9:8] + UINT8 FILE_FORMAT: 2; // File format [11:10] + UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12] + UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13] + UINT8 COPY: 1; // Copy flag (OTP) [14:14] + UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15] + UINT16 RESERVED_2: 5; // Reserved [20:16] + UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21] + UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22] + UINT16 R2W_FACTOR: 3; // Write speed factor [28:26] + UINT16 RESERVED_3: 2; // Reserved [30:29] + UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31] + UINT16 WP_GRP_SIZE: 7; // Write protect group size [38:32] + UINT16 SECTOR_SIZE: 7; // Erase sector size [45:39] + UINT16 ERASE_BLK_EN: 1; // Erase single block enable [46:46] + UINT16 RESERVED_4: 1; // Reserved [47:47] + UINT32 C_SIZELow16: 16;// Device size [69:48] + UINT32 C_SIZEHigh6: 6; // Device size [69:48] + UINT32 RESERVED_5: 6; // Reserved [75:70] + UINT32 DSR_IMP: 1; // DSR implemented [76:76] + UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77] + UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78] + UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79] + UINT16 READ_BL_LEN: 4; // Max. read data block length [83:80] + UINT16 CCC: 12;// Card command classes [95:84] + UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96] + UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104] + UINT8 TAAC ; // Data read access-time 1 [119:112] + UINT8 RESERVED_6: 6; // 0 [125:120] + UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126] +}CSD_SDV2; + +typedef enum { + UNKNOWN_CARD, + MMC_CARD, //MMC card + SD_CARD, //SD 1.1 card + SD_CARD_2, //SD 2.0 or above standard card + SD_CARD_2_HIGH //SD 2.0 or above high capacity card +} CARD_TYPE; + +typedef enum { + READ, + WRITE +} OPERATION_TYPE; + +typedef struct { + UINT16 RCA; + UINTN BlockSize; + UINTN NumBlocks; + UINTN ClockFrequencySelect; + CARD_TYPE CardType; + OCR OCRData; + CID CIDData; + CSD CSDData; +} CARD_INFO; + +EFI_STATUS +DetectCard ( + VOID + ); + +extern EFI_BLOCK_IO_PROTOCOL gBlockIo; + +#endif diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.inf b/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.inf new file mode 100755 index 000000000..70ac23011 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/SDHCDxe/SDHCDxe.inf @@ -0,0 +1,49 @@ +#/** @file +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SDHCDxe + FILE_GUID = e7c3d754-8688-4586-b38f-4ae9b74b8ff1 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = SDHCInitialize + + +[Sources.common] + SDHCDxe.c + +[Packages] + MdePkg/MdePkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + SamsungPlatformPkg/SamsungPlatformPkg.dec + +[LibraryClasses] + UefiDriverEntryPoint + IoLib + TimerLib + +[Guids] + +[Protocols] + gEfiBlockIoProtocolGuid + gEfiDevicePathProtocolGuid + gSamsungPlatformGpioProtocolGuid ## GPIO Protocol + +[FixedPcd] + gExynosPkgTokenSpaceGuid.PcdCmuBase + gExynosPkgTokenSpaceGuid.PcdSdMmcBase + +[Depex] + TRUE diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.c b/SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.c new file mode 100755 index 000000000..ea245343d --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.c @@ -0,0 +1,432 @@ +/** @file + Template for Timer Architecture Protocol driver of the ARM flavor + + Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include + +// The notification function to call on every timer interrupt. +volatile EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL; +EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; + +// The current period of the timer interrupt +volatile UINT64 mTimerPeriod = 0; + +// Cached copy of the Hardware Interrupt protocol instance +EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; + +// Cached interrupt vector +UINTN gVector; + +UINT32 mLastTickCount; + +/** + + C Interrupt Handler called in the interrupt context when Source interrupt is active. + + + @param Source Source of the interrupt. Hardware routing off a specific platform defines + what source means. + + @param SystemContext Pointer to system register context. Mostly used by debuggers and will + update the system context after the return from the interrupt if + modified. Don't change these values unless you know what you are doing + +**/ +VOID +EFIAPI +TimerInterruptHandler ( + IN HARDWARE_INTERRUPT_SOURCE Source, + IN EFI_SYSTEM_CONTEXT SystemContext + ) +{ + EFI_TPL OriginalTPL; + UINT32 IntStatus; + UINT32 PWMTimerBase; + EFI_STATUS Status; + + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + // + // DXE core uses this callback for the EFI timer tick. The DXE core uses locks + // that raise to TPL_HIGH and then restore back to current level. Thus we need + // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. + // + OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); + + // clear the interrupt + IntStatus = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); + if(IntStatus & TIMER_STATUS_MASK(TIMER_0)){ + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_0))); + Status = RETURN_SUCCESS; + DEBUG ((EFI_D_INFO, "\nTimer 0 ISR\n")); + } + if(IntStatus & TIMER_STATUS_MASK(TIMER_1)){ + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_1))); + Status = RETURN_SUCCESS; + DEBUG ((EFI_D_INFO, "\nTimer 1 ISR\n")); + } + if(IntStatus & TIMER_STATUS_MASK(TIMER_2)){ + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_2))); + Status = RETURN_SUCCESS; + DEBUG ((EFI_D_INFO, "\nTimer 2 ISR\n")); + } + if(IntStatus & TIMER_STATUS_MASK(TIMER_3)){ + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_3))); + Status = RETURN_SUCCESS; + DEBUG ((EFI_D_INFO, "\nTimer 3 ISR\n")); + } + if(IntStatus & TIMER_STATUS_MASK(TIMER_4)){ + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(IntStatus | TIMER_STATUS_MASK(TIMER_4))); + Status = RETURN_SUCCESS; + DEBUG ((EFI_D_INFO, "\nTimer 4 ISR\n")); + } + if(EFI_ERROR(Status)){ + Status = RETURN_UNSUPPORTED; + ASSERT_EFI_ERROR(FALSE); + } + // signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers + gInterrupt->EndOfInterrupt (gInterrupt, Source); + + if (mTimerNotifyFunction) { + mTimerNotifyFunction (mTimerPeriod); + } + + gBS->RestoreTPL (OriginalTPL); +} + +/** + This function registers the handler NotifyFunction so it is called every time + the timer interrupt fires. It also passes the amount of time since the last + handler call to the NotifyFunction. If NotifyFunction is NULL, then the + handler is unregistered. If the handler is registered, then EFI_SUCCESS is + returned. If the CPU does not support registering a timer interrupt handler, + then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler + when a handler is already registered, then EFI_ALREADY_STARTED is returned. + If an attempt is made to unregister a handler when a handler is not registered, + then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to + register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR + is returned. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param NotifyFunction The function to call when a timer interrupt fires. This + function executes at TPL_HIGH_LEVEL. The DXE Core will + register a handler for the timer interrupt, so it can know + how much time has passed. This information is used to + signal timer based events. NULL will unregister the handler. + @retval EFI_SUCCESS The timer handler was registered. + @retval EFI_UNSUPPORTED The platform does not support timer interrupts. + @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already + registered. + @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not + previously registered. + @retval EFI_DEVICE_ERROR The timer handler could not be registered. + +**/ +EFI_STATUS +EFIAPI +TimerDriverRegisterHandler ( + IN EFI_TIMER_ARCH_PROTOCOL *This, + IN EFI_TIMER_NOTIFY NotifyFunction + ) +{ + if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) { + return EFI_INVALID_PARAMETER; + } + + if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) { + return EFI_ALREADY_STARTED; + } + + DEBUG ((EFI_D_INFO, "Handler Registered Successfully\n")); + mTimerNotifyFunction = NotifyFunction; + + return EFI_SUCCESS; +} + +/** + Make sure all ArrmVe Timers are disabled +**/ +VOID +EFIAPI +ExitBootServicesEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINT32 PWMTimerBase; + + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + // All PWM timer is off + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), 0); + DEBUG ((EFI_D_INFO, "\nTimer Exit\n")); +} + +/** + + This function adjusts the period of timer interrupts to the value specified + by TimerPeriod. If the timer period is updated, then the selected timer + period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If + the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. + If an error occurs while attempting to update the timer period, then the + timer hardware will be put back in its state prior to this call, and + EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt + is disabled. This is not the same as disabling the CPU's interrupts. + Instead, it must either turn off the timer hardware, or it must adjust the + interrupt controller so that a CPU interrupt is not generated when the timer + interrupt fires. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If + the timer hardware is not programmable, then EFI_UNSUPPORTED is + returned. If the timer is programmable, then the timer period + will be rounded up to the nearest timer period that is supported + by the timer hardware. If TimerPeriod is set to 0, then the + timer interrupts will be disabled. + + + @retval EFI_SUCCESS The timer period was changed. + @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. + @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. + +**/ +EFI_STATUS +EFIAPI +TimerDriverSetTimerPeriod ( + IN EFI_TIMER_ARCH_PROTOCOL *This, + IN UINT64 TimerPeriod + ) +{ + EFI_STATUS Status; + UINT64 TimerTicks; + UINT32 rwVal; + UINT32 PWMTimerBase; + + DEBUG ((EFI_D_INFO, "\nSetTimer called\n")); + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + // Stop PWM timer 0 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET),STOP_TIMER_VAL(TIMER_0)); + + if (TimerPeriod == 0) { + // leave timer disabled from above, and... + rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET),(rwVal & ~TIMER_INTR_MASK(TIMER_0))); + // disable timer 0/1 interrupt for a TimerPeriod of 0 + Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); + } else { + // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10) + TimerTicks = DivU64x32 (TimerPeriod, 10); + // if it's larger than 32-bits, pin to highest value + if (TimerTicks > 0xffffffff) { + TimerTicks = 0xffffffff; + } + + // PWM Timer 0 used by Period counter with Auto re-load mode + MmioWrite32 ((PWMTimerBase + PWM_TCNTB0_OFFSET), TimerTicks); + // Set and Clear PWM Manually update for Timer 0 + rwVal = MmioRead32 (PWMTimerBase + PWM_TCON_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | UPDATE_COUNT_BUF_MASK(TIMER_0)); + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal & ~UPDATE_COUNT_BUF_MASK(TIMER_0)); + + // Set Auto re-load and start Timer + MmioWrite32 ((PWMTimerBase + PWM_TCON_OFFSET), rwVal | RELOAD_AND_START(TIMER_0)); + + //PWM Timer0 INT enable + rwVal = MmioRead32 (PWMTimerBase + PWM_TINT_CSTAT_OFFSET); + MmioWrite32 ((PWMTimerBase + PWM_TINT_CSTAT_OFFSET), rwVal | TIMER_INTR_MASK(TIMER_0) ); + + Status = gInterrupt->EnableInterruptSource (gInterrupt, gVector); + } + + // Save the new timer period + mTimerPeriod = TimerPeriod; + return Status; +} + +/** + This function retrieves the period of timer interrupts in 100 ns units, + returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod + is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is + returned, then the timer is currently disabled. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If + 0 is returned, then the timer is currently disabled. + + + @retval EFI_SUCCESS The timer period was returned in TimerPeriod. + @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. + +**/ +EFI_STATUS +EFIAPI +TimerDriverGetTimerPeriod ( + IN EFI_TIMER_ARCH_PROTOCOL *This, + OUT UINT64 *TimerPeriod + ) +{ + if (TimerPeriod == NULL) { + return EFI_INVALID_PARAMETER; + } + + *TimerPeriod = mTimerPeriod; + return EFI_SUCCESS; +} + +/** + This function generates a soft timer interrupt. If the platform does not support soft + timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. + If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() + service, then a soft timer interrupt will be generated. If the timer interrupt is + enabled when this service is called, then the registered handler will be invoked. The + registered handler should not be able to distinguish a hardware-generated timer + interrupt from a software-generated timer interrupt. + + @param This The EFI_TIMER_ARCH_PROTOCOL instance. + + @retval EFI_SUCCESS The soft timer interrupt was generated. + @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts. + +**/ +EFI_STATUS +EFIAPI +TimerDriverGenerateSoftInterrupt ( + IN EFI_TIMER_ARCH_PROTOCOL *This + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Interface structure for the Timer Architectural Protocol. + + @par Protocol Description: + This protocol provides the services to initialize a periodic timer + interrupt, and to register a handler that is called each time the timer + interrupt fires. It may also provide a service to adjust the rate of the + periodic timer interrupt. When a timer interrupt occurs, the handler is + passed the amount of time that has passed since the previous timer + interrupt. + + @param RegisterHandler + Registers a handler that will be called each time the + timer interrupt fires. TimerPeriod defines the minimum + time between timer interrupts, so TimerPeriod will also + be the minimum time between calls to the registered + handler. + + @param SetTimerPeriod + Sets the period of the timer interrupt in 100 nS units. + This function is optional, and may return EFI_UNSUPPORTED. + If this function is supported, then the timer period will + be rounded up to the nearest supported timer period. + + + @param GetTimerPeriod + Retrieves the period of the timer interrupt in 100 nS units. + + @param GenerateSoftInterrupt + Generates a soft timer interrupt that simulates the firing of + the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for + a period of time. + +**/ +EFI_TIMER_ARCH_PROTOCOL gTimer = { + TimerDriverRegisterHandler, + TimerDriverSetTimerPeriod, + TimerDriverGetTimerPeriod, + TimerDriverGenerateSoftInterrupt +}; + + +/** + Initialize the state information for the Timer Architectural Protocol and + the Timer Debug support protocol that allows the debugger to break into a + running program. + + @param ImageHandle of the loaded driver + @param SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Protocol registered + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Hardware problems + +**/ +EFI_STATUS +EFIAPI +TimerInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_HANDLE Handle = NULL; + EFI_STATUS Status; + + UINT32 Tmp; + UINT32 PWMTimerBase; + + PWMTimerBase=PcdGet32(PcdPWMTimerBase); + // Find the interrupt controller protocol. ASSERT if not found. + Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt); + ASSERT_EFI_ERROR (Status); + + // PWM Input source clock is 100Mhz and Configure 1Mhz for PWM Timer + Tmp = MmioRead32 (PWMTimerBase + PWM_TCFG0_OFFSET); + Tmp &= ~(0xFF << PRESCALE_GRP0_START_POS); + Tmp |= (PRESCALE_TIMER_GRP0 << PRESCALE_GRP0_START_POS); + MmioWrite32 ((PWMTimerBase + PWM_TCFG0_OFFSET), Tmp); + MmioWrite32 ((PWMTimerBase + PWM_TCFG1_OFFSET), 0); + + // Disable the timer + Status = TimerDriverSetTimerPeriod (&gTimer, 0); + ASSERT_EFI_ERROR (Status); + + // Install interrupt handler + gVector = PWM_TIMER0_INTERRUPT_NUM; + Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); + ASSERT_EFI_ERROR (Status); + + // PWM Timer 0 used by Period counter with Auto re-load mode + MmioWrite32 ((PWMTimerBase + PWM_TCNTB0_OFFSET), FixedPcdGet32(PcdTimerPeriod)); + Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); + ASSERT_EFI_ERROR (Status); + + // Install the Timer Architectural Protocol onto a new handle + Status = gBS->InstallMultipleProtocolInterfaces( + &Handle, + &gEfiTimerArchProtocolGuid, &gTimer, + NULL + ); + ASSERT_EFI_ERROR(Status); + + // Register for an ExitBootServicesEvent + Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); + ASSERT_EFI_ERROR (Status); + + return Status; +} diff --git a/SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.inf b/SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.inf new file mode 100755 index 000000000..1c17c2d38 --- /dev/null +++ b/SamsungPlatformPkgOrigen/ExynosPkg/TimerDxe/TimerDxe.inf @@ -0,0 +1,54 @@ +#/** @file +# +# Component discription file for Timer module +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = TimerDxe + FILE_GUID = 494ffd22-3228-4b7e-ad40-7e780fa88301 + MODULE_TYPE = DXE_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = TimerInitialize + +[Sources.common] + TimerDxe.c + +[Packages] + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + + +[LibraryClasses] + BaseLib + IoLib + UefiBootServicesTableLib + UefiDriverEntryPoint + TimerLib + +[Guids] + +[Protocols] + gEfiTimerArchProtocolGuid + gHardwareInterruptProtocolGuid + + +[Pcd.common] + gEmbeddedTokenSpaceGuid.PcdTimerPeriod + gExynosPkgTokenSpaceGuid.PcdPWMTimerBase +[Depex] + gHardwareInterruptProtocolGuid diff --git a/SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc b/SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc new file mode 100644 index 000000000..21b87c542 --- /dev/null +++ b/SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.dsc @@ -0,0 +1,479 @@ +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = OrigenBoard-Exynos + PLATFORM_GUID = 66a5a01d-be0a-4398-9b74-5af4a261381f + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/OrigenBoard-Exynos + SUPPORTED_ARCHITECTURES = ARM + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = SamsungPlatformPkg/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf + +[LibraryClasses.common] +!if $(TARGET) == RELEASE + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +!endif + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf + ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf + ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + EfiResetSystemLib|SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf + EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf + EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf + + # + # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window + # in the debugger will show load and unload commands for symbols. You can cut and paste this + # into the command window to load symbols. We should be able to use a script to do this, but + # the version of RVD I have does not support scripts accessing system memory. + # + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf + DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf + +# +# Assume everything is fixed at build +# + ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf + DebugAgentTimerLib|SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf + EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf + EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + SerialPortLib|SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf + TimerLib|SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf + + # Samsung specific + BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf + DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf + FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf + GdbSerialLib|SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf + + # iky for usb host + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf + +[LibraryClasses.common.SEC] + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf + ArmTrustedMonitorLib|ArmPlatformPkg/Library/ArmTrustedMonitorLibNull/ArmTrustedMonitorLibNull.inf + ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + ArmPlatformSecLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + # L2 Cache Driver + L2X0CacheLib|ArmPlatformPkg/Drivers/PL310L2Cache/PL310L2CacheSec.inf + +!if $(EDK2_SKIP_PEICORE)==1 + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf + LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf +!endif + +[LibraryClasses.common.PEI_CORE] + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + # note: this won't actually work since globals in PEI are not writeable + # need to generate an ARM PEI services table pointer implementation + PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + +[LibraryClasses.common.PEIM] + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + # note: this won't actually work since globals in PEI are not writeable + # need to generate an ARM PEI services table pointer implementation + PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + +[LibraryClasses.common.DXE_CORE] + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + +[LibraryClasses.common.DXE_DRIVER] + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf + +[LibraryClasses.common.UEFI_APPLICATION] + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf + +[LibraryClasses.common.UEFI_DRIVER] + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf +DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf +[LibraryClasses.common.DXE_RUNTIME_DRIVER] + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + +[LibraryClasses.ARM] + # + # It is not possible to prevent the ARM compiler for generic intrinsic functions. + # This library provides the instrinsic functions generate by a given compiler. + # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. + # + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf + +[BuildOptions] + RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb --fpu=softvfp -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + GCC:*_*_ARM_CC_FLAGS = -Os -mword-relocations -mfpu=vfp -ffixed-r8 + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE + gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE + gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE + gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE + gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + +!if $(EDK2_SKIP_PEICORE) == 1 + gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE + gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE +!endif + +[PcdsFixedAtBuild.common] + gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ORIGEN %" + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32 + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 + +# DEBUG_ASSERT_ENABLED 0x01 +# DEBUG_PRINT_ENABLED 0x02 +# DEBUG_CODE_ENABLED 0x04 +# CLEAR_MEMORY_ENABLED 0x08 +# ASSERT_BREAKPOINT_ENABLED 0x10 +# ASSERT_DEADLOOP_ENABLED 0x20 + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f + +# DEBUG_INIT 0x00000001 // Initialization +# DEBUG_WARN 0x00000002 // Warnings +# DEBUG_LOAD 0x00000004 // Load events +# DEBUG_FS 0x00000008 // EFI File system +# DEBUG_POOL 0x00000010 // Alloc & Free's +# DEBUG_PAGE 0x00000020 // Alloc & Free's +# DEBUG_INFO 0x00000040 // Verbose +# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers +# DEBUG_VARIABLE 0x00000100 // Variable +# DEBUG_BM 0x00000400 // Boot Manager +# DEBUG_BLKIO 0x00001000 // BlkIo Driver +# DEBUG_NET 0x00004000 // SNI Driver +# DEBUG_UNDI 0x00010000 // UNDI Driver +# DEBUG_LOADFILE 0x00020000 // UNDI Driver +# DEBUG_EVENT 0x00080000 // Event messages +# DEBUG_ERROR 0x80000000 // Error + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 + gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|"" + gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07 + gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000 + +# +# Optional feature to help prevent EFI memory map fragments +# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob +# Values are in EFI Pages (4K). DXE Core will make sure that +# at least this much of each type of memory can be allocated +# from a single memory range. This way you only end up with +# maximum of two fragements for each type in the memory map +# (the memory used, and the free memory that was prereserved +# but not used). +# + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000 + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x01000000 + # Stacks for MPCores in Secure World + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World + gArmPlatformTokenSpaceGuid.PcdSecGlobalVariableSize|0x100 + + # Stacks for MPCores in Monitor Mode + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x4A000000 # Top of SEC Stack for Monitor World + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x2000 # Stack for each of the 4 CPU cores + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x48000000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 + + # Stacks for MPCores in Normal World + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000 + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x0f + gArmTokenSpaceGuid.PcdArmPrimaryCore|0x00 + gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE + # + # ARM Pcds + # + gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000 + # + # ARM EB PCDS + # + gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000 + gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0x13820000 + gExynosPkgTokenSpaceGuid.PcdCmuBase|0x10030000 + gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0x139d0000 + gExynosPkgTokenSpaceGuid.PcdPmuBase|0x10020000 + gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0x11400000 + gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0x11000000 + gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0x12530000 + gExynosPkgTokenSpaceGuid.PcdSysBase|0x10010000 + gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0x11C00000 + gExynosPkgTokenSpaceGuid.PcdGICBase|0x10500000 + gExynosPkgTokenSpaceGuid.PcdTZPCBase|0x10100000 + # + # ARM PL390 General Interrupt Controller + # + gArmTokenSpaceGuid.PcdGicDistributorBase|0x10490000 + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x10480000 + + # + # ARM OS Loader + # + #gArmTokenSpaceGuid.PcdArmMachineType|2925 + gArmTokenSpaceGuid.PcdArmMachineType |3455 + gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"SD-MMC Booting" + gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x0B917605,0x1002,0x8000)/uImage" + gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"root=/dev/mmcblk0p2 rw rootwait console=ttySAC2,115200n8 init=/linuxrc" + gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1 + gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|L"Samsung Origen Board" + + + +# Use the Serial console (ConIn & ConOut) and the Graphic driver (ConOut) + gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi();VenHw(c5deae31-fad2-4030-841b-cfc9644d2c5b)" + gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" + gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|10 + + # + # ARM L2x0 PCDs + # + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x10502000 + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common] + +# +# SEC +# + ArmPlatformPkg/Sec/Sec.inf + +# +# PEI Phase modules +# +!if $(EDK2_SKIP_PEICORE) == 1 + ArmPlatformPkg/PrePi/PeiMPCore.inf { + + ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf + ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf + } +!else + ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf { + + ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf + } + MdeModulePkg/Core/Pei/PeiMain.inf + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + ArmPlatformPkg/PlatformPei/PlatformPeim.inf + ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + ArmPkg/Drivers/CpuPei/CpuPei.inf + IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf + Nt32Pkg/BootModePei/BootModePei.inf + MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { + + NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + } +!endif + +# +# DXE +# + MdeModulePkg/Core/Dxe/DxeMain.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf + } + + # + # Architectural Protocols + # + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + EmbeddedPkg/SerialDxe/SerialDxe.inf + + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf + SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf + SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf + + # + # Samsung specific Driver + # + ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf + SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf + SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf{ + + ExynosLib|SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf + } + + # + # Semi-hosting filesystem + # + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # Application + # + EmbeddedPkg/Ebl/Ebl.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + ArmPlatformPkg/Bds/Bds.inf + + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf diff --git a/SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf b/SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf new file mode 100644 index 000000000..7b8d05f91 --- /dev/null +++ b/SamsungPlatformPkgOrigen/OrigenBoardPkg/OrigenBoardPkg-Exynos.fdf @@ -0,0 +1,354 @@ +# FLASH layout file for ARM VE. +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + + +[FD.OrigenBoard_EFI] +BaseAddress = 0x43E00000|gArmTokenSpaceGuid.PcdFdBaseAddress +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize +ErasePolarity = 1 +BlockSize = 0x00010000 +NumBlocks = 0x20 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +0x0000000|0x00010000 +gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize +FV = FVMAIN_SEC + +0x00010000|0x00100000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + +0x00110000|0x00010000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +#NV_VARIABLE_STORE +DATA = { + ## This is the EFI_FIRMWARE_VOLUME_HEADER + # ZeroVector [] + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + # FileSystemGuid: gEfiSystemNvDataFvGuid = + # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} + 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, + 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, + # FvLength: 0x20000 + 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + #Signature "_FVH" #Attributes + 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, + #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision + 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02, + #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, + #Blockmap[1]: End + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + ## This is the VARIABLE_STORE_HEADER + #Signature: gEfiVariableGuid = + # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} + 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, + 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, + #Size: 0x10000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xFFB8 + # This can speed up the Variable Dispatch a bit. + 0xB8, 0xFF, 0x00, 0x00, + #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 + 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +} + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FVMAIN_SEC] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/Sec/Sec.inf + + +[FV.FVMAIN] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF EmbeddedPkg/SerialDxe/SerialDxe.inf + + + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf + INF SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf + + # + # ACPI Support + # + + # + # Samsung specific Driver + # + INF SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf + INF SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf + # + # PCI EMULATION + # + # + # Semi-hosting filesystem + # + INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # USB HOST STACK + # + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # UEFI application (Shell Embedded Boot Loader) + # + INF EmbeddedPkg/Ebl/Ebl.inf + + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF ArmPlatformPkg/Bds/Bds.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + +!if $(EDK2_SKIP_PEICORE) == 1 + INF ArmPlatformPkg/PrePi/PeiMPCore.inf +!else + INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf + INF MdeModulePkg/Core/Pei/PeiMain.inf + INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf + INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + INF ArmPkg/Drivers/CpuPei/CpuPei.inf + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf + INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf + INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +!endif + + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + + +################################################################################ +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule are the default +# rules for the different module type. User can add the customized rules to define the +# content of the FFS file. +# +################################################################################ + + +############################################################################ +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # +############################################################################ +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER = $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional |.depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 |.efi +# UI STRING="$(MODULE_NAME)" Optional +# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) +# } +# } +# } +# +############################################################################ + +[Rule.Common.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { + TE TE Align = 32 |.efi + } + +[Rule.Common.PEI_CORE] + FILE PEI_CORE = $(NAMED_GUID) { + TE TE |.efi + UI STRING ="$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM] + FILE PEIM = $(NAMED_GUID) { + PEI_DEPEX PEI_DEPEX Optional |.depex + TE TE |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM.TIANOCOMPRESSED] + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { + PEI_DEPEX PEI_DEPEX Optional |.depex + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.USER_DEFINED.ACPITABLE] + FILE FREEFORM = $(NAMED_GUID) { + RAW ACPI |.acpi + RAW ASL |.aml + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING ="$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_APPLICATION.BINARY] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } diff --git a/SamsungPlatformPkgOrigen/README b/SamsungPlatformPkgOrigen/README new file mode 100644 index 000000000..b34c1baea --- /dev/null +++ b/SamsungPlatformPkgOrigen/README @@ -0,0 +1,67 @@ + +=== SmdkBoard OVERVIEW === + +The SMDK project aims to support firmware for Exynos 4210 Soc using the edk2 +code base. + +=== STATUS === + +Current status: Alpha + +Current capabilities: +* Uefi Boot from SDMMC card + +=== FUTURE PLANS === + +* SUpport for USB + - KeyBoard, Mouse and MassStorage + +=== BUILDING SMDK Board === + +Pre-requisites: +* Build environment capable of build the edk2 MdeModulePkg. +* A properly configured ASL compiler: + - Intel ASL compiler: Available from http://www.acpica.org + - Microsoft ASL compiler: Available from http://www.acpi.info + +Building the iRam_Bl: +The iRam_Bl is the 1st stage bootloader which is executed by the IROM code. +This code is reused from the u-boot project. this image has to be a plane binary image +which will not have any header format. After generating the binary image the checksum is generated +and stored in the same file at a particular offset. that is done by the executable generated with +the iRam_Bl source files. + +To generate the iRAM_Bl image +* Download the u-boot source from git://git.denx.de/u-boot.git by running below command + git clone git://git.denx.de/u-boot.git +* Run following commands + - export ARCH=arm + - export CROSS_COMPILE=/usr/local/arm/gcc-linaro-4.5-2011.03-0/bin/arm-linux-gnueabi- or respective toolchain path + - make smdkv310_config + - make mmc_spl +* the binary "u-boot-mmc-spl.bin" will be generated in the spl directory. +* copy the generated u-boot-mmc-spl.bin to the Uefi Workspace Build/SmdkBoard-Exynos/RELEASE_ARMGCC/FV/ + + +Build the SdmkBoardPkg by running from the Workspace + build -p SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc -a ARM -t ARMGCC -b RELEASE for release version + +Following the edk2 build process, you will find the SMDK binaries +under the $WORKSPACE/Build/*/*/FV directory. You can find the below +mentioned binary image. +* SMDKBOARD_EFI.FD +* u-boot-mmc-spl.bin + +=== RUNNING SmdkBoardPkg on the SMDK v310 board === +* need to be in Linux Environment to do the below procedure +* After inserting the SD card. unmount the card by using the command umount /media/XXXXX. +* copy the u-boot-mmc-spl.bin to the SD/MMC card by using the comand + sudo dd if=Build/SmdkBoard-Exynos/RELEASE_ARMGCC/FV/u-boot-mmc-spl.bin of=/dev/sdc bs=512 seek=1 +* Copy the Uefi Image to SD/MMC with below command from the Workspace. + sudo dd if=Build/SmdkBoard-Exynos/RELEASE_ARMGCC/FV/SMDKBOARD_EFI.fd of=/dev/sdc bs=512 seek=65 +* Now the booting device is ready to be used. +* Insert the SDMMC card in the v310 board reader slot MMC Ch2. +* Connect the Uart cable from the v310 device to the PC terminal. +* POwer ON the Device. +* The boot message should be visible on the termial. +* use option 1 to enter the Embedded Boot loader. diff --git a/SamsungPlatformPkgOrigen/SamsungPlatformPkg.dec b/SamsungPlatformPkgOrigen/SamsungPlatformPkg.dec new file mode 100644 index 000000000..35bceeccc --- /dev/null +++ b/SamsungPlatformPkgOrigen/SamsungPlatformPkg.dec @@ -0,0 +1,40 @@ +#/** @file +# Arm RealView EB package. +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# +# This program and the accompanying materials are licensed and made available under +# the terms and conditions of the BSD License which accompanies this distribution. +# The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + DEC_SPECIFICATION = 0x00010005 + PACKAGE_NAME = SamsungPlatformPkg + PACKAGE_GUID = ec1a4982-4a00-47e7-8df5-69c8ce895427 + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes.common] + +[Guids.common] + +[PcdsFeatureFlag.common] + +[PcdsFixedAtBuild.common] + +[Protocols.common] + gSamsungPlatformGpioProtocolGuid = { 0x82b4b2f7, 0x8c18, 0x4dbe, { 0xb7, 0x2e, 0x6a, 0x59, 0xd4, 0x23, 0x0c, 0x40 }} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/AcpiTables.inf b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/AcpiTables.inf new file mode 100644 index 000000000..a40aac687 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/AcpiTables.inf @@ -0,0 +1,37 @@ +## @file +# Component description file for PlatformAcpiTables module. +# +# ACPI table data and ASL sources required to boot the platform. +# +# Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD +# License which accompanies this distribution. The full text of the license +# may be found at http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +## + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = PlatformAcpiTables + FILE_GUID = 7E374E25-8E01-4FEE-87F2-390C23C606CD + MODULE_TYPE = USER_DEFINED + VERSION_STRING = 1.0 +# +# The following information is for reference only and not required by the +# build tools. +# +# VALID_ARCHITECTURES = +# + +[Sources] + Platform.h + Madt.aslc + Facp.aslc + Facs.aslc + Dsdt.asl +[Packages] + MdePkg/MdePkg.dec diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Dsdt.asl b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Dsdt.asl new file mode 100644 index 000000000..ca2b17275 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Dsdt.asl @@ -0,0 +1,446 @@ +/** @file + Contains root level name space objects for the platform + + Copyright (c) 2008, Intel Corporation. All rights reserved.
+ This program and the accompanying materials are + licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be + found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +DefinitionBlock ("Dsdt.aml", "DSDT", 1, "EXYNOS", "4210 ", 3) { + // + // System Sleep States + // + Name (\_S0, Package () {5, 0, 0, 0}) + Name (\_S4, Package () {1, 0, 0, 0}) + Name (\_S5, Package () {0, 0, 0, 0}) + + // + // System Bus + // + Scope (\_SB) { + // + // PCI Root Bridge + // + Device (PCI0) { + Name (_HID, EISAID ("PNP0A03")) + Name (_ADR, 0x00000000) + Name (_BBN, 0x00) + Name (_UID, 0x00) + + // + // BUS, I/O, and MMIO resources + // + Name (_CRS, ResourceTemplate () { + // Bus number resource (0); the bridge produces bus numbers for its + // subsequent buses + WORDBusNumber ( + ResourceProducer, // bit 0 of general flags is 1 + MinFixed, // Range is fixed + MaxFixed, // Range is fixed + PosDecode, // PosDecode + 0x0000, // Granularity + 0x0000, // Min + 0x00FF, // Max + 0x0000, // Translation + 0x0100 // Range Length = Max-Min+1 + ) + + //Consumed resource (0xCF8-0xCFF) + IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) + + // Consumed-and-produced resource (all I/O below CF8) + WORDIO ( + ResourceProducer, // bit 0 of general flags is 0 + MinFixed, // Range is fixed + MaxFixed, // Range is fixed + PosDecode, + EntireRange, + 0x0000, // Granularity + 0x0000, // Min + 0x0CF7, // Max + 0x0000, // Translation + 0x0CF8 // Range Length + ) + + WORDIO ( // Consumed-and-produced resource + // (all I/O above CFF) + ResourceProducer, // bit 0 of general flags is 0 + MinFixed, // Range is fixed + MaxFixed, // Range is fixed + PosDecode, + EntireRange, + 0x0000, // Granularity + 0x0D00, // Min + 0xFFFF, // Max + 0x0000, // Translation + 0xF300 // Range Length + ) + + DWORDMEMORY ( // Descriptor for legacy VGA video RAM + ResourceProducer, // bit 0 of general flags is 0 + PosDecode, + MinFixed, // Range is fixed + MaxFixed, // Range is Fixed + Cacheable, + ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Min + 0x000BFFFF, // Max + 0x00000000, // Translation + 0x00020000 // Range Length + ) + + DWORDMEMORY ( // Descriptor for linear frame buffer video RAM + ResourceProducer, // bit 0 of general flags is 0 + PosDecode, + MinFixed, // Range is fixed + MaxFixed, // Range is Fixed + Cacheable, + ReadWrite, + 0x00000000, // Granularity + 0xF8000000, // Min + 0xFFFBFFFF, // Max + 0x00000000, // Translation + 0x07FC0000 // Range Length + ) + }) + + // + // PCI Interrupt Routing Table - PIC Mode Only + // + Method (_PRT, 0, NotSerialized) { + Return ( + Package () { + // + // Bus 0, Device 1 + // + Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, + // + // Bus 0, Device 3 + // + Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00}, + Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00}, + Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00}, + Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00}, + } + ) + } + + // + // PCI to ISA Bridge (Bus 0, Device 1, Function 0) + // + Device (LPC) { + Name (_ADR, 0x00010000) + + // + // PCI Interrupt Routing Configuration Registers + // + OperationRegion (PRR0, PCI_Config, 0x60, 0x04) + Field (PRR0, ANYACC, NOLOCK, PRESERVE) { + PIRA, 8, + PIRB, 8, + PIRC, 8, + PIRD, 8 + } + + // + // _STA method for LNKA, LNKB, LNKC, LNKD + // + Method (PSTA, 1, NotSerialized) { + If (And (Arg0, 0x80)) { + Return (0x9) + } Else { + Return (0xB) + } + } + + // + // _DIS method for LNKA, LNKB, LNKC, LNKD + // + Method (PDIS, 1, NotSerialized) { + Or (Arg0, 0x80, Arg0) + } + + // + // _CRS method for LNKA, LNKB, LNKC, LNKD + // + Method (PCRS, 1, NotSerialized) { + Name (BUF0, ResourceTemplate () {IRQ (Level, ActiveLow, Shared){0}}) + // + // Define references to buffer elements + // + CreateWordField (BUF0, 0x01, IRQW) // IRQ low + // + // Write current settings into IRQ descriptor + // + If (And (Arg0, 0x80)) { + Store (Zero, Local0) + } Else { + Store (One, Local0) + } + // + // Shift 1 by value in register 70 + // + ShiftLeft (Local0, And (Arg0, 0x0F), IRQW) // Save in buffer + Return (BUF0) // Return Buf0 + } + + // + // _PRS resource for LNKA, LNKB, LNKC, LNKD + // + Name (PPRS, ResourceTemplate () { + IRQ (Level, ActiveLow, Shared) {3, 4, 5, 7, 9, 10, 11, 12, 14, 15} + }) + + // + // _SRS method for LNKA, LNKB, LNKC, LNKD + // + Method (PSRS, 2, NotSerialized) { + CreateWordField (Arg1, 0x01, IRQW) // IRQ low + FindSetRightBit (IRQW, Local0) // Set IRQ + If (LNotEqual (IRQW, Zero)) { + And (Local0, 0x7F, Local0) + Decrement (Local0) + } Else { + Or (Local0, 0x80, Local0) + } + Store (Local0, Arg0) + } + + // + // PCI IRQ Link A + // + Device (LNKA) { + Name (_HID, EISAID("PNP0C0F")) + Name (_UID, 1) + + Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) } + Method (_DIS, 0, NotSerialized) { PDIS (PIRA) } + Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) } + Method (_PRS, 0, NotSerialized) { Return (PPRS) } + Method (_SRS, 1, NotSerialized) { PSRS (PIRA, Arg0) } + } + + // + // PCI IRQ Link B + // + Device (LNKB) { + Name (_HID, EISAID("PNP0C0F")) + Name (_UID, 2) + + Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) } + Method (_DIS, 0, NotSerialized) { PDIS (PIRB) } + Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) } + Method (_PRS, 0, NotSerialized) { Return (PPRS) } + Method (_SRS, 1, NotSerialized) { PSRS (PIRB, Arg0) } + } + + // + // PCI IRQ Link C + // + Device (LNKC) { + Name (_HID, EISAID("PNP0C0F")) + Name (_UID, 3) + + Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) } + Method (_DIS, 0, NotSerialized) { PDIS (PIRC) } + Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) } + Method (_PRS, 0, NotSerialized) { Return (PPRS) } + Method (_SRS, 1, NotSerialized) { PSRS (PIRC, Arg0) } + } + + // + // PCI IRQ Link D + // + Device (LNKD) { + Name (_HID, EISAID("PNP0C0F")) + Name (_UID, 1) + + Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) } + Method (_DIS, 0, NotSerialized) { PDIS (PIRD) } + Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) } + Method (_PRS, 0, NotSerialized) { Return (PPRS) } + Method (_SRS, 1, NotSerialized) { PSRS (PIRD, Arg0) } + } + + // + // Programmable Interrupt Controller (PIC) + // + Device(PIC) { + Name (_HID, EISAID ("PNP0000")) + Name (_CRS, ResourceTemplate () { + IO (Decode16, 0x020, 0x020, 0x00, 0x02) + IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02) + IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02) + IRQNoFlags () {2} + }) + } + + // + // ISA DMA + // + Device (DMAC) { + Name (_HID, EISAID ("PNP0200")) + Name (_CRS, ResourceTemplate () { + IO (Decode16, 0x00, 0x00, 0, 0x10) + IO (Decode16, 0x81, 0x81, 0, 0x03) + IO (Decode16, 0x87, 0x87, 0, 0x01) + IO (Decode16, 0x89, 0x89, 0, 0x03) + IO (Decode16, 0x8f, 0x8f, 0, 0x01) + IO (Decode16, 0xc0, 0xc0, 0, 0x20) + DMA (Compatibility, NotBusMaster, Transfer8) {4} + }) + } + + // + // 8254 Timer + // + Device(TMR) { + Name(_HID,EISAID("PNP0100")) + Name(_CRS, ResourceTemplate () { + IO (Decode16, 0x40, 0x40, 0x00, 0x04) + IRQNoFlags () {0} + }) + } + + // + // Real Time Clock + // + Device (RTC) { + Name (_HID, EISAID ("PNP0B00")) + Name (_CRS, ResourceTemplate () { + IO (Decode16, 0x70, 0x70, 0x00, 0x02) + IRQNoFlags () {8} + }) + } + + // + // PCAT Speaker + // + Device(SPKR) { + Name (_HID, EISAID("PNP0800")) + Name (_CRS, ResourceTemplate () { + IO (Decode16, 0x61, 0x61, 0x01, 0x01) + }) + } + + // + // Floating Point Coprocessor + // + Device(FPU) { + Name (_HID, EISAID("PNP0C04")) + Name (_CRS, ResourceTemplate () { + IO (Decode16, 0xF0, 0xF0, 0x00, 0x10) + IRQNoFlags () {13} + }) + } + + // + // Generic motherboard devices and pieces that don't fit anywhere else + // + Device(XTRA) { + Name (_HID, EISAID ("PNP0C02")) + Name (_UID, 0x01) + Name (_CRS, ResourceTemplate () { + IO (Decode16, 0x010, 0x010, 0x00, 0x10) + IO (Decode16, 0x022, 0x022, 0x00, 0x1E) + IO (Decode16, 0x044, 0x044, 0x00, 0x1C) + IO (Decode16, 0x062, 0x062, 0x00, 0x02) + IO (Decode16, 0x065, 0x065, 0x00, 0x0B) + IO (Decode16, 0x072, 0x072, 0x00, 0x0E) + IO (Decode16, 0x080, 0x080, 0x00, 0x01) + IO (Decode16, 0x084, 0x084, 0x00, 0x03) + IO (Decode16, 0x088, 0x088, 0x00, 0x01) + IO (Decode16, 0x08c, 0x08c, 0x00, 0x03) + IO (Decode16, 0x090, 0x090, 0x00, 0x10) + IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E) + IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10) + IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10) + IO (Decode16, 0x160, 0x160, 0x00, 0x10) + IO (Decode16, 0x278, 0x278, 0x00, 0x08) + IO (Decode16, 0x370, 0x370, 0x00, 0x02) + IO (Decode16, 0x378, 0x378, 0x00, 0x08) + IO (Decode16, 0x400, 0x400, 0x00, 0x40) // PMBLK1 + IO (Decode16, 0x440, 0x440, 0x00, 0x10) + IO (Decode16, 0x678, 0x678, 0x00, 0x08) + IO (Decode16, 0x778, 0x778, 0x00, 0x08) + Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000) // IO APIC + Memory32Fixed (ReadOnly, 0xFEE00000, 0x1000) + }) + } + + // + // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102 + // + Device (PS2K) { + Name (_HID, EISAID ("PNP0303")) + Name (_CID, EISAID ("PNP030B")) + Name(_CRS,ResourceTemplate() { + IO (Decode16, 0x60, 0x60, 0x00, 0x01) + IO (Decode16, 0x64, 0x64, 0x00, 0x01) + IRQNoFlags () {1} + }) + } + + // + // PS/2 Mouse and Microsoft Mouse + // + Device (PS2M) { // PS/2 stype mouse port + Name (_HID, EISAID ("PNP0F03")) + Name (_CID, EISAID ("PNP0F13")) + Name (_CRS, ResourceTemplate() { + IRQNoFlags () {12} + }) + } + + // + // UART Serial Port - COM1 + // + Device (UAR1) { + Name (_HID, EISAID ("PNP0501")) + Name (_DDN, "COM1") + Name (_UID, 0x01) + Name(_CRS,ResourceTemplate() { + IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08) + IRQ (Edge, ActiveHigh, Exclusive, ) {4} + }) + } + + // + // UART Serial Port - COM2 + // + Device (UAR2) { + Name (_HID, EISAID ("PNP0501")) + Name (_DDN, "COM2") + Name (_UID, 0x02) + Name(_CRS,ResourceTemplate() { + IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08) + IRQ (Edge, ActiveHigh, Exclusive, ) {3} + }) + } + + // + // Floppy Disk Controller + // + Device (FDC) { + Name (_HID, EISAID ("PNP0700")) + Name (_CRS,ResourceTemplate() { + IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06) + IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01) + IRQNoFlags () {6} + DMA (Compatibility, NotBusMaster, Transfer8) {2} + }) + } + } + } + } +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facp.aslc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facp.aslc new file mode 100644 index 000000000..593861eb6 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facp.aslc @@ -0,0 +1,79 @@ +/** @file + FACP Table + + Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
+ This program and the accompanying materials are + licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be + found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include "Platform.h" + +EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { + EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE, + sizeof (EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE), + EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION, + 0, // to make sum of entire table == 0 + EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long field + EFI_ACPI_OEM_TABLE_ID, // OEM table identification(8 bytes long) + EFI_ACPI_OEM_REVISION, // OEM revision number + EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID + EFI_ACPI_CREATOR_REVISION, // ASL compiler revision number + 0, // Physical addesss of FACS + 0, // Physical address of DSDT + INT_MODEL, // System Interrupt Model + RESERVED, // reserved + SCI_INT_VECTOR, // System vector of SCI interrupt + SMI_CMD_IO_PORT, // Port address of SMI command port + ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI + ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI + S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state + 0xE2, // PState control + PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk + PM1b_EVT_BLK, // Port address of Power Mgt 1b Event Reg Blk + PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk + PM1b_CNT_BLK, // Port address of Power Mgt 1b Ctrl Reg Blk + PM2_CNT_BLK, // Port address of Power Mgt 2 Ctrl Reg Blk + PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk + GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk + GPE1_BLK, // Port addr of General Purpose Event 1 Reg Blk + PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk + PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk + PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk + PM_TM_LEN, // Byte Length of ports at pm_tm_blk + GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk + GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk + GPE1_BASE, // offset in gpe model where gpe1 events start + 0xE3, // _CST support + P_LVL2_LAT, // worst case HW latency to enter/exit C2 state + P_LVL3_LAT, // worst case HW latency to enter/exit C3 state + FLUSH_SIZE, // Size of area read to flush caches + FLUSH_STRIDE, // Stride used in flushing caches + DUTY_OFFSET, // bit location of duty cycle field in p_cnt reg + DUTY_WIDTH, // bit width of duty cycle field in p_cnt reg + DAY_ALRM, // index to day-of-month alarm in RTC CMOS RAM + MON_ALRM, // index to month-of-year alarm in RTC CMOS RAM + CENTURY, // index to century in RTC CMOS RAM + 0x03, // Boot architecture flag + 0x00, // Boot architecture flag + RESERVED, // reserved + FLAG +}; + + +VOID* +ReferenceAcpiTable ( + VOID + ) +{ + // + // Reference the table being generated to prevent the optimizer from + // removing the data structure from the exeutable + // + return (VOID*)&FACP; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facs.aslc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facs.aslc new file mode 100644 index 000000000..2d2129c42 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Facs.aslc @@ -0,0 +1,81 @@ +/** @file + FACS Table + + Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
+ This program and the accompanying materials are + licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be + found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE FACS = { + EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE, + sizeof (EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE), + + // + // Hardware Signature will be updated at runtime + // + 0x00000000, + 0x00, + 0x00, + 0x00, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE, + EFI_ACPI_RESERVED_BYTE +}; + + +VOID* +ReferenceAcpiTable ( + VOID + ) +{ + // + // Reference the table being generated to prevent the optimizer from + // removing the data structure from the exeutable + // + return (VOID*)&FACS; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Madt.aslc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Madt.aslc new file mode 100644 index 000000000..7e360dd69 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Madt.aslc @@ -0,0 +1,158 @@ +/** @file + MADT Table + + This file contains a structure definition for the ACPI 1.0 Multiple APIC + Description Table (MADT). + + Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.
+ This program and the accompanying materials are + licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be + found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +// +// MADT Definitions +// +#define EFI_ACPI_OEM_MADT_REVISION 0x00000000 // TBD + +// +// Local APIC address +// +#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000 // TBD + +// +// Multiple APIC Flags are defined in AcpiX.0.h +// +#define EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_1_0_PCAT_COMPAT) + +// +// Define the number of each table type. +// This is where the table layout is modified. +// +#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT 1 +#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT 2 +#define EFI_ACPI_IO_APIC_COUNT 1 + +// +// Ensure proper structure formats +// +#pragma pack (1) + +// +// ACPI 1.0 MADT structure +// +typedef struct { + EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header; + +#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0 + EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE \ + LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT]; +#endif + +#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0 + EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE \ + Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT]; +#endif + +#if EFI_ACPI_IO_APIC_COUNT > 0 + EFI_ACPI_1_0_IO_APIC_STRUCTURE \ + IoApic[EFI_ACPI_IO_APIC_COUNT]; +#endif + +} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE; + +#pragma pack () + +// +// Multiple APIC Description Table +// +EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = { + EFI_ACPI_1_0_APIC_SIGNATURE, + sizeof (EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE), + EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION, + + // + // Checksum will be updated at runtime + // + 0x00, + + // + // It is expected that these values will be programmed at runtime + // + 'E', 'X', 'Y', 'N', 'O', 'S', + + 0x30313234, + EFI_ACPI_OEM_MADT_REVISION, + 0, + 0, + + // + // MADT specific fields + // + EFI_ACPI_LOCAL_APIC_ADDRESS, + EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS, + + // + // Processor Local APIC Structure + // + + EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC, // Type + sizeof (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE), // Length + 0x01, // Processor ID + 0x00, // Local APIC ID + 0x00000001, // Flags - Enabled by default + + // + // Interrupt Source Override Structure + // + + // + // IRQ0=>IRQ2 Interrupt Source Override Structure + // + EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE, // Type + sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length + 0x00, // Bus - ISA + 0x00, // Source - IRQ0 + 0x00000002, // Global System Interrupt - IRQ2 + 0x0000, // Flags - Conforms to specifications of the bus + + // + // ISO (SCI Active High) Interrupt Source Override Structure + // + EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE, // Type + sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length + 0x00, // Bus - ISA + 0x09, // Source - IRQ0 + 0x00000009, // Global System Interrupt - IRQ2 + 0x000D, // Flags - Level-tiggered, Active High + + // + // IO APIC Structure + // + EFI_ACPI_1_0_IO_APIC, // Type + sizeof (EFI_ACPI_1_0_IO_APIC_STRUCTURE), // Length + 0x02, // IO APIC ID + EFI_ACPI_RESERVED_BYTE, // Reserved + 0xFEC00000, // IO APIC Address (physical) + 0x00000000 // Global System Interrupt Base +}; + + +VOID* +ReferenceAcpiTable ( + VOID + ) +{ + // + // Reference the table being generated to prevent the optimizer from + // removing the data structure from the exeutable + // + return (VOID*)&Madt; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Platform.h b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Platform.h new file mode 100644 index 000000000..307983933 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/AcpiTables/Platform.h @@ -0,0 +1,66 @@ +/** @file + Platform specific defines for constructing ACPI tables + + Copyright (c) 2008, Intel Corporation. All rights reserved.
+ This program and the accompanying materials are + licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be + found at http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _Platform_h_INCLUDED_ +#define _Platform_h_INCLUDED_ + +#include +#include + +// +// ACPI table information used to initialize tables. +// +#define EFI_ACPI_OEM_ID 'E','X','Y','N','O','S' // OEMID 6 bytes long +// OEM table id 8 bytes long +#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64('4','2','1','0',' ',' ',' ',' ') +#define EFI_ACPI_OEM_REVISION 0x02000820 +#define EFI_ACPI_CREATOR_ID SIGNATURE_32('S','M','D','K') +#define EFI_ACPI_CREATOR_REVISION 0x00000097 + +#define INT_MODEL 0x01 +#define SCI_INT_VECTOR 0x0009 +#define SMI_CMD_IO_PORT 0 // If SMM was supported, then this would be 0xB2 +#define ACPI_ENABLE 0x0E1 +#define ACPI_DISABLE 0x01E +#define S4BIOS_REQ 0x00 +#define PM1a_EVT_BLK 0x00000400 +#define PM1b_EVT_BLK 0x00000000 +#define PM1a_CNT_BLK 0x00000404 +#define PM1b_CNT_BLK 0x00000000 +#define PM2_CNT_BLK 0x00000022 +#define PM_TMR_BLK 0x00000408 +#define GPE0_BLK 0x0000040C +#define GPE1_BLK 0x00000000 +#define PM1_EVT_LEN 0x04 +#define PM1_CNT_LEN 0x02 +#define PM2_CNT_LEN 0x01 +#define PM_TM_LEN 0x04 +#define GPE0_BLK_LEN 0x04 +#define GPE1_BLK_LEN 0x00 +#define GPE1_BASE 0x00 +#define RESERVED 0x00 +#define P_LVL2_LAT 0x0065 +#define P_LVL3_LAT 0x03E9 +#define FLUSH_SIZE 0x0400 +#define FLUSH_STRIDE 0x0010 +#define DUTY_OFFSET 0x00 +#define DUTY_WIDTH 0x00 +#define DAY_ALRM 0x0D +#define MON_ALRM 0x00 +#define CENTURY 0x00 +#define FLAG EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | \ + EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4 | \ + EFI_ACPI_1_0_TMR_VAL_EXT + +#endif diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc new file mode 100644 index 000000000..281c99b4a --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EBLoadSecSyms.inc @@ -0,0 +1,15 @@ +// returns the base address of the SEC FV in flash on the EB board +// change this address for where your platform's SEC FV is located +// (or make it more intelligent to search for it) +define /r FindFv() +{ + return 0x40000000; +} +. + +include /s 'ZZZZZZ/EfiFuncs.inc' +error=continue +unload ,all +error=abort +LoadPeiSec() +include C:\loadfiles.inc diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc new file mode 100644 index 000000000..014d09440 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/EfiFuncs.inc @@ -0,0 +1,463 @@ +error=abort + +// NOTE: THIS MAY NEED TO BE ADJUSTED +// change to reflect the total amount of ram in your system +define /r GetMaxMem() +{ + return 0x10000000; // 256 MB +} +. + +define /r GetWord(Addr) +{ + unsigned long data; + + if( (Addr & 0x2) == 0 ) + { + data = dword(Addr); + data = data & 0xffff; + //$printf "getword data is %x\n", data$; + return data; + } + else + { + data = dword(Addr & 0xfffffffc); + //data = data >> 16; + data = data / 0x10000; + //$printf "getword data is %x (1)\n", data$; + return data; + } +} +. + +define /r ProcessPE32(imgstart) +unsigned long imgstart; +{ + unsigned long filehdrstart; + unsigned long debugdirentryrva; + unsigned long debugtype; + unsigned long debugrva; + unsigned long dwarfsig; + unsigned long baseofcode; + unsigned long baseofdata; + unsigned long elfbase; + char *elfpath; + + $printf "PE32 image found at %x",imgstart$; + + //$printf "PE file hdr offset %x",dword(imgstart+0x3C)$; + + // offset from dos hdr to PE file hdr + filehdrstart = imgstart + dword(imgstart+0x3C); + + // offset to debug dir in PE hdrs + //$printf "debug dir is at %x",(filehdrstart+0xA8)$; + debugdirentryrva = dword(filehdrstart + 0xA8); + if(debugdirentryrva == 0) + { + $printf "no debug dir for image at %x",imgstart$; + return; + } + + //$printf "debug dir entry rva is %x",debugdirentryrva$; + + debugtype = dword(imgstart + debugdirentryrva + 0xc); + if( (debugtype != 0xdf) && (debugtype != 0x2) ) + { + $printf "debug type is not dwarf for image at %x",imgstart$; + $printf "debug type is %x",debugtype$; + return; + } + + debugrva = dword(imgstart + debugdirentryrva + 0x14); + dwarfsig = dword(imgstart + debugrva); + if(dwarfsig != 0x66727764) + { + $printf "dwarf debug signature not found for image at %x",imgstart$; + return; + } + + elfpath = (char *)(imgstart + debugrva + 0xc); + + baseofcode = imgstart + dword(filehdrstart + 0x28); + baseofdata = imgstart + dword(filehdrstart + 0x2c); + + if( (baseofcode < baseofdata) && (baseofcode != 0) ) + { + elfbase = baseofcode; + } + else + { + elfbase = baseofdata; + } + + $printf "found path %s",elfpath$; + $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$; +} +. + +define /r ProcessTE(imgstart) +unsigned long imgstart; +{ + unsigned long strippedsize; + unsigned long debugdirentryrva; + unsigned long debugtype; + unsigned long debugrva; + unsigned long dwarfsig; + unsigned long elfbase; + char *elfpath; + + $printf "TE image found at %x",imgstart$; + + // determine pe header bytes removed to account for in rva references + //strippedsize = word(imgstart + 0x6); + //strippedsize = (dword(imgstart + 0x4) & 0xffff0000) >> 16; + strippedsize = (dword(imgstart + 0x4) & 0xffff0000) / 0x10000; + strippedsize = strippedsize - 0x28; + + debugdirentryrva = dword(imgstart + 0x20); + if(debugdirentryrva == 0) + { + $printf "no debug dir for image at %x",imgstart$; + return; + } + debugdirentryrva = debugdirentryrva - strippedsize; + + //$printf "debug dir entry rva is %x",debugdirentryrva$; + + debugtype = dword(imgstart + debugdirentryrva + 0xc); + if( (debugtype != 0xdf) && (debugtype != 0x2) ) + { + $printf "debug type is not dwarf for image at %x",imgstart$; + $printf "debug type is %x",debugtype$; + return; + } + + debugrva = dword(imgstart + debugdirentryrva + 0x14); + debugrva = debugrva - strippedsize; + dwarfsig = dword(imgstart + debugrva); + if( (dwarfsig != 0x66727764) && (dwarfsig != 0x3031424e) ) + { + $printf "dwarf debug signature not found for image at %x",imgstart$; + $printf "found %x", dwarfsig$; + return; + } + + if( dwarfsig == 0x66727764 ) + { + elfpath = (char *)(imgstart + debugrva + 0xc); + $printf "looking for elf path at 0x%x", elfpath$; + } + else + { + elfpath = (char *)(imgstart + debugrva + 0x10); + $printf "looking for elf path at 0x%x", elfpath$; + } + + // elf base is baseofcode (we hope that for TE images it's not baseofdata) + elfbase = imgstart + dword(imgstart + 0xc) - strippedsize; + + $printf "found path %s",elfpath$; + $fprintf 50, "load /ni /np /a %s &0x%x\n",elfpath,elfbase$; +} +. + +define /r ProcessFvSection(secstart) +unsigned long secstart; +{ + unsigned long sectionsize; + unsigned char sectiontype; + + sectionsize = dword(secstart); + //sectiontype = (sectionsize & 0xff000000) >> 24; + sectiontype = (sectionsize & 0xff000000) / 0x1000000; + sectionsize = sectionsize & 0x00ffffff; + + $printf "fv section at %x size %x type %x",secstart,sectionsize,sectiontype$; + + if(sectiontype == 0x10) // PE32 + { + ProcessPE32(secstart+0x4); + } + else if(sectiontype == 0x12) // TE + { + ProcessTE(secstart+0x4); + } +} +. + +define /r ProcessFfsFile(ffsfilestart) +unsigned long ffsfilestart; +{ + unsigned long ffsfilesize; + unsigned long ffsfiletype; + unsigned long secoffset; + unsigned long secsize; + + //ffsfiletype = byte(ffsfilestart + 0x12); + ffsfilesize = dword(ffsfilestart + 0x14); + //ffsfiletype = (ffsfilesize & 0xff000000) >> 24; + ffsfiletype = (ffsfilesize & 0xff000000) / 0x1000000; + ffsfilesize = ffsfilesize & 0x00ffffff; + + if(ffsfiletype == 0xff) return; + + $printf "ffs file at %x size %x type %x",ffsfilestart,ffsfilesize,ffsfiletype$; + + secoffset = ffsfilestart + 0x18; + + // loop through sections in file + while(secoffset < (ffsfilestart + ffsfilesize)) + { + // process fv section and increment section offset by size + secsize = dword(secoffset) & 0x00ffffff; + ProcessFvSection(secoffset); + secoffset = secoffset + secsize; + + // align to next 4 byte boundary + if( (secoffset & 0x3) != 0 ) + { + secoffset = secoffset + (0x4 - (secoffset & 0x3)); + } + } // end section loop +} +. + +define /r LoadPeiSec() +{ + unsigned long fvbase; + unsigned long fvlen; + unsigned long fvsig; + unsigned long ffsoffset; + unsigned long ffsfilesize; + + fvbase = FindFv(); + $printf "fvbase %x",fvbase$; + + // get fv signature field + fvsig = dword(fvbase + 0x28); + if(fvsig != 0x4856465F) + { + $printf "FV does not have proper signature, exiting"$; + return 0; + } + + $printf "FV signature found"$; + + $fopen 50, 'C:\loadfiles.inc'$; + + fvlen = dword(fvbase + 0x20); + + // first ffs file is after fv header, use headerlength field + //ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) >> 16; + ffsoffset = (dword(fvbase + 0x30) & 0xffff0000) / 0x10000; + ffsoffset = fvbase + GetWord(fvbase + 0x30); + + // loop through ffs files + while(ffsoffset < (fvbase+fvlen)) + { + // process ffs file and increment by ffs file size field + ProcessFfsFile(ffsoffset); + ffsfilesize = (dword(ffsoffset + 0x14) & 0x00ffffff); + if(ffsfilesize == 0) + { + break; + } + ffsoffset = ffsoffset + ffsfilesize; + + + // align to next 8 byte boundary + if( (ffsoffset & 0x7) != 0 ) + { + ffsoffset = ffsoffset + (0x8 - (ffsoffset & 0x7)); + } + + } // end fv ffs loop + + $vclose 50$; + +} +. + +define /r FindSystemTable(TopOfRam) +unsigned long TopOfRam; +{ + unsigned long offset; + + $printf "FindSystemTable"$; + $printf "top of mem is %x",TopOfRam$; + + offset = TopOfRam; + + // align to highest 4MB boundary + offset = offset & 0xFFC00000; + + // start at top and look on 4MB boundaries for system table ptr structure + while(offset > 0) + { + //$printf "checking %x",offset$; + //$printf "value is %x",dword(offset)$; + + // low signature match + if(dword(offset) == 0x20494249) + { + // high signature match + if(dword(offset+4) == 0x54535953) + { + // less than 4GB? + if(dword(offset+0x0c) == 0) + { + // less than top of ram? + if(dword(offset+8) < TopOfRam) + { + return(dword(offset+8)); + } + } + } + + } + + if(offset < 0x400000) break; + offset = offset - 0x400000; + } + + return 0; +} +. + +define /r ProcessImage(ImageBase) +unsigned long ImageBase; +{ + $printf "ProcessImage %x", ImageBase$; +} +. + +define /r FindDebugInfo(SystemTable) +unsigned long SystemTable; +{ + unsigned long CfgTableEntries; + unsigned long ConfigTable; + unsigned long i; + unsigned long offset; + unsigned long dbghdr; + unsigned long dbgentries; + unsigned long dbgptr; + unsigned long dbginfo; + unsigned long loadedimg; + + $printf "FindDebugInfo"$; + + dbgentries = 0; + CfgTableEntries = dword(SystemTable + 0x40); + ConfigTable = dword(SystemTable + 0x44); + + $printf "config table is at %x (%d entries)", ConfigTable, CfgTableEntries$; + + // now search for debug info entry with guid 49152E77-1ADA-4764-B7A2-7AFEFED95E8B + // 0x49152E77 0x47641ADA 0xFE7AA2B7 0x8B5ED9FE + for(i=0; i +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +error = continue +unload +error = abort + +setreg @CP15_CONTROL = 0x0005107E +setreg @pc=0x80008208 +setreg @cpsr=0x000000D3 +dis/D +readfile,raw,nowarn "ZZZZZZ/FV/BEAGLEBOARD_EFI.fd"=0x80008000 diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh new file mode 100644 index 000000000..46dd65cf3 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_convert_symbols.sh @@ -0,0 +1,22 @@ +#!/bin/sh +# +# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http:#opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + + +IN=`/usr/bin/cygpath -u $1` +OUT=`/usr/bin/cygpath -u $2` + +/usr/bin/sed -e "s/\/cygdrive\/\(.\)/load\/a\/ni\/np \"\1:/g" \ + -e 's:\\:/:g' \ + -e "s/^/load\/a\/ni\/np \"/g" \ + -e "s/dll /dll\" \&/g" \ + $IN | /usr/bin/sort.exe --key=3 --output=$OUT diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc new file mode 100644 index 000000000..c03a443e8 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_hw_setup.inc @@ -0,0 +1,67 @@ +// +// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// + +error = continue +unload +error = abort + +setreg @CP15_CONTROL = 0x0005107E +setreg @cpsr=0x000000D3 + +; General clock settings. +setmem /32 0x48307270=0x00000080 +setmem /32 0x48306D40=0x00000003 +setmem /32 0x48005140=0x03020A50 + +;Clock configuration +setmem /32 0x48004A40=0x0000030A +setmem /32 0x48004C40=0x00000015 + +;DPLL3 (Core) settings +setmem /32 0x48004D00=0x00370037 +setmem /32 0x48004D30=0x00000000 +setmem /32 0x48004D40=0x094C0C00 + +;DPLL4 (Peripheral) settings +setmem /32 0x48004D00=0x00370037 +setmem /32 0x48004D30=0x00000000 +setmem /32 0x48004D44=0x0001B00C +setmem /32 0x48004D48=0x00000009 + +;DPLL1 (MPU) settings +setmem /32 0x48004904=0x00000037 +setmem /32 0x48004934=0x00000000 +setmem /32 0x48004940=0x0011F40C +setmem /32 0x48004944=0x00000001 +setmem /32 0x48004948=0x00000000 + +;RAM setup. +setmem /16 0x6D000010=0x0000 +setmem /16 0x6D000040=0x0001 +setmem /16 0x6D000044=0x0100 +setmem /16 0x6D000048=0x0000 +setmem /32 0x6D000060=0x0000000A +setmem /32 0x6D000070=0x00000081 +setmem /16 0x6D000040=0x0003 +setmem /32 0x6D000080=0x02D04011 +setmem /16 0x6D000084=0x0032 +setmem /16 0x6D00008C=0x0000 +setmem /32 0x6D00009C=0xBA9DC4C6 +setmem /32 0x6D0000A0=0x00012522 +setmem /32 0x6D0000A4=0x0004E201 +setmem /16 0x6D000040=0x0003 +setmem /32 0x6D0000B0=0x02D04011 +setmem /16 0x6D0000B4=0x0032 +setmem /16 0x6D0000BC=0x0000 +setmem /32 0x6D0000C4=0xBA9DC4C6 +setmem /32 0x6D0000C8=0x00012522 +setmem /32 0x6D0000D4=0x0004E201 \ No newline at end of file diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc new file mode 100644 index 000000000..a8f98433d --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_load_symbols.inc @@ -0,0 +1,21 @@ +// +// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// + +include 'ZZZZZZ/rvi_symbols_macros.inc' + +macro write_symbols_file("ZZZZZZ/rvi_symbols.tmp", 0x00000000, 0x10000000) + +host "bash -o igncr ZZZZZZ/rvi_convert_symbols.sh ZZZZZZ/rvi_symbols.tmp ZZZZZZ/rvi_symbols.inc" +include 'ZZZZZZ/rvi_symbols.inc' +load /NI /NP 'ZZZZZZ/rvi_dummy.axf' ;.constdata +unload rvi_dummy.axf +delfile rvi_dummy.axf diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc new file mode 100644 index 000000000..6f7377cbb --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_symbols_macros.inc @@ -0,0 +1,193 @@ +// +// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// + +define /R int compare_guid(guid1, guid2) + unsigned char *guid1; + unsigned char *guid2; +{ + return strncmp(guid1, guid2, 16); +} +. + +define /R unsigned char * find_system_table(mem_start, mem_size) + unsigned char *mem_start; + unsigned long mem_size; +{ + unsigned char *mem_ptr; + + mem_ptr = mem_start + mem_size; + + do + { + mem_ptr -= 0x400000; // 4 MB + + if (strncmp(mem_ptr, "IBI SYST", 8) == 0) + { + return *(unsigned long *)(mem_ptr + 8); // EfiSystemTableBase + } + + } while (mem_ptr > mem_start); + + return 0; +} +. + +define /R unsigned char * find_debug_info_table_header(system_table) + unsigned char *system_table; +{ + unsigned long configuration_table_entries; + unsigned char *configuration_table; + unsigned long index; + unsigned char debug_table_guid[16]; + + // Fill in the debug table's guid + debug_table_guid[ 0] = 0x77; + debug_table_guid[ 1] = 0x2E; + debug_table_guid[ 2] = 0x15; + debug_table_guid[ 3] = 0x49; + debug_table_guid[ 4] = 0xDA; + debug_table_guid[ 5] = 0x1A; + debug_table_guid[ 6] = 0x64; + debug_table_guid[ 7] = 0x47; + debug_table_guid[ 8] = 0xB7; + debug_table_guid[ 9] = 0xA2; + debug_table_guid[10] = 0x7A; + debug_table_guid[11] = 0xFE; + debug_table_guid[12] = 0xFE; + debug_table_guid[13] = 0xD9; + debug_table_guid[14] = 0x5E; + debug_table_guid[15] = 0x8B; + + configuration_table_entries = *(unsigned long *)(system_table + 64); + configuration_table = *(unsigned long *)(system_table + 68); + + for (index = 0; index < configuration_table_entries; index++) + { + if (compare_guid(configuration_table, debug_table_guid) == 0) + { + return *(unsigned long *)(configuration_table + 16); + } + + configuration_table += 20; + } + + return 0; +} +. + +define /R int valid_pe_header(header) + unsigned char *header; +{ + if ((header[0x00] == 'M') && + (header[0x01] == 'Z') && + (header[0x80] == 'P') && + (header[0x81] == 'E')) + { + return 1; + } + + return 0; +} +. + +define /R unsigned long pe_headersize(header) + unsigned char *header; +{ + unsigned long *size; + + size = header + 0x00AC; + + return *size; +} +. + +define /R unsigned char *pe_filename(header) + unsigned char *header; +{ + unsigned long *debugOffset; + unsigned char *stringOffset; + + if (valid_pe_header(header)) + { + debugOffset = header + 0x0128; + stringOffset = header + *debugOffset + 0x002C; + + return stringOffset; + } + + return 0; +} +. + +define /R int char_is_valid(c) + unsigned char c; +{ + if (c >= 32 && c < 127) + return 1; + + return 0; +} +. + +define /R write_symbols_file(filename, mem_start, mem_size) + unsigned char *filename; + unsigned char *mem_start; + unsigned long mem_size; +{ + unsigned char *system_table; + unsigned char *debug_info_table_header; + unsigned char *debug_info_table; + unsigned long debug_info_table_size; + unsigned long index; + unsigned char *debug_image_info; + unsigned char *loaded_image_protocol; + unsigned char *image_base; + unsigned char *debug_filename; + unsigned long header_size; + int status; + + system_table = find_system_table(mem_start, mem_size); + if (system_table == 0) + { + return; + } + + status = fopen(88, filename, "w"); + + debug_info_table_header = find_debug_info_table_header(system_table); + + debug_info_table = *(unsigned long *)(debug_info_table_header + 8); + debug_info_table_size = *(unsigned long *)(debug_info_table_header + 4); + + for (index = 0; index < (debug_info_table_size * 4); index += 4) + { + debug_image_info = *(unsigned long *)(debug_info_table + index); + + if (debug_image_info == 0) + { + break; + } + + loaded_image_protocol = *(unsigned long *)(debug_image_info + 4); + + image_base = *(unsigned long *)(loaded_image_protocol + 32); + + debug_filename = pe_filename(image_base); + header_size = pe_headersize(image_base); + + $fprintf 88, "%s 0x%08x\n", debug_filename, image_base + header_size$; + } + + + fclose(88); +} +. diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc new file mode 100644 index 000000000..4a7e12b81 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Debugger_scripts/rvi_unload_symbols.inc @@ -0,0 +1,118 @@ +// +// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// + +error = continue + +unload + +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 +delfile 1 + +error = abort diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.c b/SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.c new file mode 100644 index 000000000..2e13d1a42 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.c @@ -0,0 +1,414 @@ +/*++ +RealView EB FVB DXE Driver + +Copyright (c) 2010, Apple Inc. All rights reserved.
+This program and the accompanying materials +are licensed and made available under the terms and conditions of the +BSD License which accompanies this distribution. The full text of the +license may be found at http://opensource.org/licenses/bsd-license.php + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + +--*/ + +#include + +#include +#include +#include +#include +#include +#include + +#include + + + +/** + The GetAttributes() function retrieves the attributes and + current settings of the block. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Attributes Pointer to EFI_FVB_ATTRIBUTES_2 in which the + attributes and current settings are + returned. Type EFI_FVB_ATTRIBUTES_2 is defined + in EFI_FIRMWARE_VOLUME_HEADER. + + @retval EFI_SUCCESS The firmware volume attributes were + returned. + +**/ + +EFI_STATUS +EFIAPI +FvbGetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + return EFI_UNSUPPORTED; +} + + +/** + The SetAttributes() function sets configurable firmware volume + attributes and returns the new settings of the firmware volume. + + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Attributes On input, Attributes is a pointer to + EFI_FVB_ATTRIBUTES_2 that contains the + desired firmware volume settings. On + successful return, it contains the new + settings of the firmware volume. Type + EFI_FVB_ATTRIBUTES_2 is defined in + EFI_FIRMWARE_VOLUME_HEADER. + + @retval EFI_SUCCESS The firmware volume attributes were returned. + + @retval EFI_INVALID_PARAMETER The attributes requested are in + conflict with the capabilities + as declared in the firmware + volume header. + +**/ +EFI_STATUS +EFIAPI +FvbSetAttributes ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes + ) +{ + return EFI_UNSUPPORTED; +} + + +/** + The GetPhysicalAddress() function retrieves the base address of + a memory-mapped firmware volume. This function should be called + only for memory-mapped firmware volumes. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Address Pointer to a caller-allocated + EFI_PHYSICAL_ADDRESS that, on successful + return from GetPhysicalAddress(), contains the + base address of the firmware volume. + + @retval EFI_SUCCESS The firmware volume base address was returned. + + @retval EFI_NOT_SUPPORTED The firmware volume is not memory mapped. + +**/ +EFI_STATUS +EFIAPI +FvbGetPhysicalAddress ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + OUT EFI_PHYSICAL_ADDRESS *Address + ) +{ + return EFI_UNSUPPORTED; +} + + +/** + The GetBlockSize() function retrieves the size of the requested + block. It also returns the number of additional blocks with + the identical size. The GetBlockSize() function is used to + retrieve the block map (see EFI_FIRMWARE_VOLUME_HEADER). + + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba Indicates the block for which to return the size. + + @param BlockSize Pointer to a caller-allocated UINTN in which + the size of the block is returned. + + @param NumberOfBlocks Pointer to a caller-allocated UINTN in + which the number of consecutive blocks, + starting with Lba, is returned. All + blocks in this range have a size of + BlockSize. + + + @retval EFI_SUCCESS The firmware volume base address was returned. + + @retval EFI_INVALID_PARAMETER The requested LBA is out of range. + +**/ +EFI_STATUS +EFIAPI +FvbGetBlockSize ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + OUT UINTN *BlockSize, + OUT UINTN *NumberOfBlocks + ) +{ + return EFI_UNSUPPORTED; +} + + + +/** + Reads the specified number of bytes into a buffer from the specified block. + + The Read() function reads the requested number of bytes from the + requested block and stores them in the provided buffer. + Implementations should be mindful that the firmware volume + might be in the ReadDisabled state. If it is in this state, + the Read() function must return the status code + EFI_ACCESS_DENIED without modifying the contents of the + buffer. The Read() function must also prevent spanning block + boundaries. If a read is requested that would span a block + boundary, the read must read up to the boundary but not + beyond. The output parameter NumBytes must be set to correctly + indicate the number of bytes actually read. The caller must be + aware that a read may be partially completed. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index + from which to read. + + @param Offset Offset into the block at which to begin reading. + + @param NumBytes Pointer to a UINTN. At entry, *NumBytes + contains the total size of the buffer. At + exit, *NumBytes contains the total number of + bytes read. + + @param Buffer Pointer to a caller-allocated buffer that will + be used to hold the data that is read. + + @retval EFI_SUCCESS The firmware volume was read successfully, + and contents are in Buffer. + + @retval EFI_BAD_BUFFER_SIZE Read attempted across an LBA + boundary. On output, NumBytes + contains the total number of bytes + returned in Buffer. + + @retval EFI_ACCESS_DENIED The firmware volume is in the + ReadDisabled state. + + @retval EFI_DEVICE_ERROR The block device is not + functioning correctly and could + not be read. + +**/ +EFI_STATUS +EFIAPI +FvbRead ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN OUT UINT8 *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + + +/** + Writes the specified number of bytes from the input buffer to the block. + + The Write() function writes the specified number of bytes from + the provided buffer to the specified block and offset. If the + firmware volume is sticky write, the caller must ensure that + all the bits of the specified range to write are in the + EFI_FVB_ERASE_POLARITY state before calling the Write() + function, or else the result will be unpredictable. This + unpredictability arises because, for a sticky-write firmware + volume, a write may negate a bit in the EFI_FVB_ERASE_POLARITY + state but cannot flip it back again. Before calling the + Write() function, it is recommended for the caller to first call + the EraseBlocks() function to erase the specified block to + write. A block erase cycle will transition bits from the + (NOT)EFI_FVB_ERASE_POLARITY state back to the + EFI_FVB_ERASE_POLARITY state. Implementations should be + mindful that the firmware volume might be in the WriteDisabled + state. If it is in this state, the Write() function must + return the status code EFI_ACCESS_DENIED without modifying the + contents of the firmware volume. The Write() function must + also prevent spanning block boundaries. If a write is + requested that spans a block boundary, the write must store up + to the boundary but not beyond. The output parameter NumBytes + must be set to correctly indicate the number of bytes actually + written. The caller must be aware that a write may be + partially completed. All writes, partial or otherwise, must be + fully flushed to the hardware before the Write() service + returns. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL instance. + + @param Lba The starting logical block index to write to. + + @param Offset Offset into the block at which to begin writing. + + @param NumBytes The pointer to a UINTN. At entry, *NumBytes + contains the total size of the buffer. At + exit, *NumBytes contains the total number of + bytes actually written. + + @param Buffer The pointer to a caller-allocated buffer that + contains the source for the write. + + @retval EFI_SUCCESS The firmware volume was written successfully. + + @retval EFI_BAD_BUFFER_SIZE The write was attempted across an + LBA boundary. On output, NumBytes + contains the total number of bytes + actually written. + + @retval EFI_ACCESS_DENIED The firmware volume is in the + WriteDisabled state. + + @retval EFI_DEVICE_ERROR The block device is malfunctioning + and could not be written. + + +**/ +EFI_STATUS +EFIAPI +FvbWrite ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + IN EFI_LBA Lba, + IN UINTN Offset, + IN OUT UINTN *NumBytes, + IN UINT8 *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + + +/** + Erases and initializes a firmware volume block. + + The EraseBlocks() function erases one or more blocks as denoted + by the variable argument list. The entire parameter list of + blocks must be verified before erasing any blocks. If a block is + requested that does not exist within the associated firmware + volume (it has a larger index than the last block of the + firmware volume), the EraseBlocks() function must return the + status code EFI_INVALID_PARAMETER without modifying the contents + of the firmware volume. Implementations should be mindful that + the firmware volume might be in the WriteDisabled state. If it + is in this state, the EraseBlocks() function must return the + status code EFI_ACCESS_DENIED without modifying the contents of + the firmware volume. All calls to EraseBlocks() must be fully + flushed to the hardware before the EraseBlocks() service + returns. + + @param This Indicates the EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL + instance. + + @param ... The variable argument list is a list of tuples. + Each tuple describes a range of LBAs to erase + and consists of the following: + - An EFI_LBA that indicates the starting LBA + - A UINTN that indicates the number of blocks to + erase. + + The list is terminated with an + EFI_LBA_LIST_TERMINATOR. For example, the + following indicates that two ranges of blocks + (5-7 and 10-11) are to be erased: EraseBlocks + (This, 5, 3, 10, 2, EFI_LBA_LIST_TERMINATOR); + + @retval EFI_SUCCESS The erase request successfully + completed. + + @retval EFI_ACCESS_DENIED The firmware volume is in the + WriteDisabled state. + @retval EFI_DEVICE_ERROR The block device is not functioning + correctly and could not be written. + The firmware device may have been + partially erased. + @retval EFI_INVALID_PARAMETER One or more of the LBAs listed + in the variable argument list do + not exist in the firmware volume. + +**/ +EFI_STATUS +EFIAPI +FvbEraseBlocks ( + IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This, + ... + ) +{ + return EFI_UNSUPPORTED; +} + + +// +// Making this global saves a few bytes in image size +// +EFI_HANDLE gFvbHandle = NULL; + + +/// +/// The Firmware Volume Block Protocol is the low-level interface +/// to a firmware volume. File-level access to a firmware volume +/// should not be done using the Firmware Volume Block Protocol. +/// Normal access to a firmware volume must use the Firmware +/// Volume Protocol. Typically, only the file system driver that +/// produces the Firmware Volume Protocol will bind to the +/// Firmware Volume Block Protocol. +/// +EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL gFvbProtocol = { + FvbGetAttributes, + FvbSetAttributes, + FvbGetPhysicalAddress, + FvbGetBlockSize, + FvbRead, + FvbWrite, + FvbEraseBlocks, + /// + /// The handle of the parent firmware volume. + /// + NULL +}; + + +/** + Initialize the state information for the CPU Architectural Protocol + + @param ImageHandle of the loaded driver + @param SystemTable Pointer to the System Table + + @retval EFI_SUCCESS Protocol registered + @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure + @retval EFI_DEVICE_ERROR Hardware problems + +**/ +EFI_STATUS +EFIAPI +FvbDxeInitialize ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + + Status = gBS->InstallMultipleProtocolInterfaces ( + &gFvbHandle, + &gEfiFirmwareVolumeBlockProtocolGuid, &gFvbProtocol, + NULL + ); + ASSERT_EFI_ERROR (Status); + + // SetVertAddressEvent () + + // GCD Map NAND as RT + + return Status; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.inf b/SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.inf new file mode 100644 index 000000000..b3243e6f0 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/FvbDxe/FvbDxe.inf @@ -0,0 +1,53 @@ +#/** @file +# +# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD +# License which accompanies this distribution. The full text of the license +# may be found at http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = FvbDxe + FILE_GUID = 43ECE281-D9E2-4DD0-B304-E6A5689256F4 + MODULE_TYPE = DXE_RUNTIME_DRIVER + VERSION_STRING = 1.0 + + ENTRY_POINT = FvbDxeInitialize + + +[Sources.common] + FvbDxe.c + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec + +[LibraryClasses] + BaseLib + UefiLib + UefiBootServicesTableLib + DebugLib + PrintLib + UefiDriverEntryPoint + IoLib + +[Guids] + + +[Protocols] + gEfiFirmwareVolumeBlockProtocolGuid + +[FixedPcd.common] + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize + gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase + +[depex] + TRUE diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c new file mode 100644 index 000000000..2fd2b8353 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c @@ -0,0 +1,78 @@ +/** @file + Template for ArmEb DebugAgentLib. + + For ARM we reserve FIQ for the Debug Agent Timer. We don't care about + laytency as we only really need the timer to run a few times a second + (how fast can some one type a ctrl-c?), but it works much better if + the interrupt we are using to break into the debugger is not being + used, and masked, by the system. + + Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include + +#include + +#include + + +/** + Setup all the hardware needed for the debug agents timer. + + This function is used to set up debug enviroment. + +**/ +VOID +EFIAPI +DebugAgentTimerIntialize ( + VOID + ) +{ + // Map Timer to FIQ +} + + +/** + Set the period for the debug agent timer. Zero means disable the timer. + + @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer. + +**/ +VOID +EFIAPI +DebugAgentTimerSetPeriod ( + IN UINT32 TimerPeriodMilliseconds + ) +{ + if (TimerPeriodMilliseconds == 0) { + // Disable timer and Disable FIQ + return; + } + + // Set timer period and unmask FIQ +} + + +/** + Perform End Of Interrupt for the debug agent timer. This is called in the + interrupt handler after the interrupt has been processed. + +**/ +VOID +EFIAPI +DebugAgentTimerEndOfInterrupt ( + VOID + ) +{ + // EOI Timer interrupt for FIQ +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf new file mode 100644 index 000000000..ee5438d2a --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf @@ -0,0 +1,37 @@ +#/** @file +# Component description file for Base PCI Cf8 Library. +# +# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles. +# Layers on top of an I/O Library instance. +# Copyright (c) 2007, Intel Corporation. All rights reserved.
+# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# +#**/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = ArmEbDebugAgentTimerLib + FILE_GUID = 80949BBB-68EE-4a4c-B434-D5DB5A232F0C + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = DebugAgentTimerLib|SEC BASE DXE_CORE + + +[Sources.common] + DebugAgentTimerLib.c + + +[Packages] + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg.dec + +[LibraryClasses] + IoLib diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c new file mode 100644 index 000000000..2f734f692 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoard.c @@ -0,0 +1,210 @@ +/** @file +* +* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include +#include +#include +#include + +ARM_CORE_INFO mExynosMpCoreInfo[] = { + { + // Cluster 0, Core 0 + 0x0, 0x0, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG, + (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG, + (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG, + (UINT64)0xFFFFFFFF + }, + { + // Cluster 0, Core 1 + 0x0, 0x1, + + // MP Core MailBox Set/Get/Clear Addresses and Clear Value + (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_REG, + (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_SET_REG, + (EFI_PHYSICAL_ADDRESS)ARM_EB_SYS_FLAGS_CLR_REG, + (UINT64)0xFFFFFFFF + } +}; +/** + Return if Trustzone is supported by your platform + + A non-zero value must be returned if you want to support a Secure World on your platform. + ArmPlatformTrustzoneInit() will later set up the secure regions. + This function can return 0 even if Trustzone is supported by your processor. In this case, + the platform will continue to run in Secure World. + + @return A non-zero value if Trustzone supported. + +**/ +UINTN ArmPlatformTrustzoneSupported(VOID) { + // There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM + return TRUE; +} + +/** + Initialize the Secure peripherals and memory regions + + If Trustzone is supported by your platform then this function makes the required initialization + of the secure peripherals and memory regions. + +**/ +VOID ArmPlatformTrustzoneInit(VOID) { + UINT32 TZPCBase; + TZPCBase = PcdGet32(PcdTZPCBase) + TZPC0_OFFSET; + MmioWrite32((TZPCBase + 0x00),0x00); + MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); + + TZPCBase = PcdGet32(PcdTZPCBase) + TZPC1_OFFSET; + MmioWrite32((TZPCBase + 0x00),0x00); + MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); + + TZPCBase = PcdGet32(PcdTZPCBase) + TZPC2_OFFSET; + MmioWrite32((TZPCBase + 0x00),0x00); + MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); + + TZPCBase = PcdGet32(PcdTZPCBase) + TZPC3_OFFSET; + MmioWrite32((TZPCBase + 0x00),0x00); + MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); + + TZPCBase = PcdGet32(PcdTZPCBase) + TZPC4_OFFSET; + MmioWrite32((TZPCBase + 0x00),0x00); + MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); + + + TZPCBase = PcdGet32(PcdTZPCBase) + TZPC5_OFFSET; + MmioWrite32((TZPCBase + 0x00),0x00); + MmioWrite32((TZPCBase +TZPC_DECPROT0SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT1SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT2SET_OFFSET),0xFF); + MmioWrite32((TZPCBase +TZPC_DECPROT3SET_OFFSET),0xFF); +} + +/** + Remap the memory at 0x0 + + Some platform requires or gives the ability to remap the memory at the address 0x0. + This function can do nothing if this feature is not relevant to your platform. + +**/ +VOID ArmPlatformBootRemapping(VOID) { + // Disable memory remapping and return to normal mapping + MmioOr32 (ARM_EB_SYSCTRL, BIT8); //EB_SP810_CTRL_BASE +} + + +/** + Return the current Boot Mode + + This function returns the boot reason on the platform + + @return Return the current Boot Mode of the platform + +**/ +EFI_BOOT_MODE +ArmPlatformGetBootMode ( + VOID + ) +{ + return BOOT_WITH_FULL_CONFIGURATION; +} + +/** + Initialize the system (or sometimes called permanent) memory + + This memory is generally represented by the DRAM. + +**/ +VOID ArmPlatformInitializeSystemMemory(VOID) { + // We do not need to initialize the System Memory on RTSM +} + +RETURN_STATUS +ArmPlatformInitialize ( + IN UINTN MpId + ) +{ +return RETURN_SUCCESS; +} + + +VOID +ArmPlatformNormalInitialize ( + VOID + ) { + +} + +VOID +ArmPlatformSecExtraAction ( + IN UINTN CoreId, + OUT UINTN* JumpAddress + ) +{ + *JumpAddress = PcdGet32(PcdFvBaseAddress); +} + +EFI_STATUS +PrePeiCoreGetMpCoreInfo ( + OUT UINTN *CoreCount, + OUT ARM_CORE_INFO **ArmCoreTable + ) +{ + *CoreCount = sizeof(mExynosMpCoreInfo) / sizeof(ARM_CORE_INFO); + *ArmCoreTable = mExynosMpCoreInfo; + + return EFI_SUCCESS; +} + +// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore +EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID; +ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo }; + +EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { + { + EFI_PEI_PPI_DESCRIPTOR_PPI, + &mArmMpCoreInfoPpiGuid, + &mMpCoreInfoPpi + } +}; + +VOID +ArmPlatformGetPlatformPpiList ( + OUT UINTN *PpiListSize, + OUT EFI_PEI_PPI_DESCRIPTOR **PpiList + ) +{ + *PpiListSize = sizeof(gPlatformPpiTable); + *PpiList = gPlatformPpiTable; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S new file mode 100644 index 000000000..9dc7abdf9 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.S @@ -0,0 +1,635 @@ +/* + * Copyright (c) 2011, Samsung Electronics Co. All rights reserved. + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + */ + +#include +#include +#include +#include +#include + +/* Start of Code section */ +.text +.align 3 + +GCC_ASM_IMPORT(_SetupPrimaryCoreStack) +GCC_ASM_EXPORT(ArmPlatformTZPCInitialized) +GCC_ASM_EXPORT(ArmPlatformUARTInitialized) +GCC_ASM_EXPORT(ArmPlatformIsClockInitialized) +GCC_ASM_EXPORT(ArmPlatformIsMemoryInitialized) +GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory) +GCC_ASM_EXPORT(ArmPlatformSecBootAction) +GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit) + +ASM_PFX(ArmPlatformTZPCInitialized): + ldr r0, =Exynos4210_TZPC0_BASE + mov r1, #0x0 + str r1, [r0] + mov r1, #0xff + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC1_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC2_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC3_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC4_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC5_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + bx lr + +ASM_PFX(ArmPlatformUARTInitialized): + ldr r0, =0x11400000 + ldr r1, =0x22222222 + str r1, [r0] + ldr r0, =0x11400020 + ldr r1, =0x222222 + str r1, [r0] + + ldr r0, =Exynos4210_CMU_BASE + ldr r1, =CLK_SRC_PERIL0_VAL + ldr r2, =CLK_SRC_PERIL0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_DIV_PERIL0_VAL + ldr r2, =CLK_DIV_PERIL0_OFFSET + str r1, [r0, r2] + + ldr r0, =Exynos4210_UART_BASE + ldr r1, =0x111 + str r1, [r0, #UFCON_OFFSET] + + mov r1, #0x3 + str r1, [r0, #ULCON_OFFSET] + + ldr r1, =0x3c5 + str r1, [r0, #UCON_OFFSET] + + ldr r1, =UART_UBRDIV_VAL + str r1, [r0, #UBRDIV_OFFSET] + + ldr r1, =UART_UDIVSLOT_VAL + str r1, [r0, #UDIVSLOT_OFFSET] + + ldr r1, =0x4c4c4c4c + str r1, [r0, #UTXH_OFFSET] // 'L' + + ldr r1, =0x4a4a4a4a + str r1, [r0, #UTXH_OFFSET] // 'J' + + ldr r1, =0x50505050 + str r1, [r0, #UTXH_OFFSET] // 'P' + + bx lr + + +ASM_PFX(ArmPlatformIsClockInitialized): + ldr r0, =Exynos4210_CMU_BASE + + ldr r1, =0x0 + ldr r2, =CLK_SRC_CPU_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_1: + subs r1, r1, #1 + bne cmu_1 + + ldr r1, =CLK_DIV_CPU0_VAL + ldr r2, =CLK_DIV_CPU0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_DIV_CPU1_VAL + ldr r2, =CLK_DIV_CPU1_OFFSET + str r1, [r0, r2] + + ldr r1, =0x10000 + ldr r2, =CLK_SRC_DMC_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_2: + subs r1, r1, #1 + bne cmu_2 + + ldr r1, =CLK_DIV_DMC0_VAL + ldr r2, =CLK_DIV_DMC0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_DIV_DMC1_VAL + ldr r2, =CLK_DIV_DMC1_OFFSET + str r1, [r0, r2] + + ldr r1, =CLK_SRC_TOP0_VAL + ldr r2, =CLK_SRC_TOP0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_SRC_TOP1_VAL + ldr r2, =CLK_SRC_TOP1_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY + +cmu_3: + subs r1, r1, #1 + bne cmu_3 + + ldr r1, =CLK_DIV_TOP_VAL + ldr r2, =CLK_DIV_TOP_OFFSET + str r1, [r0, r2] + + ldr r1, =CLK_SRC_LEFTBUS_VAL + ldr r2, =CLK_SRC_LEFTBUS_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_4: + subs r1, r1, #1 + bne cmu_4 + + ldr r1, =CLK_DIV_LEFRBUS_VAL + ldr r2, =CLK_DIV_LEFTBUS_OFFSET + str r1, [r0, r2] + + ldr r1, =CLK_SRC_RIGHTBUS_VAL + ldr r2, =CLK_SRC_RIGHTBUS_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_5: + subs r1, r1, #1 + bne cmu_5 + + ldr r1, =CLK_DIV_RIGHTBUS_VAL + ldr r2, =CLK_DIV_RIGHTBUS_OFFSET + str r1, [r0, r2] + + ldr r1, =APLL_LOCK_VAL + ldr r2, =APLL_LOCK_OFFSET + str r1, [r0, r2] + ldr r1, =MPLL_LOCK_VAL + ldr r2, =MPLL_LOCK_OFFSET + str r1, [r0, r2] + ldr r1, =EPLL_LOCK_VAL + ldr r2, =EPLL_LOCK_OFFSET + str r1, [r0, r2] + ldr r1, =VPLL_LOCK_VAL + ldr r2, =VPLL_LOCK_OFFSET + str r1, [r0, r2] + + ldr r1, =APLL_CON1_VAL + ldr r2, =APLL_CON1_OFFSET + str r1, [r0, r2] + + ldr r1, =APLL_CON0_VAL + ldr r2, =APLL_CON0_OFFSET + str r1, [r0, r2] + + ldr r1, =MPLL_CON1_VAL + ldr r2, =MPLL_CON1_OFFSET + str r1, [r0, r2] + ldr r1, =MPLL_CON0_VAL + ldr r2, =MPLL_CON0_OFFSET + str r1, [r0, r2] + + ldr r1, =EPLL_CON1_VAL + ldr r2, =EPLL_CON1_OFFSET + str r1, [r0, r2] + ldr r1, =EPLL_CON0_VAL + ldr r2, =EPLL_CON0_OFFSET + str r1, [r0, r2] + + ldr r1, =VPLL_CON1_VAL + ldr r2, =VPLL_CON1_OFFSET + str r1, [r0, r2] + ldr r1, =VPLL_CON0_VAL + ldr r2, =VPLL_CON0_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_6: + subs r1, r1, #1 + bne cmu_6 + + ldr r1, =CLK_SRC_CPU_VAL_MOUTMPLLFOUT + ldr r2, =CLK_SRC_CPU_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_7: + subs r1, r1, #1 + bne cmu_7 + + ldr r0, =Exynos4210_DMC_0_BASE + + ldr r1, =0x6910100A + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + ldr r1, =0x6910100B + + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_8: + subs r1, r1, #1 + bne cmu_8 + + ldr r1, =0x0000008C + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_9: + subs r1, r1, #1 + bne cmu_9 + + ldr r0, =Exynos4210_DMC_1_BASE + + ldr r1, =0xe910100A + + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + ldr r1, =0xe910100B + + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_10: + subs r1, r1, #1 + bne cmu_10 + + ldr r1, =0x0000008C + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_11: + subs r1, r1, #1 + bne cmu_11 + + ldr r0, =Exynos4210_DMC_0_BASE + ldr r1, =0x0FFF30fa + ldr r2, =DMC_CONCONTROL + str r1, [r0, r2] + ldr r0, =Exynos4210_DMC_1_BASE + ldr r1, =0x0FFF30fa + ldr r2, =DMC_CONCONTROL + str r1, [r0, r2] + + ldr r0, =Exynos4210_DMC_0_BASE + ldr r1, =0x00202537 + ldr r2, =DMC_MEMCONTROL + str r1, [r0, r2] + ldr r0, =Exynos4210_DMC_1_BASE + ldr r1, =0x00202537 + ldr r2, =DMC_MEMCONTROL + str r1, [r0, r2] + + bx lr + +/* + * Call at the beginning of the platform boot up + * + * This function allows the firmware platform to do extra actions at the early + * stage of the platform power up. + * + * Note: This function must be implemented in assembler + * as there is no stack set up yet + */ +ASM_PFX(ArmPlatformSecBootAction): + bx lr + + +ASM_PFX(ArmPlatformSecBootMemoryInit): + bx lr + +/* + * Called at the early stage of the Boot phase to know if the memory has + * already been initialized. Running the code from the reset vector does + * not mean we start from cold boot. In some case, we can go through this + * code with the memory already initialized. + * Because this function is called at the early stage, the implementation + * must not use the stack. Its implementation must probably done in + * assembly to ensure this requirement. + * + * @return Return the condition value into the 'Z' flag + */ +ASM_PFX(ArmPlatformIsMemoryInitialized): + /* + * Check if the memory has been already mapped, + * if so skipped the memory initialization + */ + LoadConstantToReg (Exynos4210_DMC_0_BASE, r0) + ldr r0, [r0, #0] + and r0, r0, #0x20 + cmp r0, #0x00 + bx lr + +/* + * Initialize the memory where the initial stacks will reside + * + * This memory can contain the initial stacks (Secure and Secure Monitor + * stacks). In some platform, this region is already initialized and the + * implementation of this function can do nothing. This memory can also + * represent the Secure RAM. + * This function is called before the satck has been set up. Its + * implementation must ensure the stack pointer is not used (probably + * required to use assembly language) + */ +ASM_PFX(ArmPlatformInitializeBootMemory): +/* + * Check if the Memory is already Initialized. + * If Initialized goto Stack setup + */ + mov r10, lr + bl ASM_PFX(ArmPlatformIsMemoryInitialized) + bne skip_initmem + + ldr r0, =0x10010350 + mov r1, #1 + str r1, [r0] + +/* CLK_DIV_DMC0 on iROM DMC=50MHz for Init DMC */ + ldr r0, =Exynos4210_CMU_BASE + ldr r1, =0x13113113 + ldr r2, =Exynos4210_CMU_DIV_DMC0 + str r1, [r0, r2] + +/* MIU Setting */ + ldr r0, =Exynos4210_MIU_BASE + + ldr r1, =0x20001507 + str r1, [r0, #0x400] + ldr r1, =0x00000001 + str r1, [r0, #0xc00] + +/*****************************************************************/ +/*DREX0***********************************************************/ +/*****************************************************************/ + + ldr r0, =Exynos4210_DMC_0_BASE + + ldr r1, =0xE3855503 + str r1, [r0, #DMC_PHYZQCONTROL] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x7110100A + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000000 + str r1, [r0, #DMC_PHYCONTROL2] + + ldr r1, =0x0FFF30da + str r1, [r0, #DMC_CONCONTROL] + + ldr r1, =0x00202500 + str r1, [r0, #DMC_MEMCONTROL] + + ldr r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] + + ldr r1, =0xff000000 + str r1, [r0, #DMC_PRECHCONFIG] + + ldr r1, =0x0000005D + str r1, [r0, #DMC_TIMINGAREF] + + ldr r1, =0x34498691 + str r1, [r0, #DMC_TIMINGROW] + + ldr r1, =0x36330306 + str r1, [r0, #DMC_TIMINGDATA] + + ldr r1, =0x50380365 + str r1, [r0, #DMC_TIMINGPOWER] + + mov r2, #Exynos4210_DMC_DELAY + +loop_2: + subs r2, r2, #1 + bne loop_2 + ldr r1, =0x07000000 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_3: + subs r2, r2, #1 + bne loop_3 + ldr r1, =0x00071C00 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_4: + subs r2, r2, #1 + bne loop_4 + + ldr r1, =0x00010BFC + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_5: + subs r2, r2, #1 + bne loop_5 + ldr r1, =0x00000488 + str r1, [r0, #DMC_DIRECTCMD] + ldr r1, =0x00000810 + str r1, [r0, #DMC_DIRECTCMD] + ldr r1, =0x00000C08 + str r1, [r0, #DMC_DIRECTCMD] + +/* get DMC density information */ + ldr r1, =0x09010000 + mov r3, #10 +loop_6: + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_7: + subs r2, r2, #1 + bne loop_7 + ldr r6, [r0, #DMC_MRSTATUS] + subs r3, r3, #1 + bne loop_6 + and r6, r6, #0x3c + lsr r6, r6, #2 + cmp r6, #6 + ldreq r1, =0x20e01323 + ldrne r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] + +/*****************************************************************/ +/*DREX1***********************************************************/ +/*****************************************************************/ + ldr r0, =Exynos4210_DMC_1_BASE + ldr r1, =0xE3855503 + str r1, [r0, #DMC_PHYZQCONTROL] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x7110100A + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000000 + str r1, [r0, #DMC_PHYCONTROL2] + + ldr r1, =0x0FFF30da + str r1, [r0, #DMC_CONCONTROL] + + ldr r1, =0x00202500 + str r1, [r0, #DMC_MEMCONTROL] + + ldr r1, =0x40f01223 + str r1, [r0, #DMC_MEMCONFIG0] + + ldr r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] + + ldr r1, =0xff000000 + str r1, [r0, #DMC_PRECHCONFIG] + + ldr r1, =0x0000005D + str r1, [r0, #DMC_TIMINGAREF] + + ldr r1, =0x34498691 + str r1, [r0, #DMC_TIMINGROW] + + ldr r1, =0x36330306 + str r1, [r0, #DMC_TIMINGDATA] + + ldr r1, =0x50380365 + str r1, [r0, #DMC_TIMINGPOWER] + + mov r2, #Exynos4210_DMC_DELAY +loop_8: + subs r2, r2, #1 + bne loop_8 + ldr r1, =0x07000000 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_9: + subs r2, r2, #1 + bne loop_9 + ldr r1, =0x00071C00 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_10: + subs r2, r2, #1 + bne loop_10 + + ldr r1, =0x00010BFC + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_11: + subs r2, r2, #1 + bne loop_11 + ldr r1, =0x00000488 + str r1, [r0, #DMC_DIRECTCMD] + + ldr r1, =0x00000810 + str r1, [r0, #DMC_DIRECTCMD] + + ldr r1, =0x00000C08 + str r1, [r0, #DMC_DIRECTCMD] + +/* get DMC density information */ + ldr r1, =0x09010000 + mov r3, #10 +loop_12: + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_13: + subs r2, r2, #1 + bne loop_13 + ldr r7, [r0, #DMC_MRSTATUS] + subs r3, r3, #1 + bne loop_12 + and r7, r7, #0x3c + lsr r7, r7, #2 + cmp r7, #6 + ldreq r1, =0x20e01323 + ldrne r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] +skip_initmem: + mov lr, r10 + bx lr + +.end diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm new file mode 100644 index 000000000..7960f22ee --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardHelper.asm @@ -0,0 +1,609 @@ +// +// Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +// +// This program and the accompanying materials +// are licensed and made available under the terms and conditions of the BSD License +// which accompanies this distribution. The full text of the license may be found at +// http://opensource.org/licenses/bsd-license.php +// +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +// +// + +#include +#include +#include +#include +#include + + INCLUDE AsmMacroIoLib.inc + + EXPORT ArmPlatformTZPCInitialized + EXPORT ArmPlatformUARTInitialized + EXPORT ArmPlatformIsClockInitialized + EXPORT ArmPlatformIsMemoryInitialized + EXPORT ArmPlatformInitializeBootMemory + + PRESERVE8 + AREA ArmRealViewEbHelper, CODE, READONLY + +ArmPlatformTZPCInitialized + ldr r0, =Exynos4210_TZPC0_BASE + mov r1, #0x0 + str r1, [r0] + mov r1, #0xff + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC1_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC2_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC3_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC4_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + ldr r0, =Exynos4210_TZPC5_BASE + str r1, [r0, #TZPC_DECPROT0SET_OFFSET] + str r1, [r0, #TZPC_DECPROT1SET_OFFSET] + str r1, [r0, #TZPC_DECPROT2SET_OFFSET] + str r1, [r0, #TZPC_DECPROT3SET_OFFSET] + + bx lr + +ArmPlatformUARTInitialized + ldr r0, =0x11400000 + ldr r1, =0x22222222 + str r1, [r0] + ldr r0, =0x11400020 + ldr r1, =0x222222 + str r1, [r0] + + ldr r0, =Exynos4210_CMU_BASE + ldr r1, =CLK_SRC_PERIL0_VAL + ldr r2, =CLK_SRC_PERIL0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_DIV_PERIL0_VAL + ldr r2, =CLK_DIV_PERIL0_OFFSET + str r1, [r0, r2] + + ldr r0, =Exynos4210_UART_BASE + ldr r1, =0x111 + str r1, [r0, #UFCON_OFFSET] + + mov r1, #0x3 + str r1, [r0, #ULCON_OFFSET] + + ldr r1, =0x3c5 + str r1, [r0, #UCON_OFFSET] + + ldr r1, =UART_UBRDIV_VAL + str r1, [r0, #UBRDIV_OFFSET] + + ldr r1, =UART_UDIVSLOT_VAL + str r1, [r0, #UDIVSLOT_OFFSET] + + ldr r1, =0x4c4c4c4c + str r1, [r0, #UTXH_OFFSET] // 'L' + + ldr r1, =0x4a4a4a4a + str r1, [r0, #UTXH_OFFSET] // 'J' + + ldr r1, =0x50505050 + str r1, [r0, #UTXH_OFFSET] // 'P' + + bx lr + +ArmPlatformIsClockInitialized + ldr r0, =Exynos4210_CMU_BASE + + ldr r1, =0x0 + ldr r2, =CLK_SRC_CPU_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_1 + subs r1, r1, #1 + bne cmu_1 + + ldr r1, =CLK_DIV_CPU0_VAL + ldr r2, =CLK_DIV_CPU0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_DIV_CPU1_VAL + ldr r2, =CLK_DIV_CPU1_OFFSET + str r1, [r0, r2] + + ldr r1, =0x10000 + ldr r2, =CLK_SRC_DMC_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_2 + subs r1, r1, #1 + bne cmu_2 + + ldr r1, =CLK_DIV_DMC0_VAL + ldr r2, =CLK_DIV_DMC0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_DIV_DMC1_VAL + ldr r2, =CLK_DIV_DMC1_OFFSET + str r1, [r0, r2] + + ldr r1, =CLK_SRC_TOP0_VAL + ldr r2, =CLK_SRC_TOP0_OFFSET + str r1, [r0, r2] + ldr r1, =CLK_SRC_TOP1_VAL + ldr r2, =CLK_SRC_TOP1_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_3 + subs r1, r1, #1 + bne cmu_3 + + ldr r1, =CLK_DIV_TOP_VAL + ldr r2, =CLK_DIV_TOP_OFFSET + str r1, [r0, r2] + + ldr r1, =CLK_SRC_LEFTBUS_VAL + ldr r2, =CLK_SRC_LEFTBUS_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_4 + subs r1, r1, #1 + bne cmu_4 + + ldr r1, =CLK_DIV_LEFRBUS_VAL + ldr r2, =CLK_DIV_LEFTBUS_OFFSET + str r1, [r0, r2] + + ldr r1, =CLK_SRC_RIGHTBUS_VAL + ldr r2, =CLK_SRC_RIGHTBUS_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_5 + subs r1, r1, #1 + bne cmu_5 + + ldr r1, =CLK_DIV_RIGHTBUS_VAL + ldr r2, =CLK_DIV_RIGHTBUS_OFFSET + str r1, [r0, r2] + + ldr r1, =APLL_LOCK_VAL + ldr r2, =APLL_LOCK_OFFSET + str r1, [r0, r2] + ldr r1, =MPLL_LOCK_VAL + ldr r2, =MPLL_LOCK_OFFSET + str r1, [r0, r2] + ldr r1, =EPLL_LOCK_VAL + ldr r2, =EPLL_LOCK_OFFSET + str r1, [r0, r2] + ldr r1, =VPLL_LOCK_VAL + ldr r2, =VPLL_LOCK_OFFSET + str r1, [r0, r2] + + ldr r1, =APLL_CON1_VAL + ldr r2, =APLL_CON1_OFFSET + str r1, [r0, r2] + + ldr r1, =APLL_CON0_VAL + ldr r2, =APLL_CON0_OFFSET + str r1, [r0, r2] + + ldr r1, =MPLL_CON1_VAL + ldr r2, =MPLL_CON1_OFFSET + str r1, [r0, r2] + ldr r1, =MPLL_CON0_VAL + ldr r2, =MPLL_CON0_OFFSET + str r1, [r0, r2] + + ldr r1, =EPLL_CON1_VAL + ldr r2, =EPLL_CON1_OFFSET + str r1, [r0, r2] + ldr r1, =EPLL_CON0_VAL + ldr r2, =EPLL_CON0_OFFSET + str r1, [r0, r2] + + ldr r1, =VPLL_CON1_VAL + ldr r2, =VPLL_CON1_OFFSET + str r1, [r0, r2] + ldr r1, =VPLL_CON0_VAL + ldr r2, =VPLL_CON0_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_6 + subs r1, r1, #1 + bne cmu_6 + + ldr r1, =CLK_SRC_CPU_VAL_MOUTMPLLFOUT + ldr r2, =CLK_SRC_CPU_OFFSET + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_7 + subs r1, r1, #1 + bne cmu_7 + + ldr r0, =Exynos4210_DMC_0_BASE + + ldr r1, =0x6910100A + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + ldr r1, =0x6910100B + + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_8 + subs r1, r1, #1 + bne cmu_8 + + ldr r1, =0x0000008C + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_9 + subs r1, r1, #1 + bne cmu_9 + + ldr r0, =Exynos4210_DMC_1_BASE + + ldr r1, =0xe910100A + + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + ldr r1, =0xe910100B + + ldr r2, =DMC_PHYCONTROL0 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_10 + subs r1, r1, #1 + bne cmu_10 + + ldr r1, =0x0000008C + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + ldr r1, =0x00000084 + ldr r2, =DMC_PHYCONTROL1 + str r1, [r0, r2] + + mov r1, #Exynos4210_CMU_DELAY +cmu_11 + subs r1, r1, #1 + bne cmu_11 + + ldr r0, =Exynos4210_DMC_0_BASE + ldr r1, =0x0FFF30fa + ldr r2, =DMC_CONCONTROL + str r1, [r0, r2] + ldr r0, =Exynos4210_DMC_1_BASE + ldr r1, =0x0FFF30fa + ldr r2, =DMC_CONCONTROL + str r1, [r0, r2] + + ldr r0, =Exynos4210_DMC_0_BASE + ldr r1, =0x00202537 + ldr r2, =DMC_MEMCONTROL + str r1, [r0, r2] + ldr r0, =Exynos4210_DMC_1_BASE + ldr r1, =0x00202537 + ldr r2, =DMC_MEMCONTROL + str r1, [r0, r2] + + bx lr + +/** + Called at the early stage of the Boot phase to know if the memory has already been initialized + + Running the code from the reset vector does not mean we start from cold boot. In some case, we + can go through this code with the memory already initialized. + Because this function is called at the early stage, the implementation must not use the stack. + Its implementation must probably done in assembly to ensure this requirement. + + @return Return the condition value into the 'Z' flag + +**/ +ArmPlatformIsMemoryInitialized + // Check if the memory has been already mapped, if so skipped the memory initialization + LoadConstantToReg (Exynos4210_DMC_0_BASE, r0) + ldr r0, [r0, #0] + // Check Controller register is initialized or not by Auto-refresh bit + and r0, r0, #0x20 + cmp r0, #0x20 + bx lr +/** + Initialize the memory where the initial stacks will reside + + This memory can contain the initial stacks (Secure and Secure Monitor stacks). + In some platform, this region is already initialized and the implementation of this function can + do nothing. This memory can also represent the Secure RAM. + This function is called before the satck has been set up. Its implementation must ensure the stack + pointer is not used (probably required to use assembly language) + +**/ +ArmPlatformInitializeBootMemory + +//Async bridge configuration at CPU_core(1: half_sync 0: full_sync) + ldr r0, =0x10010350 + mov r1, #1 + str r1, [r0] + +//CLK_DIV_DMC0 on iROM DMC=50MHz for Init DMC + ldr r0, =Exynos4210_CMU_BASE + ldr r1, =0x13113113 + ldr r2, =Exynos4210_CMU_DIV_DMC0 + str r1, [r0, r2] + +//MIU Setting + ldr r0, =Exynos4210_MIU_BASE + + ldr r1, =0x20001507 + str r1, [r0, #0x400] + ldr r1, =0x00000001 + str r1, [r0, #0xc00] + +/*****************************************************************/ +/*DREX0***********************************************************/ +/*****************************************************************/ + + ldr r0, =Exynos4210_DMC_0_BASE + + ldr r1, =0xE3855503 + str r1, [r0, #DMC_PHYZQCONTROL] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x7110100A + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000000 + str r1, [r0, #DMC_PHYCONTROL2] + + ldr r1, =0x0FFF30da + str r1, [r0, #DMC_CONCONTROL] + + ldr r1, =0x00202500 + str r1, [r0, #DMC_MEMCONTROL] + + ldr r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] + + ldr r1, =0xff000000 + str r1, [r0, #DMC_PRECHCONFIG] + + ldr r1, =0x0000005D + str r1, [r0, #DMC_TIMINGAREF] + + ldr r1, =0x34498691 + str r1, [r0, #DMC_TIMINGROW] + + ldr r1, =0x36330306 + str r1, [r0, #DMC_TIMINGDATA] + + ldr r1, =0x50380365 + str r1, [r0, #DMC_TIMINGPOWER] + + mov r2, #Exynos4210_DMC_DELAY + +loop_2 + subs r2, r2, #1 + bne loop_2 + ldr r1, =0x07000000 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_3 + subs r2, r2, #1 + bne loop_3 + ldr r1, =0x00071C00 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_4 + subs r2, r2, #1 + bne loop_4 + + ldr r1, =0x00010BFC + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_5 + subs r2, r2, #1 + bne loop_5 + ldr r1, =0x00000488 + str r1, [r0, #DMC_DIRECTCMD] + ldr r1, =0x00000810 + str r1, [r0, #DMC_DIRECTCMD] + ldr r1, =0x00000C08 + str r1, [r0, #DMC_DIRECTCMD] +#if 1 +//get DMC density information + ldr r1, =0x09010000 + mov r3, #10 +loop_6 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_7 + subs r2, r2, #1 + bne loop_7 + ldr r6, [r0, #DMC_MRSTATUS] + subs r3, r3, #1 + bne loop_6 + and r6, r6, #0x3c + lsr r6, r6, #2 + cmp r6, #6 + ldreq r1, =0x20e01323 + ldrne r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] +#endif + +/*****************************************************************/ +/*DREX1***********************************************************/ +/*****************************************************************/ + ldr r0, =Exynos4210_DMC_1_BASE + ldr r1, =0xE3855503 + str r1, [r0, #DMC_PHYZQCONTROL] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x7110100A + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x71101008 + str r1, [r0, #DMC_PHYCONTROL0] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x0000008C + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000084 + str r1, [r0, #DMC_PHYCONTROL1] + + ldr r1, =0x00000000 + str r1, [r0, #DMC_PHYCONTROL2] + + ldr r1, =0x0FFF30da + str r1, [r0, #DMC_CONCONTROL] + + ldr r1, =0x00202500 + str r1, [r0, #DMC_MEMCONTROL] + + ldr r1, =0x40f01223 + str r1, [r0, #DMC_MEMCONFIG0] + + ldr r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] + + ldr r1, =0xff000000 + str r1, [r0, #DMC_PRECHCONFIG] + + ldr r1, =0x0000005D + str r1, [r0, #DMC_TIMINGAREF] + + ldr r1, =0x34498691 + str r1, [r0, #DMC_TIMINGROW] + + ldr r1, =0x36330306 + str r1, [r0, #DMC_TIMINGDATA] + + ldr r1, =0x50380365 + str r1, [r0, #DMC_TIMINGPOWER] + + mov r2, #Exynos4210_DMC_DELAY +loop_8 + subs r2, r2, #1 + bne loop_8 + ldr r1, =0x07000000 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_9 + subs r2, r2, #1 + bne loop_9 + ldr r1, =0x00071C00 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_10 + subs r2, r2, #1 + bne loop_10 + + ldr r1, =0x00010BFC + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_11 + subs r2, r2, #1 + bne loop_11 + ldr r1, =0x00000488 + str r1, [r0, #DMC_DIRECTCMD] + + ldr r1, =0x00000810 + str r1, [r0, #DMC_DIRECTCMD] + + ldr r1, =0x00000C08 + str r1, [r0, #DMC_DIRECTCMD] + +#if 1 +// get DMC density information + ldr r1, =0x09010000 + mov r3, #10 +loop_12 + str r1, [r0, #DMC_DIRECTCMD] + mov r2, #Exynos4210_DMC_DELAY +loop_13 + subs r2, r2, #1 + bne loop_13 + ldr r7, [r0, #DMC_MRSTATUS] + subs r3, r3, #1 + bne loop_12 + and r7, r7, #0x3c + lsr r7, r7, #2 + cmp r7, #6 + ldreq r1, =0x20e01323 + ldrne r1, =0x20f01223 + str r1, [r0, #DMC_MEMCONFIG0] +#endif + + bx lr + + END diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf new file mode 100644 index 000000000..0ef5c8818 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf @@ -0,0 +1,49 @@ +#/* @file +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SmdkBoardLib + FILE_GUID = 736343a0-1d96-11e0-aaaa-0002a5d5c51b + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + +[LibraryClasses] + IoLib + ArmLib + + +[Sources.common] + SmdkBoard.c + SmdkBoardMem.c + +[Protocols] + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdCacheEnable + gArmPlatformTokenSpaceGuid.PcdStandalone +[FixedPcd] + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdSystemMemoryBase + gArmTokenSpaceGuid.PcdSystemMemorySize + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize + gExynosPkgTokenSpaceGuid.PcdTZPCBase diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c new file mode 100644 index 000000000..db1a163c8 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardMem.c @@ -0,0 +1,210 @@ +/** @file +* +* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include + +// DDR attributes +#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK +#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED +#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK +#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED + +#if 0 +/** + Return the information about the memory region in permanent memory used by PEI + + One of the PEI Module must install the permament memory used by PEI. This function returns the + information about this region for your platform to this PEIM module. + + @param[out] PeiMemoryBase Base of the memory region used by PEI core and modules + @param[out] PeiMemorySize Size of the memory region used by PEI core and modules + +**/ +VOID ArmPlatformGetPeiMemory ( + OUT UINTN* PeiMemoryBase, + OUT UINTN* PeiMemorySize + ) { + ASSERT((PeiMemoryBase != NULL) && (PeiMemorySize != NULL)); + + // *PeiMemoryBase = ARM_EB_DRAM_BASE + ARM_EB_EFI_FIX_ADDRESS_REGION_SZ; + // *PeiMemorySize = ARM_EB_EFI_MEMORY_REGION_SZ; + *PeiMemoryBase = PcdGet32(PcdSystemMemoryBase) + PcdGet32(PcdSystemMemoryFixRegionSize); + *PeiMemorySize = PcdGet32(PcdSystemMemoryUefiRegionSize); +} +#endif +/** + Return the Virtual Memory Map of your platform + + This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform. + + @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to- + Virtual Memory mapping. This array must be ended by a zero-filled + entry + +**/ +VOID ArmPlatformGetVirtualMemoryMap(ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap) { +// UINT32 val32; + UINT32 CacheAttributes; + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable; + + ASSERT(VirtualMemoryMap != NULL); + + VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * 5); + if (VirtualMemoryTable == NULL) { + return; + } + + if (FeaturePcdGet(PcdCacheEnable) == TRUE) { + CacheAttributes = DDR_ATTRIBUTES_CACHED; + } else { + CacheAttributes = DDR_ATTRIBUTES_UNCACHED; + } + + // SFR + VirtualMemoryTable[0].PhysicalBase = 0x00000000; + VirtualMemoryTable[0].VirtualBase = 0x00000000; + VirtualMemoryTable[0].Length = 0x20000000; + VirtualMemoryTable[0].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; + + // DDR + VirtualMemoryTable[1].PhysicalBase = 0x40000000; + VirtualMemoryTable[1].VirtualBase = 0x40000000; + VirtualMemoryTable[1].Length = 0x0e000000; + VirtualMemoryTable[1].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes; + + // framebuffer + VirtualMemoryTable[2].PhysicalBase = 0x4e000000; + VirtualMemoryTable[2].VirtualBase = 0x4e000000; + VirtualMemoryTable[2].Length = 0x02000000; + VirtualMemoryTable[2].Attributes = DDR_ATTRIBUTES_UNCACHED; + + VirtualMemoryTable[3].PhysicalBase = 0x50000000; + VirtualMemoryTable[3].VirtualBase = 0x50000000; + VirtualMemoryTable[3].Length = 0xb0000000; + VirtualMemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes; + + // End of Table + VirtualMemoryTable[4].PhysicalBase = 0; + VirtualMemoryTable[4].VirtualBase = 0; + VirtualMemoryTable[4].Length = 0; + VirtualMemoryTable[4].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0; + + *VirtualMemoryMap = VirtualMemoryTable; +} + + + +#if 0 +/** + Return the EFI Memory Map of your platform + + This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource + Descriptor HOBs used by DXE core. + + @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an + EFI Memory region. This array must be ended by a zero-filled entry + +**/ +VOID ArmPlatformGetEfiMemoryMap ( + OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap +) { + EFI_RESOURCE_ATTRIBUTE_TYPE Attributes; + UINT64 MemoryBase; + UINTN Index = 0; + ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR *EfiMemoryTable; + + ASSERT(EfiMemoryMap != NULL); + + EfiMemoryTable = (ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(sizeof(ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR) * 6); + + Attributes = + ( + EFI_RESOURCE_ATTRIBUTE_PRESENT | + EFI_RESOURCE_ATTRIBUTE_INITIALIZED | + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE | + EFI_RESOURCE_ATTRIBUTE_TESTED + ); + MemoryBase = PcdGet32(PcdSystemMemoryBase);//ARM_EB_DRAM_BASE; + + // Memory Reserved for fixed address allocations (such as Exception Vector Table) + EfiMemoryTable[Index].ResourceAttribute = Attributes; + EfiMemoryTable[Index].PhysicalStart = MemoryBase; + EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdSystemMemoryFixRegionSize);//ARM_EB_EFI_FIX_ADDRESS_REGION_SZ; + + MemoryBase += PcdGet32(PcdSystemMemoryFixRegionSize);//ARM_EB_EFI_FIX_ADDRESS_REGION_SZ; + + // Memory declared to PEI as permanent memory for PEI and DXE + EfiMemoryTable[++Index].ResourceAttribute = Attributes; + EfiMemoryTable[Index].PhysicalStart = MemoryBase; + EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdSystemMemoryUefiRegionSize);//ARM_EB_EFI_MEMORY_REGION_SZ; + + MemoryBase += PcdGet32(PcdSystemMemoryUefiRegionSize);//ARM_EB_EFI_MEMORY_REGION_SZ; + + // We must reserve the memory used by the Firmware Volume copied in DRAM at 0x80000000 + if (!PcdGet32(PcdStandalone)) { + // Chunk between the EFI Memory region and the firmware + EfiMemoryTable[++Index].ResourceAttribute = Attributes; + EfiMemoryTable[Index].PhysicalStart = MemoryBase; + //EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase; + EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase; + + // Chunk reserved by the firmware in DRAM + EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT); + //EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress); + EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress); + //EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize); + EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize); + + //MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize); + MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize); + } + + // We allocate all the remain memory as untested system memory + EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_TESTED); + EfiMemoryTable[Index].PhysicalStart = MemoryBase; + EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdSystemMemorySize) - (MemoryBase-PcdGet32(PcdSystemMemoryBase)); + + EfiMemoryTable[++Index].ResourceAttribute = 0; + EfiMemoryTable[Index].PhysicalStart = 0; + EfiMemoryTable[Index].NumberOfBytes = 0; + + *EfiMemoryMap = EfiMemoryTable; +} +#endif + +/** + Return the EFI Memory Map of your platform + + This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource + Descriptor HOBs used by DXE core. + + @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an + EFI Memory region. This array must be ended by a zero-filled entry + +**/ +EFI_STATUS +ArmPlatformGetAdditionalSystemMemory ( + OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap +) { + +// ArmPlatformGetEfiMemoryMap(EfiMemoryMap); + //return EFI_SUCCESS; + return EFI_UNSUPPORTED; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c new file mode 100644 index 000000000..9471df2fb --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSec.c @@ -0,0 +1,57 @@ +/** @file +* +* Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +* +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* +**/ + +#include +#include +#include +#include +#include +#include + + +/** + Initialize controllers that must setup at the early stage + + Some peripherals must be initialized in Secure World. + For example, some L2x0 requires to be initialized in Secure World + ============ added by girish to resolve compile error================= +**/ + +VOID +ArmPlatformSecInitialize ( + VOID + ) { + // The L2x0 controller must be intialize in Secure World + L2x0CacheInit(PcdGet32(PcdL2x0ControllerBase), + PL310_TAG_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES), + PL310_DATA_LATENCIES(L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES,L2x0_LATENCY_8_CYCLES), + 0,~0, // Use default setting for the Auxiliary Control Register + FALSE); + +} + +/** + Initialize the Secure peripherals and memory regions + + If Trustzone is supported by your platform then this function makes the required initialization + of the secure peripherals and memory regions. + +**/ +VOID +ArmPlatformSecTrustzoneInit ( + IN UINTN MpId + ) +{ +return; +} diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf new file mode 100644 index 000000000..f8f7228db --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf @@ -0,0 +1,50 @@ +#/* @file +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#*/ + +[Defines] + INF_VERSION = 0x00010005 + BASE_NAME = SmdkBoardSecLib + FILE_GUID = 6e02ebe0-1d96-11e0-b9cb-0002a5d5c51b + MODULE_TYPE = BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = ArmPlatformLib + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + ArmPkg/ArmPkg.dec + ArmPlatformPkg/ArmPlatformPkg.dec + SamsungPlatformPkg/ExynosPkg/ExynosPkg.dec + +[LibraryClasses] + IoLib + ArmLib + L2X0CacheLib + +[Sources.common] + SmdkBoard.c + SmdkBoardSec.c + SmdkBoardHelper.asm | RVCT + SmdkBoardHelper.S | GCC + +[Protocols] + +[FeaturePcd] + gEmbeddedTokenSpaceGuid.PcdCacheEnable + gArmPlatformTokenSpaceGuid.PcdStandalone + +[FixedPcd] + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdL2x0ControllerBase + gExynosPkgTokenSpaceGuid.PcdTZPCBase diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc b/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc new file mode 100644 index 000000000..846fddce6 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.dsc @@ -0,0 +1,475 @@ +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# + +################################################################################ +# +# Defines Section - statements that will be processed to create a Makefile. +# +################################################################################ +[Defines] + PLATFORM_NAME = SmdkBoard-Exynos + PLATFORM_GUID = 66a5a01d-be0a-4398-9b74-5af4a261381f + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/SmdkBoard-Exynos + SUPPORTED_ARCHITECTURES = ARM + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = DEFAULT + FLASH_DEFINITION = SamsungPlatformPkg/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf + +[LibraryClasses.common] +!if $(TARGET) == RELEASE + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf + UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +!else + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf +!endif + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf + ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf + ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Lib.inf + BaseLib|MdePkg/Library/BaseLib/BaseLib.inf + BaseMemoryLib|ArmPkg/Library/BaseMemoryLibStm/BaseMemoryLibStm.inf + DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf + EfiResetSystemLib|SamsungPlatformPkg/ExynosPkg/Library/ResetSystemLib/ResetSystemLib.inf + EblCmdLib|ArmPlatformPkg/Library/EblCmdLib/EblCmdLib.inf + EfiFileLib|EmbeddedPkg/Library/EfiFileLib/EfiFileLib.inf + PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf + PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + + # + # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window + # in the debugger will show load and unload commands for symbols. You can cut and paste this + # into the command window to load symbols. We should be able to use a script to do this, but + # the version of RVD I have does not support scripts accessing system memory. + # + CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf + DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf + DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf + DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf + PeCoffExtraActionLib|ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf + SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + UefiLib|MdePkg/Library/UefiLib/UefiLib.inf + UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf + UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf + UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf + UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf + +# +# Assume everything is fixed at build +# + ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf + CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf + DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf + DebugAgentTimerLib|SamsungPlatformPkg/SmdkBoardPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf + EblAddExternalCommandLib|EmbeddedPkg/Library/EblAddExternalCommandLib/EblAddExternalCommandLib.inf + EblNetworkLib|EmbeddedPkg/Library/EblNetworkLib/EblNetworkLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + SerialPortLib|SamsungPlatformPkg/ExynosPkg/Library/SerialPortLib/SerialPortLib.inf + TimerLib|SamsungPlatformPkg/ExynosPkg/Library/TimerLib/TimerLib.inf + UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf + + # Samsung specific + BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf + DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf + GdbSerialLib|SamsungPlatformPkg/ExynosPkg/Library/GdbSerialLib/GdbSerialLib.inf + + # iky for usb host + HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf + UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf + UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf + +[LibraryClasses.common.SEC] + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf + ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf + ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardSecLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + # L2 Cache Driver + L2X0CacheLib|ArmPlatformPkg/Drivers/PL310L2Cache/PL310L2CacheSec.inf + +!if $(EDK2_SKIP_PEICORE)==1 + PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf + ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf + LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + MemoryAllocationLib|EmbeddedPkg/Library/PrePiMemoryAllocationLib/PrePiMemoryAllocationLib.inf + HobLib|EmbeddedPkg/Library/PrePiHobLib/PrePiHobLib.inf + PrePiHobListPointerLib|ArmPlatformPkg/Library/PrePiHobListPointerLib/PrePiHobListPointerLib.inf + PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf + MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf +!endif + +[LibraryClasses.common.PEI_CORE] + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + # note: this won't actually work since globals in PEI are not writeable + # need to generate an ARM PEI services table pointer implementation + PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + +[LibraryClasses.common.PEIM] + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf + ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf + HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf + MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf + OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf + # note: this won't actually work since globals in PEI are not writeable + # need to generate an ARM PEI services table pointer implementation + PeiServicesTablePointerLib|ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf + PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf + PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf + PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLib.inf + PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf + PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf + PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf + ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + +[LibraryClasses.common.DXE_CORE] + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf + MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf + +[LibraryClasses.common.DXE_DRIVER] + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Sec/SecArmPlatformGlobalVariableLib.inf + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf + +[LibraryClasses.common.UEFI_APPLICATION] + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf + +[LibraryClasses.common.UEFI_DRIVER] + ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf + +[LibraryClasses.common.DXE_RUNTIME_DRIVER] + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf + HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf + ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf + +[LibraryClasses.ARM] + # + # It is not possible to prevent the ARM compiler for generic intrinsic functions. + # This library provides the instrinsic functions generate by a given compiler. + # [LibraryClasses.ARM] and NULL mean link this library into all ARM images. + # + NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf + +[BuildOptions] + RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu Cortex-A9 --thumb --fpu=softvfp -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu Cortex-A9 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + RVCT:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + GCC:*_*_ARM_ARCHCC_FLAGS == -march=armv7-a -mthumb -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + GCC:*_*_ARM_ARCHASM_FLAGS == -march=armv7-a -mthumb-interwork -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + GCC:*_*_ARM_CC_FLAGS = -Os -mword-relocations -mfpu=vfp -ffixed-r8 + GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7 -I$(WORKSPACE)/SamsungPlatformPkg/ExynosPkg/Include/Platform + XCODE:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG + + +################################################################################ +# +# Pcd Section - list of all EDK II PCD Entries defined by this Platform +# +################################################################################ + +[PcdsFeatureFlag.common] + gArmTokenSpaceGuid.PcdRelocateVectorTable|FALSE + gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE + gArmPlatformTokenSpaceGuid.PcdStandalone|TRUE + gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE + gEmbeddedTokenSpaceGuid.PcdCacheEnable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdComponentNameDisable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnosticsDisable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdComponentName2Disable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdDriverDiagnostics2Disable|TRUE + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport|FALSE + gEfiMdeModulePkgTokenSpaceGuid.PcdTurnOffUsbLegacySupport|TRUE + +!if $(EDK2_SKIP_PEICORE) == 1 + gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE + gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE +!endif + gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE + +[PcdsFixedAtBuild.common] + gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"SMDK4210" + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32 + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0 + gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|1000000 + gEfiMdePkgTokenSpaceGuid.PcdSpinLockTimeout|10000000 + gEfiMdePkgTokenSpaceGuid.PcdDebugClearMemoryValue|0xAF + gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1 + gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0 + gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320 + +# DEBUG_ASSERT_ENABLED 0x01 +# DEBUG_PRINT_ENABLED 0x02 +# DEBUG_CODE_ENABLED 0x04 +# CLEAR_MEMORY_ENABLED 0x08 +# ASSERT_BREAKPOINT_ENABLED 0x10 +# ASSERT_DEADLOOP_ENABLED 0x20 + gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f + +# DEBUG_INIT 0x00000001 // Initialization +# DEBUG_WARN 0x00000002 // Warnings +# DEBUG_LOAD 0x00000004 // Load events +# DEBUG_FS 0x00000008 // EFI File system +# DEBUG_POOL 0x00000010 // Alloc & Free's +# DEBUG_PAGE 0x00000020 // Alloc & Free's +# DEBUG_INFO 0x00000040 // Verbose +# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers +# DEBUG_VARIABLE 0x00000100 // Variable +# DEBUG_BM 0x00000400 // Boot Manager +# DEBUG_BLKIO 0x00001000 // BlkIo Driver +# DEBUG_NET 0x00004000 // SNI Driver +# DEBUG_UNDI 0x00010000 // UNDI Driver +# DEBUG_LOADFILE 0x00020000 // UNDI Driver +# DEBUG_EVENT 0x00080000 // Event messages +# DEBUG_ERROR 0x80000000 // Error + gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000000F + gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 + gEmbeddedTokenSpaceGuid.PcdEmbeddedAutomaticBootCommand|"" + gEmbeddedTokenSpaceGuid.PcdEmbeddedDefaultTextColor|0x07 + gEmbeddedTokenSpaceGuid.PcdEmbeddedMemVariableStoreSize|0x10000 + +# +# Optional feature to help prevent EFI memory map fragments +# Turned on and off via: PcdPrePiProduceMemoryTypeInformationHob +# Values are in EFI Pages (4K). DXE Core will make sure that +# at least this much of each type of memory can be allocated +# from a single memory range. This way you only end up with +# maximum of two fragements for each type in the memory map +# (the memory used, and the free memory that was prereserved +# but not used). +# + gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x00000000 + gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x01000000 + # Stacks for MPCores in Secure World + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x4B000000 # Top of SEC Stack for Secure World + + # Stacks for MPCores in Monitor Mode + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x4A000000 # Top of SEC Stack for Monitor World + gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x2000 # Stack for each of the 4 CPU cores + gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x48000000 + gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000 + + # Stacks for MPCores in Normal World + gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms + gArmTokenSpaceGuid.PcdSystemMemoryBase|0x40000000 + gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000 + gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0x0f + gArmTokenSpaceGuid.PcdArmPrimaryCore|0x00 + gArmTokenSpaceGuid.PcdTrustzoneSupport|TRUE + # + # ARM Pcds + # + gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000 + # + # ARM EB PCDS + # + gExynosPkgTokenSpaceGuid.PcdGdbUartBase|0x1000a000 + gExynosPkgTokenSpaceGuid.PcdConsoleUartBase|0x13810000 + gExynosPkgTokenSpaceGuid.PcdCmuBase|0x10030000 + gExynosPkgTokenSpaceGuid.PcdPWMTimerBase|0x139d0000 + gExynosPkgTokenSpaceGuid.PcdPmuBase|0x10020000 + gExynosPkgTokenSpaceGuid.PcdGpioPart1Base|0x11400000 + gExynosPkgTokenSpaceGuid.PcdGpioPart2Base|0x11000000 + gExynosPkgTokenSpaceGuid.PcdSdMmcBase|0x12530000 + gExynosPkgTokenSpaceGuid.PcdSysBase|0x10010000 + gExynosPkgTokenSpaceGuid.PcdFIMD0Base|0x11C00000 + gExynosPkgTokenSpaceGuid.PcdGICBase|0x10500000 + gExynosPkgTokenSpaceGuid.PcdTZPCBase|0x10100000 + # + # ARM PL390 General Interrupt Controller + # + gArmTokenSpaceGuid.PcdGicDistributorBase|0x10490000 + gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x10480000 + + # + # ARM OS Loader + # + #gArmTokenSpaceGuid.PcdArmMachineType|2925 + gArmTokenSpaceGuid.PcdArmMachineType|2456 + gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"SD-MMC Booting" + gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(B615F1F5-5088-43CD-809C-A16E52487D00)/HD(1,MBR,0x6F20736B,0x1D6E74,0x58A400)/zImage" + gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|"root=/dev/mmcblk0p2 rw rootwait console=ttySAC1,115200 init=/linuxrc" + gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1 + gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|L"Samsung Exynos4210-SMDK Board" + +# Use the Serial console (ConIn & ConOut) and the Graphic driver (ConOut) + gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi();VenHw(c5deae31-fad2-4030-841b-cfc9644d2c5b)" + gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(115200,8,N,1)/VenPcAnsi()" + gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut|10 + + # + # ARM L2x0 PCDs + # + gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x10502000 + +################################################################################ +# +# Components Section - list of all EDK II Modules needed by this Platform +# +################################################################################ +[Components.common] + +# +# SEC +# + ArmPlatformPkg/Sec/Sec.inf + +# +# PEI Phase modules +# +!if $(EDK2_SKIP_PEICORE) == 1 + ArmPlatformPkg/PrePi/PeiMPCore.inf { + + ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf + ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf + ArmPlatformLib|SamsungPlatformPkg/SmdkBoardPkg/Library/SmdkBoardLib/SmdkBoardLib.inf + ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf + } +!else + ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf { + + ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf + } + MdeModulePkg/Core/Pei/PeiMain.inf + MdeModulePkg/Universal/PCD/Pei/Pcd.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + } + ArmPlatformPkg/PlatformPei/PlatformPeim.inf + ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf + ArmPkg/Drivers/CpuPei/CpuPei.inf + IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf + Nt32Pkg/BootModePei/BootModePei.inf + MdeModulePkg/Universal/Variable/Pei/VariablePei.inf + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf { + + NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf + } +!endif + +# +# DXE +# + MdeModulePkg/Core/Dxe/DxeMain.inf { + + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf + NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf + } + + # + # Architectural Protocols + # + ArmPkg/Drivers/CpuDxe/CpuDxe.inf + EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + EmbeddedPkg/SerialDxe/SerialDxe.inf + + MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf + SamsungPlatformPkg/SmdkBoardPkg/FvbDxe/FvbDxe.inf + SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf + + # + # Samsung specific Driver + # + ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf + SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf + SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf{ + + ExynosLib|SamsungPlatformPkg/ExynosPkg/Library/ExynosLib/ExynosLib.inf + } + + # + # Semi-hosting filesystem + # + ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + FatPkg/EnhancedFatDxe/Fat.inf + MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # Application + # + EmbeddedPkg/Ebl/Ebl.inf + + # + # Bds + # + MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + ArmPlatformPkg/Bds/Bds.inf + + MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf b/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf new file mode 100644 index 000000000..73f845552 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg-Exynos.fdf @@ -0,0 +1,316 @@ +# FLASH layout file for ARM VE. +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved. +# +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# + +################################################################################ +# +# FD Section +# The [FD] Section is made up of the definition statements and a +# description of what goes into the Flash Device Image. Each FD section +# defines one flash "device" image. A flash device image may be one of +# the following: Removable media bootable image (like a boot floppy +# image,) an Option ROM image (that would be "flashed" into an add-in +# card,) a System "Flash" image (that would be burned into a system's +# flash) or an Update ("Capsule") image that will be used to update and +# existing system flash. +# +################################################################################ + + +[FD.SmdkBoard_EFI] +BaseAddress = 0x43E00000|gArmTokenSpaceGuid.PcdFdBaseAddress +Size = 0x00200000|gArmTokenSpaceGuid.PcdFdSize +ErasePolarity = 1 +BlockSize = 0x00010000 +NumBlocks = 0x20 + +################################################################################ +# +# Following are lists of FD Region layout which correspond to the locations of different +# images within the flash device. +# +# Regions must be defined in ascending order and may not overlap. +# +# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by +# the pipe "|" character, followed by the size of the region, also in hex with the leading +# "0x" characters. Like: +# Offset|Size +# PcdOffsetCName|PcdSizeCName +# RegionType +# +################################################################################ + +0x00000000|0x00100000 +gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize +FV = FVMAIN_COMPACT + +0x00110000|0x00010000 +gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize +#NV_VARIABLE_STORE +DATA = { + ## This is the EFI_FIRMWARE_VOLUME_HEADER + # ZeroVector [] + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + # FileSystemGuid: gEfiSystemNvDataFvGuid = + # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} + 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, + 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, + # FvLength: 0x20000 + 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + #Signature "_FVH" #Attributes + 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, + #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision + 0x48, 0x00, 0x36, 0x09, 0x00, 0x00, 0x00, 0x02, + #Blockmap[0]: 2 Blocks * 0x10000 Bytes / Block + 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, + #Blockmap[1]: End + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + ## This is the VARIABLE_STORE_HEADER + #Signature: gEfiVariableGuid = + # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} + 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, + 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, + #Size: 0x10000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0xFFB8 + # This can speed up the Variable Dispatch a bit. + 0xB8, 0xFF, 0x00, 0x00, + #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 + 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +} + +################################################################################ +# +# FV Section +# +# [FV] section is used to define what components or modules are placed within a flash +# device file. This section also defines order the components and modules are positioned +# within the image. The [FV] section consists of define statements, set statements and +# module statements. +# +################################################################################ + +[FV.FVMAIN] +BlockSize = 0x40 +NumBlocks = 0 # This FV gets compressed so make it just big enough +FvAlignment = 8 # FV alignment and FV attributes setting. +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF MdeModulePkg/Core/Dxe/DxeMain.inf + + # + # PI DXE Drivers producing Architectural Protocols (EFI Services) + # + INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf + INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf + INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf + INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf + INF MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf + + INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf + INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf + INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf + INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf + INF EmbeddedPkg/SerialDxe/SerialDxe.inf + + + INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf + INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf + INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf + INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf + + INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf + INF SamsungPlatformPkg/ExynosPkg/TimerDxe/TimerDxe.inf + + # + # ACPI Support + # + + # + # Samsung specific Driver + # + INF SamsungPlatformPkg/ExynosPkg/SDHCDxe/SDHCDxe.inf + INF SamsungPlatformPkg/ExynosPkg/Gpio/Gpio.inf + # + # PCI EMULATION + # + # + # Semi-hosting filesystem + # + INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf + + # + # FAT filesystem + GPT/MBR partitioning + # + INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf + INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf + INF FatPkg/EnhancedFatDxe/Fat.inf + INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf + + # + # USB HOST STACK + # + INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf + + # + # UEFI application (Shell Embedded Boot Loader) + # + INF EmbeddedPkg/Ebl/Ebl.inf + + + # + # Bds + # + INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf + INF ArmPlatformPkg/Bds/Bds.inf + +[FV.FVMAIN_COMPACT] +FvAlignment = 8 +ERASE_POLARITY = 1 +MEMORY_MAPPED = TRUE +STICKY_WRITE = TRUE +LOCK_CAP = TRUE +LOCK_STATUS = TRUE +WRITE_DISABLED_CAP = TRUE +WRITE_ENABLED_CAP = TRUE +WRITE_STATUS = TRUE +WRITE_LOCK_CAP = TRUE +WRITE_LOCK_STATUS = TRUE +READ_DISABLED_CAP = TRUE +READ_ENABLED_CAP = TRUE +READ_STATUS = TRUE +READ_LOCK_CAP = TRUE +READ_LOCK_STATUS = TRUE + + INF ArmPlatformPkg/PrePi/PeiMPCore.inf + FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { + SECTION FV_IMAGE = FVMAIN + } + } + + +################################################################################ +# +# Rules are use with the [FV] section's module INF type to define +# how an FFS file is created for a given INF file. The following Rule are the default +# rules for the different module type. User can add the customized rules to define the +# content of the FFS file. +# +################################################################################ + + +############################################################################ +# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # +############################################################################ +# +#[Rule.Common.DXE_DRIVER] +# FILE DRIVER = $(NAMED_GUID) { +# DXE_DEPEX DXE_DEPEX Optional |.depex +# COMPRESS PI_STD { +# GUIDED { +# PE32 PE32 |.efi +# UI STRING="$(MODULE_NAME)" Optional +# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) +# } +# } +# } +# +############################################################################ + +[Rule.Common.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { + TE TE Align = 32 |.efi + } + +[Rule.Common.PEI_CORE] + FILE PEI_CORE = $(NAMED_GUID) { + TE TE |.efi + UI STRING ="$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM] + FILE PEIM = $(NAMED_GUID) { + PEI_DEPEX PEI_DEPEX Optional |.depex + TE TE |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.PEIM.TIANOCOMPRESSED] + FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { + PEI_DEPEX PEI_DEPEX Optional |.depex + GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + } + +[Rule.Common.DXE_CORE] + FILE DXE_CORE = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.DXE_RUNTIME_DRIVER] + FILE DRIVER = $(NAMED_GUID) { + DXE_DEPEX DXE_DEPEX Optional |.depex + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.USER_DEFINED.ACPITABLE] + FILE FREEFORM = $(NAMED_GUID) { + RAW ACPI |.acpi + RAW ASL |.aml + UI STRING="$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_APPLICATION] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING ="$(MODULE_NAME)" Optional + } + +[Rule.Common.UEFI_APPLICATION.BINARY] + FILE APPLICATION = $(NAMED_GUID) { + PE32 PE32 |.efi + UI STRING="$(MODULE_NAME)" Optional + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) + } diff --git a/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg.dec b/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg.dec new file mode 100644 index 000000000..f4afba182 --- /dev/null +++ b/SamsungPlatformPkgOrigen/SmdkBoardPkg/SmdkBoardPkg.dec @@ -0,0 +1,43 @@ +#/** @file +# Arm RealView EB package. +# +# Copyright (c) 2011, Samsung Electronics Co. All rights reserved.
+# +# This program and the accompanying materials are licensed and made +# available under the terms and conditions of the BSD License which +# accompanies this distribution. +# The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +#**/ + +[Defines] + DEC_SPECIFICATION = 0x00010005 + PACKAGE_NAME = SmdkBoardPkg + PACKAGE_GUID = 4c9e432c-b84e-44fd-a796-f4545deec144 + PACKAGE_VERSION = 0.1 + +################################################################################ +# +# Include Section - list of Include Paths that are provided by this package. +# Comments are used for Keywords and Module Types. +# +# Supported Module Types: +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER +# DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION +# +################################################################################ +[Includes.common] +# Include # Root include for the package + +[Guids.common] #bc92b024-79f8-11e0-a039-0026b9733e2c + gSmdkBoardPkgTokenSpaceGuid = { 0xbc92b024, 0x79f8, 0x11e0, { 0xa0, 0x39, 0x00, 0x26, 0xb9, 0x73, 0x3e, 0x2c} } + +[PcdsFeatureFlag.common] + +[PcdsFixedAtBuild.common] + +[Protocols.common] -- cgit v1.2.3