diff options
Diffstat (limited to 'edk2/PcAtChipsetPkg')
| -rw-r--r-- | edk2/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c | 10 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/Contributions.txt | 188 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/License.txt | 25 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c | 1 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.S | 133 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.asm | 139 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/IoFifo.h | 175 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c | 4 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf | 9 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c | 58 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S | 121 | ||||
| -rw-r--r-- | edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm | 125 |
12 files changed, 975 insertions, 13 deletions
diff --git a/edk2/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c b/edk2/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c index 5a862d13b..447106afe 100644 --- a/edk2/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c +++ b/edk2/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c @@ -1,7 +1,7 @@ /** @file
This contains the installation function for the driver.
-Copyright (c) 2005 - 2011, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -413,7 +413,7 @@ Interrupt8259GetVector ( OUT UINT8 *Vector
)
{
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {
+ if ((UINT32)Irq > Efi8259Irq15) {
return EFI_INVALID_PARAMETER;
}
@@ -445,7 +445,7 @@ Interrupt8259EnableIrq ( IN BOOLEAN LevelTriggered
)
{
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {
+ if ((UINT32)Irq > Efi8259Irq15) {
return EFI_INVALID_PARAMETER;
}
@@ -478,7 +478,7 @@ Interrupt8259DisableIrq ( IN EFI_8259_IRQ Irq
)
{
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {
+ if ((UINT32)Irq > Efi8259Irq15) {
return EFI_INVALID_PARAMETER;
}
@@ -555,7 +555,7 @@ Interrupt8259EndOfInterrupt ( IN EFI_8259_IRQ Irq
)
{
- if (Irq < Efi8259Irq0 || Irq > Efi8259Irq15) {
+ if ((UINT32)Irq > Efi8259Irq15) {
return EFI_INVALID_PARAMETER;
}
diff --git a/edk2/PcAtChipsetPkg/Contributions.txt b/edk2/PcAtChipsetPkg/Contributions.txt new file mode 100644 index 000000000..667ca1035 --- /dev/null +++ b/edk2/PcAtChipsetPkg/Contributions.txt @@ -0,0 +1,188 @@ +
+======================
+= Code Contributions =
+======================
+
+To make a contribution to a TianoCore project, follow these steps.
+1. Create a change description in the format specified below to
+ use in the source control commit log.
+2. Your commit message must include your "Signed-off-by" signature,
+ and "Contributed-under" message.
+3. Your "Contributed-under" message explicitly states that the
+ contribution is made under the terms of the specified
+ contribution agreement. Your "Contributed-under" message
+ must include the name of contribution agreement and version.
+ For example: Contributed-under: TianoCore Contribution Agreement 1.0
+ The "TianoCore Contribution Agreement" is included below in
+ this document.
+4. Submit your code to the TianoCore project using the process
+ that the project documents on its web page. If the process is
+ not documented, then submit the code on development email list
+ for the project.
+
+=======================================
+= Change Description / Commit Message =
+=======================================
+
+Your change description should use the standard format for a
+commit message, and must include your "Signed-off-by" signature
+and the "Contributed-under" message.
+
+== Sample Change Description / Commit Message =
+
+=== Definitions for sample change description ===
+
+* "CodeModule" is a short idenfier for the affected code. For
+ example MdePkg, or MdeModulePkg UsbBusDxe.
+* "Brief-single-line-summary" is a short summary of the change.
+* The entire first line should be less than ~70 characters.
+* "Full-commit-message" a verbose multiple line comment describing
+ the change. Each line should be less than ~70 characters.
+* "Contributed-under" explicitely states that the contribution is
+ made under the terms of the contribtion agreement. This
+ agreement is included below in this document.
+* "Signed-off-by" is the contributor's signature identifying them
+ by their real/legal name and their email address.
+
+=== Start of sample change description / commit message ===
+CodeModule: Brief-single-line-summary
+
+Full-commit-message
+
+Contributed-under: TianoCore Contribution Agreement 1.0
+Signed-off-by: Contributor Name <contributor@email.server>
+=== End of sample change description / commit message ===
+
+========================================
+= TianoCore Contribution Agreement 1.0 =
+========================================
+
+INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION,
+INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE
+PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE
+TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE
+TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR
+REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE
+CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS
+OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED
+BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS
+AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE
+AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT
+USE THE CONTENT.
+
+Unless otherwise indicated, all Content made available on the TianoCore
+site is provided to you under the terms and conditions of the BSD
+License ("BSD"). A copy of the BSD License is available at
+http://opensource.org/licenses/bsd-license.php
+or when applicable, in the associated License.txt file.
+
+Certain other content may be made available under other licenses as
+indicated in or with such Content. (For example, in a License.txt file.)
+
+You accept and agree to the following terms and conditions for Your
+present and future Contributions submitted to TianoCore site. Except
+for the license granted to Intel hereunder, You reserve all right,
+title, and interest in and to Your Contributions.
+
+== SECTION 1: Definitions ==
+* "You" or "Contributor" shall mean the copyright owner or legal
+ entity authorized by the copyright owner that is making a
+ Contribution hereunder. All other entities that control, are
+ controlled by, or are under common control with that entity are
+ considered to be a single Contributor. For the purposes of this
+ definition, "control" means (i) the power, direct or indirect, to
+ cause the direction or management of such entity, whether by
+ contract or otherwise, or (ii) ownership of fifty percent (50%)
+ or more of the outstanding shares, or (iii) beneficial ownership
+ of such entity.
+* "Contribution" shall mean any original work of authorship,
+ including any modifications or additions to an existing work,
+ that is intentionally submitted by You to the TinaoCore site for
+ inclusion in, or documentation of, any of the Content. For the
+ purposes of this definition, "submitted" means any form of
+ electronic, verbal, or written communication sent to the
+ TianoCore site or its representatives, including but not limited
+ to communication on electronic mailing lists, source code
+ control systems, and issue tracking systems that are managed by,
+ or on behalf of, the TianoCore site for the purpose of
+ discussing and improving the Content, but excluding
+ communication that is conspicuously marked or otherwise
+ designated in writing by You as "Not a Contribution."
+
+== SECTION 2: License for Contributions ==
+* Contributor hereby agrees that redistribution and use of the
+ Contribution in source and binary forms, with or without
+ modification, are permitted provided that the following
+ conditions are met:
+** Redistributions of source code must retain the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer.
+** Redistributions in binary form must reproduce the Contributor's
+ copyright notice, this list of conditions and the following
+ disclaimer in the documentation and/or other materials provided
+ with the distribution.
+* Disclaimer. None of the names of Contributor, Intel, or the names
+ of their respective contributors may be used to endorse or
+ promote products derived from this software without specific
+ prior written permission.
+* Contributor grants a license (with the right to sublicense) under
+ claims of Contributor's patents that Contributor can license that
+ are infringed by the Contribution (as delivered by Contributor) to
+ make, use, distribute, sell, offer for sale, and import the
+ Contribution and derivative works thereof solely to the minimum
+ extent necessary for licensee to exercise the granted copyright
+ license; this patent license applies solely to those portions of
+ the Contribution that are unmodified. No hardware per se is
+ licensed.
+* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE
+ CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY
+ EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE
+ CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
+ DAMAGE.
+
+== SECTION 3: Representations ==
+* You represent that You are legally entitled to grant the above
+ license. If your employer(s) has rights to intellectual property
+ that You create that includes Your Contributions, You represent
+ that You have received permission to make Contributions on behalf
+ of that employer, that Your employer has waived such rights for
+ Your Contributions.
+* You represent that each of Your Contributions is Your original
+ creation (see Section 4 for submissions on behalf of others).
+ You represent that Your Contribution submissions include complete
+ details of any third-party license or other restriction
+ (including, but not limited to, related patents and trademarks)
+ of which You are personally aware and which are associated with
+ any part of Your Contributions.
+
+== SECTION 4: Third Party Contributions ==
+* Should You wish to submit work that is not Your original creation,
+ You may submit it to TianoCore site separately from any
+ Contribution, identifying the complete details of its source
+ and of any license or other restriction (including, but not
+ limited to, related patents, trademarks, and license agreements)
+ of which You are personally aware, and conspicuously marking the
+ work as "Submitted on behalf of a third-party: [named here]".
+
+== SECTION 5: Miscellaneous ==
+* Applicable Laws. Any claims arising under or relating to this
+ Agreement shall be governed by the internal substantive laws of
+ the State of Delaware or federal courts located in Delaware,
+ without regard to principles of conflict of laws.
+* Language. This Agreement is in the English language only, which
+ language shall be controlling in all respects, and all versions
+ of this Agreement in any other language shall be for accommodation
+ only and shall not be binding. All communications and notices made
+ or given pursuant to this Agreement, and all documentation and
+ support to be provided, unless otherwise noted, shall be in the
+ English language.
+
diff --git a/edk2/PcAtChipsetPkg/License.txt b/edk2/PcAtChipsetPkg/License.txt new file mode 100644 index 000000000..be68999be --- /dev/null +++ b/edk2/PcAtChipsetPkg/License.txt @@ -0,0 +1,25 @@ +Copyright (c) 2012, Intel Corporation. All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+* Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
diff --git a/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c b/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c index b999a2eaf..50e0e2603 100644 --- a/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c +++ b/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c @@ -514,6 +514,7 @@ PcRtcGetWakeupTime ( //
// Get the alarm info from variable
//
+ DataSize = sizeof (EFI_TIME);
Status = EfiGetVariable (
L"RTCALARM",
&gEfiCallerIdGuid,
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.S b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.S new file mode 100644 index 000000000..6b9c0966b --- /dev/null +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.S @@ -0,0 +1,133 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo8 (
+# IN UINTN Port,
+# IN UINTN Count,
+# IN VOID *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ push %edi
+ cld
+ movw 8(%esp), %dx
+ mov 12(%esp), %ecx
+ mov 16(%esp), %edi
+rep insb
+ pop %edi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo16 (
+# IN UINTN Port,
+# IN UINTN Count,
+# IN VOID *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ push %edi
+ cld
+ movw 8(%esp), %dx
+ mov 12(%esp), %ecx
+ mov 16(%esp), %edi
+rep insw
+ pop %edi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo32 (
+# IN UINTN Port,
+# IN UINTN Count,
+# IN VOID *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ push %edi
+ cld
+ movw 8(%esp), %dx
+ mov 12(%esp), %ecx
+ mov 16(%esp), %edi
+rep insl
+ pop %edi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo8 (
+# IN UINTN Port,
+# IN UINTN Count,
+# IN VOID *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ push %esi
+ cld
+ movw 8(%esp), %dx
+ mov 12(%esp), %ecx
+ mov 16(%esp), %esi
+rep outsb
+ pop %esi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo16 (
+# IN UINTN Port,
+# IN UINTN Count,
+# IN VOID *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ push %esi
+ cld
+ movw 8(%esp), %dx
+ mov 12(%esp), %ecx
+ mov 16(%esp), %esi
+rep outsw
+ pop %esi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo32 (
+# IN UINTN Port,
+# IN UINTN Count,
+# IN VOID *Buffer
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ push %esi
+ cld
+ movw 8(%esp), %dx
+ mov 12(%esp), %ecx
+ mov 16(%esp), %esi
+rep outsl
+ pop %esi
+ ret
+
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.asm b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.asm new file mode 100644 index 000000000..4b147cbeb --- /dev/null +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/Ia32/IoFifo.asm @@ -0,0 +1,139 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insb
+ pop edi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insw
+ pop edi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ push edi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov edi, [esp + 16]
+rep insd
+ pop edi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsb
+ pop esi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsw
+ pop esi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port,
+; IN UINTN Size,
+; IN VOID *Buffer
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ push esi
+ cld
+ mov dx, [esp + 8]
+ mov ecx, [esp + 12]
+ mov esi, [esp + 16]
+rep outsd
+ pop esi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/IoFifo.h b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/IoFifo.h new file mode 100644 index 000000000..c4eb2081a --- /dev/null +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/IoFifo.h @@ -0,0 +1,175 @@ +/** @file + I/O FIFO routines + + Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials are + licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef _IO_FIFO_H_INCLUDED_ +#define _IO_FIFO_H_INCLUDED_ + +/** + Reads an 8-bit I/O port fifo into a block of memory. + + Reads the 8-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is + stored in the provided Buffer. + + This function must guarantee that all I/O read and write operations are + serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Reads a 16-bit I/O port fifo into a block of memory. + + Reads the 16-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is + stored in the provided Buffer. + + This function must guarantee that all I/O read and write operations are + serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Reads a 32-bit I/O port fifo into a block of memory. + + Reads the 32-bit I/O fifo port specified by Port. + + The port is read Count times, and the read data is + stored in the provided Buffer. + + This function must guarantee that all I/O read and write operations are + serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to read. + @param Count The number of times to read I/O port. + @param Buffer The buffer to store the read data into. + +**/ +VOID +EFIAPI +IoReadFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Writes a block of memory into an 8-bit I/O port fifo. + + Writes the 8-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is + retrieved from the provided Buffer. + + This function must guarantee that all I/O write and write operations are + serialized. + + If 8-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo8 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Writes a block of memory into a 16-bit I/O port fifo. + + Writes the 16-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is + retrieved from the provided Buffer. + + This function must guarantee that all I/O write and write operations are + serialized. + + If 16-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo16 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +/** + Writes a block of memory into a 32-bit I/O port fifo. + + Writes the 32-bit I/O fifo port specified by Port. + + The port is written Count times, and the write data is + retrieved from the provided Buffer. + + This function must guarantee that all I/O write and write operations are + serialized. + + If 32-bit I/O port operations are not supported, then ASSERT(). + + @param Port The I/O port to write. + @param Count The number of times to write I/O port. + @param Buffer The buffer to store the write data into. + +**/ +VOID +EFIAPI +IoWriteFifo32 ( + IN UINTN Port, + IN UINTN Count, + OUT VOID *Buffer + ); + +#endif + diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c index a6c1d130a..994bfeb60 100644 --- a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridge.c @@ -1,7 +1,7 @@ /** @file
Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
-Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are
licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -1180,7 +1180,7 @@ PreprocessController ( return EFI_INVALID_PARAMETER;
}
- if (Phase < EfiPciBeforeChildBusEnumeration || Phase > EfiPciBeforeResourceCollection) {
+ if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
return EFI_INVALID_PARAMETER;
}
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf index c5fe0fa61..bed1d3725 100644 --- a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf @@ -42,6 +42,15 @@ PciHostBridge.c
PciRootBridgeIo.c
PciHostBridge.h
+ IoFifo.h
+
+[Sources.IA32]
+ Ia32/IoFifo.asm
+ Ia32/IoFifo.S
+
+[Sources.X64]
+ X64/IoFifo.asm
+ X64/IoFifo.S
[Protocols]
gEfiPciHostBridgeResourceAllocationProtocolGuid
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c index 512a5049c..7946324d9 100644 --- a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/PciRootBridgeIo.c @@ -1,7 +1,7 @@ /** @file
PCI Root Bridge Io Protocol implementation
-Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are
licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -13,6 +13,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. **/
#include "PciHostBridge.h"
+#include "IoFifo.h"
typedef struct {
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR SpaceDesp[TypeMax];
@@ -769,7 +770,7 @@ RootBridgeIoCheckParameter ( //
// Check to see if Width is in the valid range
//
- if (Width < EfiPciWidthUint8 || Width >= EfiPciWidthMaximum) {
+ if ((UINT32)Width >= EfiPciWidthMaximum) {
return EFI_INVALID_PARAMETER;
}
@@ -994,6 +995,51 @@ RootBridgeIoIoRW ( InStride = mInStride[Width];
OutStride = mOutStride[Width];
OperationWidth = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) (Width & 0x03);
+
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)
+ if (InStride == 0) {
+ if (Write) {
+ switch (OperationWidth) {
+ case EfiPciWidthUint8:
+ IoWriteFifo8 ((UINTN) Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPciWidthUint16:
+ IoWriteFifo16 ((UINTN) Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPciWidthUint32:
+ IoWriteFifo32 ((UINTN) Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The RootBridgeIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ } else {
+ switch (OperationWidth) {
+ case EfiPciWidthUint8:
+ IoReadFifo8 ((UINTN) Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPciWidthUint16:
+ IoReadFifo16 ((UINTN) Address, Count, Buffer);
+ return EFI_SUCCESS;
+ case EfiPciWidthUint32:
+ IoReadFifo32 ((UINTN) Address, Count, Buffer);
+ return EFI_SUCCESS;
+ default:
+ //
+ // The RootBridgeIoCheckParameter call above will ensure that this
+ // path is not taken.
+ //
+ ASSERT (FALSE);
+ break;
+ }
+ }
+ }
+#endif
+
for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) {
if (Write) {
switch (OperationWidth) {
@@ -1187,7 +1233,7 @@ RootBridgeIoPollMem ( return EFI_INVALID_PARAMETER;
}
- if (Width < 0 || Width > EfiPciWidthUint64) {
+ if ((UINT32)Width > EfiPciWidthUint64) {
return EFI_INVALID_PARAMETER;
}
@@ -1294,7 +1340,7 @@ RootBridgeIoPollIo ( return EFI_INVALID_PARAMETER;
}
- if (Width < 0 || Width > EfiPciWidthUint64) {
+ if ((UINT32)Width > EfiPciWidthUint64) {
return EFI_INVALID_PARAMETER;
}
@@ -1515,7 +1561,7 @@ RootBridgeIoCopyMem ( UINTN Index;
UINT64 Result;
- if (Width < 0 || Width > EfiPciWidthUint64) {
+ if ((UINT32)Width > EfiPciWidthUint64) {
return EFI_INVALID_PARAMETER;
}
@@ -1689,7 +1735,7 @@ RootBridgeIoMap ( //
// Make sure that Operation is valid
//
- if (Operation < 0 || Operation >= EfiPciOperationMaximum) {
+ if ((UINT32)Operation >= EfiPciOperationMaximum) {
return EFI_INVALID_PARAMETER;
}
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S new file mode 100644 index 000000000..ca484f561 --- /dev/null +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S @@ -0,0 +1,121 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo8 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rdi # rdi: buffer address; r8: save register
+rep insb
+ mov %r8, %rdi # restore rdi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo16 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rdi # rdi: buffer address; r8: save register
+rep insw
+ mov %r8, %rdi # restore rdi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo32 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rdi # rdi: buffer address; r8: save register
+rep insl
+ mov %r8, %rdi # restore rdi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo8 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rsi # rsi: buffer address; r8: save register
+rep outsb
+ mov %r8, %rsi # restore rsi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo16 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rsi # rsi: buffer address; r8: save register
+rep outsw
+ mov %r8, %rsi # restore rsi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo32 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rsi # rsi: buffer address; r8: save register
+rep outsl
+ mov %r8, %rsi # restore rsi
+ ret
+
diff --git a/edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm new file mode 100644 index 000000000..d16f0249d --- /dev/null +++ b/edk2/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm @@ -0,0 +1,125 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
|