diff options
| author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-03-04 17:37:29 +0000 |
|---|---|---|
| committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-03-04 17:37:29 +0000 |
| commit | e1fad9b3ba8187038b9787f2307e48f02ef78b80 (patch) | |
| tree | 83335c0e2a322bc5b5337e32f6b17860a662b809 /OvmfPkg/AcpiTables/Facp.aslc | |
| parent | 1e69186a23d08399ed6245c74fb501e1bc49aaf3 (diff) | |
OvmfPkg: fold macros of unsupported GPE1 register block into Facp.aslc
In the next patch we're going to specify Extended Addresses of register
blocks in Generic Address Structure format. The GAS is easy to fill if we
want to posit either "unsupported" (all zero) or a given address in a
specific address space. However deriving "unsupported" just from a macro
expanding to zero is unwieldy, so let's avoid the need.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14154 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/AcpiTables/Facp.aslc')
| -rw-r--r-- | OvmfPkg/AcpiTables/Facp.aslc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/OvmfPkg/AcpiTables/Facp.aslc b/OvmfPkg/AcpiTables/Facp.aslc index 3f09f928b..2aec355d9 100644 --- a/OvmfPkg/AcpiTables/Facp.aslc +++ b/OvmfPkg/AcpiTables/Facp.aslc @@ -44,14 +44,14 @@ EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { 0, // Power Mgt 2 Ctrl Reg Blk unsupported
PM_TMR_BLK, // Port address of Power Mgt Timer Ctrl Reg Blk
GPE0_BLK, // Port addr of General Purpose Event 0 Reg Blk
- GPE1_BLK, // Port addr of General Purpose Event 1 Reg Blk
+ 0, // General Purpose Event 1 Reg Blk unsupported
PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk
PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk
0, // Power Mgt 2 Ctrl Reg Blk unsupported
PM_TM_LEN, // Byte Length of ports at pm_tm_blk
GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk
- GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk
- GPE1_BASE, // offset in gpe model where gpe1 events start
+ 0, // General Purpose Event 1 Reg Blk unsupported
+ 0, // General Purpose Event 1 Reg Blk unsupported
0, // _CST support
P_LVL2_LAT, // worst case HW latency to enter/exit C2 state
P_LVL3_LAT, // worst case HW latency to enter/exit C3 state
|