diff options
| author | Ryan Harkin <ryan.harkin@linaro.org> | 2012-10-22 08:35:15 +0100 |
|---|---|---|
| committer | Ryan Harkin <ryan.harkin@linaro.org> | 2013-09-18 17:41:56 +0100 |
| commit | 321f886739ab582e89c94f9b5d01edb116a5ccec (patch) | |
| tree | b06f69d4065dac94c29330c223399f473a7fb474 | |
| parent | c9ded20bb8fce23dd7a7476fba16d39fd5ee598b (diff) | |
TC1: set refresh period
This patch fixes TC1 instablility. Setting the DRAM refresh period seems to be the cure.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
| -rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15x2/CTA15x2Boot.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15x2/CTA15x2Boot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15x2/CTA15x2Boot.S index 2bd678be9..d865d6701 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15x2/CTA15x2Boot.S +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15x2/CTA15x2Boot.S @@ -158,6 +158,13 @@ smc_init2: LDR r1, = 0x03C00000 STR r1, [r0, #PL350_SMC_DIRECT_CMD_OFFSET] + // Set refresh period + LDR r1, = 0x1 + STR r1, [r0, #0x20] + + LDR r1, = 0x1 + STR r1, [r0, #0x24] + // page mode setup for VRAM LDR r0, = 0x00FFFFFC ADD r0, r0, r2 |